1 /* 2 * SMP initialisation and IPI support 3 * Based on arch/arm/kernel/smp.c 4 * 5 * Copyright (C) 2012 ARM Ltd. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/spinlock.h> 23 #include <linux/sched.h> 24 #include <linux/interrupt.h> 25 #include <linux/cache.h> 26 #include <linux/profile.h> 27 #include <linux/errno.h> 28 #include <linux/mm.h> 29 #include <linux/err.h> 30 #include <linux/cpu.h> 31 #include <linux/smp.h> 32 #include <linux/seq_file.h> 33 #include <linux/irq.h> 34 #include <linux/percpu.h> 35 #include <linux/clockchips.h> 36 #include <linux/completion.h> 37 #include <linux/of.h> 38 39 #include <asm/atomic.h> 40 #include <asm/cacheflush.h> 41 #include <asm/cputype.h> 42 #include <asm/cpu_ops.h> 43 #include <asm/mmu_context.h> 44 #include <asm/pgtable.h> 45 #include <asm/pgalloc.h> 46 #include <asm/processor.h> 47 #include <asm/smp_plat.h> 48 #include <asm/sections.h> 49 #include <asm/tlbflush.h> 50 #include <asm/ptrace.h> 51 52 /* 53 * as from 2.5, kernels no longer have an init_tasks structure 54 * so we need some other way of telling a new secondary core 55 * where to place its SVC stack 56 */ 57 struct secondary_data secondary_data; 58 59 enum ipi_msg_type { 60 IPI_RESCHEDULE, 61 IPI_CALL_FUNC, 62 IPI_CALL_FUNC_SINGLE, 63 IPI_CPU_STOP, 64 IPI_TIMER, 65 }; 66 67 /* 68 * Boot a secondary CPU, and assign it the specified idle task. 69 * This also gives us the initial stack to use for this CPU. 70 */ 71 static int boot_secondary(unsigned int cpu, struct task_struct *idle) 72 { 73 if (cpu_ops[cpu]->cpu_boot) 74 return cpu_ops[cpu]->cpu_boot(cpu); 75 76 return -EOPNOTSUPP; 77 } 78 79 static DECLARE_COMPLETION(cpu_running); 80 81 int __cpu_up(unsigned int cpu, struct task_struct *idle) 82 { 83 int ret; 84 85 /* 86 * We need to tell the secondary core where to find its stack and the 87 * page tables. 88 */ 89 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; 90 __flush_dcache_area(&secondary_data, sizeof(secondary_data)); 91 92 /* 93 * Now bring the CPU into our world. 94 */ 95 ret = boot_secondary(cpu, idle); 96 if (ret == 0) { 97 /* 98 * CPU was successfully started, wait for it to come online or 99 * time out. 100 */ 101 wait_for_completion_timeout(&cpu_running, 102 msecs_to_jiffies(1000)); 103 104 if (!cpu_online(cpu)) { 105 pr_crit("CPU%u: failed to come online\n", cpu); 106 ret = -EIO; 107 } 108 } else { 109 pr_err("CPU%u: failed to boot: %d\n", cpu, ret); 110 } 111 112 secondary_data.stack = NULL; 113 114 return ret; 115 } 116 117 static void smp_store_cpu_info(unsigned int cpuid) 118 { 119 store_cpu_topology(cpuid); 120 } 121 122 /* 123 * This is the secondary CPU boot entry. We're using this CPUs 124 * idle thread stack, but a set of temporary page tables. 125 */ 126 asmlinkage void secondary_start_kernel(void) 127 { 128 struct mm_struct *mm = &init_mm; 129 unsigned int cpu = smp_processor_id(); 130 131 /* 132 * All kernel threads share the same mm context; grab a 133 * reference and switch to it. 134 */ 135 atomic_inc(&mm->mm_count); 136 current->active_mm = mm; 137 cpumask_set_cpu(cpu, mm_cpumask(mm)); 138 139 set_my_cpu_offset(per_cpu_offset(smp_processor_id())); 140 printk("CPU%u: Booted secondary processor\n", cpu); 141 142 /* 143 * TTBR0 is only used for the identity mapping at this stage. Make it 144 * point to zero page to avoid speculatively fetching new entries. 145 */ 146 cpu_set_reserved_ttbr0(); 147 flush_tlb_all(); 148 149 preempt_disable(); 150 trace_hardirqs_off(); 151 152 if (cpu_ops[cpu]->cpu_postboot) 153 cpu_ops[cpu]->cpu_postboot(); 154 155 /* 156 * Enable GIC and timers. 157 */ 158 notify_cpu_starting(cpu); 159 160 smp_store_cpu_info(cpu); 161 162 /* 163 * OK, now it's safe to let the boot CPU continue. Wait for 164 * the CPU migration code to notice that the CPU is online 165 * before we continue. 166 */ 167 set_cpu_online(cpu, true); 168 complete(&cpu_running); 169 170 local_dbg_enable(); 171 local_irq_enable(); 172 local_async_enable(); 173 174 /* 175 * OK, it's off to the idle thread for us 176 */ 177 cpu_startup_entry(CPUHP_ONLINE); 178 } 179 180 #ifdef CONFIG_HOTPLUG_CPU 181 static int op_cpu_disable(unsigned int cpu) 182 { 183 /* 184 * If we don't have a cpu_die method, abort before we reach the point 185 * of no return. CPU0 may not have an cpu_ops, so test for it. 186 */ 187 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die) 188 return -EOPNOTSUPP; 189 190 /* 191 * We may need to abort a hot unplug for some other mechanism-specific 192 * reason. 193 */ 194 if (cpu_ops[cpu]->cpu_disable) 195 return cpu_ops[cpu]->cpu_disable(cpu); 196 197 return 0; 198 } 199 200 /* 201 * __cpu_disable runs on the processor to be shutdown. 202 */ 203 int __cpu_disable(void) 204 { 205 unsigned int cpu = smp_processor_id(); 206 int ret; 207 208 ret = op_cpu_disable(cpu); 209 if (ret) 210 return ret; 211 212 /* 213 * Take this CPU offline. Once we clear this, we can't return, 214 * and we must not schedule until we're ready to give up the cpu. 215 */ 216 set_cpu_online(cpu, false); 217 218 /* 219 * OK - migrate IRQs away from this CPU 220 */ 221 migrate_irqs(); 222 223 /* 224 * Remove this CPU from the vm mask set of all processes. 225 */ 226 clear_tasks_mm_cpumask(cpu); 227 228 return 0; 229 } 230 231 static DECLARE_COMPLETION(cpu_died); 232 233 /* 234 * called on the thread which is asking for a CPU to be shutdown - 235 * waits until shutdown has completed, or it is timed out. 236 */ 237 void __cpu_die(unsigned int cpu) 238 { 239 if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) { 240 pr_crit("CPU%u: cpu didn't die\n", cpu); 241 return; 242 } 243 pr_notice("CPU%u: shutdown\n", cpu); 244 } 245 246 /* 247 * Called from the idle thread for the CPU which has been shutdown. 248 * 249 * Note that we disable IRQs here, but do not re-enable them 250 * before returning to the caller. This is also the behaviour 251 * of the other hotplug-cpu capable cores, so presumably coming 252 * out of idle fixes this. 253 */ 254 void cpu_die(void) 255 { 256 unsigned int cpu = smp_processor_id(); 257 258 idle_task_exit(); 259 260 local_irq_disable(); 261 262 /* Tell __cpu_die() that this CPU is now safe to dispose of */ 263 complete(&cpu_died); 264 265 /* 266 * Actually shutdown the CPU. This must never fail. The specific hotplug 267 * mechanism must perform all required cache maintenance to ensure that 268 * no dirty lines are lost in the process of shutting down the CPU. 269 */ 270 cpu_ops[cpu]->cpu_die(cpu); 271 272 BUG(); 273 } 274 #endif 275 276 void __init smp_cpus_done(unsigned int max_cpus) 277 { 278 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus()); 279 } 280 281 void __init smp_prepare_boot_cpu(void) 282 { 283 set_my_cpu_offset(per_cpu_offset(smp_processor_id())); 284 } 285 286 static void (*smp_cross_call)(const struct cpumask *, unsigned int); 287 288 /* 289 * Enumerate the possible CPU set from the device tree and build the 290 * cpu logical map array containing MPIDR values related to logical 291 * cpus. Assumes that cpu_logical_map(0) has already been initialized. 292 */ 293 void __init smp_init_cpus(void) 294 { 295 struct device_node *dn = NULL; 296 unsigned int i, cpu = 1; 297 bool bootcpu_valid = false; 298 299 while ((dn = of_find_node_by_type(dn, "cpu"))) { 300 const u32 *cell; 301 u64 hwid; 302 303 /* 304 * A cpu node with missing "reg" property is 305 * considered invalid to build a cpu_logical_map 306 * entry. 307 */ 308 cell = of_get_property(dn, "reg", NULL); 309 if (!cell) { 310 pr_err("%s: missing reg property\n", dn->full_name); 311 goto next; 312 } 313 hwid = of_read_number(cell, of_n_addr_cells(dn)); 314 315 /* 316 * Non affinity bits must be set to 0 in the DT 317 */ 318 if (hwid & ~MPIDR_HWID_BITMASK) { 319 pr_err("%s: invalid reg property\n", dn->full_name); 320 goto next; 321 } 322 323 /* 324 * Duplicate MPIDRs are a recipe for disaster. Scan 325 * all initialized entries and check for 326 * duplicates. If any is found just ignore the cpu. 327 * cpu_logical_map was initialized to INVALID_HWID to 328 * avoid matching valid MPIDR values. 329 */ 330 for (i = 1; (i < cpu) && (i < NR_CPUS); i++) { 331 if (cpu_logical_map(i) == hwid) { 332 pr_err("%s: duplicate cpu reg properties in the DT\n", 333 dn->full_name); 334 goto next; 335 } 336 } 337 338 /* 339 * The numbering scheme requires that the boot CPU 340 * must be assigned logical id 0. Record it so that 341 * the logical map built from DT is validated and can 342 * be used. 343 */ 344 if (hwid == cpu_logical_map(0)) { 345 if (bootcpu_valid) { 346 pr_err("%s: duplicate boot cpu reg property in DT\n", 347 dn->full_name); 348 goto next; 349 } 350 351 bootcpu_valid = true; 352 353 /* 354 * cpu_logical_map has already been 355 * initialized and the boot cpu doesn't need 356 * the enable-method so continue without 357 * incrementing cpu. 358 */ 359 continue; 360 } 361 362 if (cpu >= NR_CPUS) 363 goto next; 364 365 if (cpu_read_ops(dn, cpu) != 0) 366 goto next; 367 368 if (cpu_ops[cpu]->cpu_init(dn, cpu)) 369 goto next; 370 371 pr_debug("cpu logical map 0x%llx\n", hwid); 372 cpu_logical_map(cpu) = hwid; 373 next: 374 cpu++; 375 } 376 377 /* sanity check */ 378 if (cpu > NR_CPUS) 379 pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n", 380 cpu, NR_CPUS); 381 382 if (!bootcpu_valid) { 383 pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n"); 384 return; 385 } 386 387 /* 388 * All the cpus that made it to the cpu_logical_map have been 389 * validated so set them as possible cpus. 390 */ 391 for (i = 0; i < NR_CPUS; i++) 392 if (cpu_logical_map(i) != INVALID_HWID) 393 set_cpu_possible(i, true); 394 } 395 396 void __init smp_prepare_cpus(unsigned int max_cpus) 397 { 398 int err; 399 unsigned int cpu, ncores = num_possible_cpus(); 400 401 init_cpu_topology(); 402 403 smp_store_cpu_info(smp_processor_id()); 404 405 /* 406 * are we trying to boot more cores than exist? 407 */ 408 if (max_cpus > ncores) 409 max_cpus = ncores; 410 411 /* Don't bother if we're effectively UP */ 412 if (max_cpus <= 1) 413 return; 414 415 /* 416 * Initialise the present map (which describes the set of CPUs 417 * actually populated at the present time) and release the 418 * secondaries from the bootloader. 419 * 420 * Make sure we online at most (max_cpus - 1) additional CPUs. 421 */ 422 max_cpus--; 423 for_each_possible_cpu(cpu) { 424 if (max_cpus == 0) 425 break; 426 427 if (cpu == smp_processor_id()) 428 continue; 429 430 if (!cpu_ops[cpu]) 431 continue; 432 433 err = cpu_ops[cpu]->cpu_prepare(cpu); 434 if (err) 435 continue; 436 437 set_cpu_present(cpu, true); 438 max_cpus--; 439 } 440 } 441 442 443 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) 444 { 445 smp_cross_call = fn; 446 } 447 448 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 449 { 450 smp_cross_call(mask, IPI_CALL_FUNC); 451 } 452 453 void arch_send_call_function_single_ipi(int cpu) 454 { 455 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); 456 } 457 458 static const char *ipi_types[NR_IPI] = { 459 #define S(x,s) [x - IPI_RESCHEDULE] = s 460 S(IPI_RESCHEDULE, "Rescheduling interrupts"), 461 S(IPI_CALL_FUNC, "Function call interrupts"), 462 S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"), 463 S(IPI_CPU_STOP, "CPU stop interrupts"), 464 S(IPI_TIMER, "Timer broadcast interrupts"), 465 }; 466 467 void show_ipi_list(struct seq_file *p, int prec) 468 { 469 unsigned int cpu, i; 470 471 for (i = 0; i < NR_IPI; i++) { 472 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i + IPI_RESCHEDULE, 473 prec >= 4 ? " " : ""); 474 for_each_online_cpu(cpu) 475 seq_printf(p, "%10u ", 476 __get_irq_stat(cpu, ipi_irqs[i])); 477 seq_printf(p, " %s\n", ipi_types[i]); 478 } 479 } 480 481 u64 smp_irq_stat_cpu(unsigned int cpu) 482 { 483 u64 sum = 0; 484 int i; 485 486 for (i = 0; i < NR_IPI; i++) 487 sum += __get_irq_stat(cpu, ipi_irqs[i]); 488 489 return sum; 490 } 491 492 static DEFINE_RAW_SPINLOCK(stop_lock); 493 494 /* 495 * ipi_cpu_stop - handle IPI from smp_send_stop() 496 */ 497 static void ipi_cpu_stop(unsigned int cpu) 498 { 499 if (system_state == SYSTEM_BOOTING || 500 system_state == SYSTEM_RUNNING) { 501 raw_spin_lock(&stop_lock); 502 pr_crit("CPU%u: stopping\n", cpu); 503 dump_stack(); 504 raw_spin_unlock(&stop_lock); 505 } 506 507 set_cpu_online(cpu, false); 508 509 local_irq_disable(); 510 511 while (1) 512 cpu_relax(); 513 } 514 515 /* 516 * Main handler for inter-processor interrupts 517 */ 518 void handle_IPI(int ipinr, struct pt_regs *regs) 519 { 520 unsigned int cpu = smp_processor_id(); 521 struct pt_regs *old_regs = set_irq_regs(regs); 522 523 if (ipinr >= IPI_RESCHEDULE && ipinr < IPI_RESCHEDULE + NR_IPI) 524 __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_RESCHEDULE]); 525 526 switch (ipinr) { 527 case IPI_RESCHEDULE: 528 scheduler_ipi(); 529 break; 530 531 case IPI_CALL_FUNC: 532 irq_enter(); 533 generic_smp_call_function_interrupt(); 534 irq_exit(); 535 break; 536 537 case IPI_CALL_FUNC_SINGLE: 538 irq_enter(); 539 generic_smp_call_function_single_interrupt(); 540 irq_exit(); 541 break; 542 543 case IPI_CPU_STOP: 544 irq_enter(); 545 ipi_cpu_stop(cpu); 546 irq_exit(); 547 break; 548 549 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST 550 case IPI_TIMER: 551 irq_enter(); 552 tick_receive_broadcast(); 553 irq_exit(); 554 break; 555 #endif 556 557 default: 558 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr); 559 break; 560 } 561 set_irq_regs(old_regs); 562 } 563 564 void smp_send_reschedule(int cpu) 565 { 566 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); 567 } 568 569 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST 570 void tick_broadcast(const struct cpumask *mask) 571 { 572 smp_cross_call(mask, IPI_TIMER); 573 } 574 #endif 575 576 void smp_send_stop(void) 577 { 578 unsigned long timeout; 579 580 if (num_online_cpus() > 1) { 581 cpumask_t mask; 582 583 cpumask_copy(&mask, cpu_online_mask); 584 cpu_clear(smp_processor_id(), mask); 585 586 smp_cross_call(&mask, IPI_CPU_STOP); 587 } 588 589 /* Wait up to one second for other CPUs to stop */ 590 timeout = USEC_PER_SEC; 591 while (num_online_cpus() > 1 && timeout--) 592 udelay(1); 593 594 if (num_online_cpus() > 1) 595 pr_warning("SMP: failed to stop secondary CPUs\n"); 596 } 597 598 /* 599 * not supported here 600 */ 601 int setup_profiling_timer(unsigned int multiplier) 602 { 603 return -EINVAL; 604 } 605