1 /* 2 * SMP initialisation and IPI support 3 * Based on arch/arm/kernel/smp.c 4 * 5 * Copyright (C) 2012 ARM Ltd. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/spinlock.h> 23 #include <linux/sched.h> 24 #include <linux/interrupt.h> 25 #include <linux/cache.h> 26 #include <linux/profile.h> 27 #include <linux/errno.h> 28 #include <linux/mm.h> 29 #include <linux/err.h> 30 #include <linux/cpu.h> 31 #include <linux/smp.h> 32 #include <linux/seq_file.h> 33 #include <linux/irq.h> 34 #include <linux/percpu.h> 35 #include <linux/clockchips.h> 36 #include <linux/completion.h> 37 #include <linux/of.h> 38 39 #include <asm/atomic.h> 40 #include <asm/cacheflush.h> 41 #include <asm/cputype.h> 42 #include <asm/cpu_ops.h> 43 #include <asm/mmu_context.h> 44 #include <asm/pgtable.h> 45 #include <asm/pgalloc.h> 46 #include <asm/processor.h> 47 #include <asm/smp_plat.h> 48 #include <asm/sections.h> 49 #include <asm/tlbflush.h> 50 #include <asm/ptrace.h> 51 52 /* 53 * as from 2.5, kernels no longer have an init_tasks structure 54 * so we need some other way of telling a new secondary core 55 * where to place its SVC stack 56 */ 57 struct secondary_data secondary_data; 58 59 enum ipi_msg_type { 60 IPI_RESCHEDULE, 61 IPI_CALL_FUNC, 62 IPI_CALL_FUNC_SINGLE, 63 IPI_CPU_STOP, 64 }; 65 66 /* 67 * Boot a secondary CPU, and assign it the specified idle task. 68 * This also gives us the initial stack to use for this CPU. 69 */ 70 static int boot_secondary(unsigned int cpu, struct task_struct *idle) 71 { 72 if (cpu_ops[cpu]->cpu_boot) 73 return cpu_ops[cpu]->cpu_boot(cpu); 74 75 return -EOPNOTSUPP; 76 } 77 78 static DECLARE_COMPLETION(cpu_running); 79 80 int __cpu_up(unsigned int cpu, struct task_struct *idle) 81 { 82 int ret; 83 84 /* 85 * We need to tell the secondary core where to find its stack and the 86 * page tables. 87 */ 88 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; 89 __flush_dcache_area(&secondary_data, sizeof(secondary_data)); 90 91 /* 92 * Now bring the CPU into our world. 93 */ 94 ret = boot_secondary(cpu, idle); 95 if (ret == 0) { 96 /* 97 * CPU was successfully started, wait for it to come online or 98 * time out. 99 */ 100 wait_for_completion_timeout(&cpu_running, 101 msecs_to_jiffies(1000)); 102 103 if (!cpu_online(cpu)) { 104 pr_crit("CPU%u: failed to come online\n", cpu); 105 ret = -EIO; 106 } 107 } else { 108 pr_err("CPU%u: failed to boot: %d\n", cpu, ret); 109 } 110 111 secondary_data.stack = NULL; 112 113 return ret; 114 } 115 116 /* 117 * This is the secondary CPU boot entry. We're using this CPUs 118 * idle thread stack, but a set of temporary page tables. 119 */ 120 asmlinkage void secondary_start_kernel(void) 121 { 122 struct mm_struct *mm = &init_mm; 123 unsigned int cpu = smp_processor_id(); 124 125 printk("CPU%u: Booted secondary processor\n", cpu); 126 127 /* 128 * All kernel threads share the same mm context; grab a 129 * reference and switch to it. 130 */ 131 atomic_inc(&mm->mm_count); 132 current->active_mm = mm; 133 cpumask_set_cpu(cpu, mm_cpumask(mm)); 134 135 /* 136 * TTBR0 is only used for the identity mapping at this stage. Make it 137 * point to zero page to avoid speculatively fetching new entries. 138 */ 139 cpu_set_reserved_ttbr0(); 140 flush_tlb_all(); 141 142 preempt_disable(); 143 trace_hardirqs_off(); 144 145 if (cpu_ops[cpu]->cpu_postboot) 146 cpu_ops[cpu]->cpu_postboot(); 147 148 /* 149 * Enable GIC and timers. 150 */ 151 notify_cpu_starting(cpu); 152 153 /* 154 * OK, now it's safe to let the boot CPU continue. Wait for 155 * the CPU migration code to notice that the CPU is online 156 * before we continue. 157 */ 158 set_cpu_online(cpu, true); 159 complete(&cpu_running); 160 161 local_irq_enable(); 162 local_fiq_enable(); 163 local_async_enable(); 164 165 /* 166 * OK, it's off to the idle thread for us 167 */ 168 cpu_startup_entry(CPUHP_ONLINE); 169 } 170 171 #ifdef CONFIG_HOTPLUG_CPU 172 static int op_cpu_disable(unsigned int cpu) 173 { 174 /* 175 * If we don't have a cpu_die method, abort before we reach the point 176 * of no return. CPU0 may not have an cpu_ops, so test for it. 177 */ 178 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die) 179 return -EOPNOTSUPP; 180 181 /* 182 * We may need to abort a hot unplug for some other mechanism-specific 183 * reason. 184 */ 185 if (cpu_ops[cpu]->cpu_disable) 186 return cpu_ops[cpu]->cpu_disable(cpu); 187 188 return 0; 189 } 190 191 /* 192 * __cpu_disable runs on the processor to be shutdown. 193 */ 194 int __cpu_disable(void) 195 { 196 unsigned int cpu = smp_processor_id(); 197 int ret; 198 199 ret = op_cpu_disable(cpu); 200 if (ret) 201 return ret; 202 203 /* 204 * Take this CPU offline. Once we clear this, we can't return, 205 * and we must not schedule until we're ready to give up the cpu. 206 */ 207 set_cpu_online(cpu, false); 208 209 /* 210 * OK - migrate IRQs away from this CPU 211 */ 212 migrate_irqs(); 213 214 /* 215 * Remove this CPU from the vm mask set of all processes. 216 */ 217 clear_tasks_mm_cpumask(cpu); 218 219 return 0; 220 } 221 222 static DECLARE_COMPLETION(cpu_died); 223 224 /* 225 * called on the thread which is asking for a CPU to be shutdown - 226 * waits until shutdown has completed, or it is timed out. 227 */ 228 void __cpu_die(unsigned int cpu) 229 { 230 if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) { 231 pr_crit("CPU%u: cpu didn't die\n", cpu); 232 return; 233 } 234 pr_notice("CPU%u: shutdown\n", cpu); 235 } 236 237 /* 238 * Called from the idle thread for the CPU which has been shutdown. 239 * 240 * Note that we disable IRQs here, but do not re-enable them 241 * before returning to the caller. This is also the behaviour 242 * of the other hotplug-cpu capable cores, so presumably coming 243 * out of idle fixes this. 244 */ 245 void cpu_die(void) 246 { 247 unsigned int cpu = smp_processor_id(); 248 249 idle_task_exit(); 250 251 local_irq_disable(); 252 253 /* Tell __cpu_die() that this CPU is now safe to dispose of */ 254 complete(&cpu_died); 255 256 /* 257 * Actually shutdown the CPU. This must never fail. The specific hotplug 258 * mechanism must perform all required cache maintenance to ensure that 259 * no dirty lines are lost in the process of shutting down the CPU. 260 */ 261 cpu_ops[cpu]->cpu_die(cpu); 262 263 BUG(); 264 } 265 #endif 266 267 void __init smp_cpus_done(unsigned int max_cpus) 268 { 269 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus()); 270 } 271 272 void __init smp_prepare_boot_cpu(void) 273 { 274 } 275 276 static void (*smp_cross_call)(const struct cpumask *, unsigned int); 277 278 /* 279 * Enumerate the possible CPU set from the device tree and build the 280 * cpu logical map array containing MPIDR values related to logical 281 * cpus. Assumes that cpu_logical_map(0) has already been initialized. 282 */ 283 void __init smp_init_cpus(void) 284 { 285 struct device_node *dn = NULL; 286 unsigned int i, cpu = 1; 287 bool bootcpu_valid = false; 288 289 while ((dn = of_find_node_by_type(dn, "cpu"))) { 290 const u32 *cell; 291 u64 hwid; 292 293 /* 294 * A cpu node with missing "reg" property is 295 * considered invalid to build a cpu_logical_map 296 * entry. 297 */ 298 cell = of_get_property(dn, "reg", NULL); 299 if (!cell) { 300 pr_err("%s: missing reg property\n", dn->full_name); 301 goto next; 302 } 303 hwid = of_read_number(cell, of_n_addr_cells(dn)); 304 305 /* 306 * Non affinity bits must be set to 0 in the DT 307 */ 308 if (hwid & ~MPIDR_HWID_BITMASK) { 309 pr_err("%s: invalid reg property\n", dn->full_name); 310 goto next; 311 } 312 313 /* 314 * Duplicate MPIDRs are a recipe for disaster. Scan 315 * all initialized entries and check for 316 * duplicates. If any is found just ignore the cpu. 317 * cpu_logical_map was initialized to INVALID_HWID to 318 * avoid matching valid MPIDR values. 319 */ 320 for (i = 1; (i < cpu) && (i < NR_CPUS); i++) { 321 if (cpu_logical_map(i) == hwid) { 322 pr_err("%s: duplicate cpu reg properties in the DT\n", 323 dn->full_name); 324 goto next; 325 } 326 } 327 328 /* 329 * The numbering scheme requires that the boot CPU 330 * must be assigned logical id 0. Record it so that 331 * the logical map built from DT is validated and can 332 * be used. 333 */ 334 if (hwid == cpu_logical_map(0)) { 335 if (bootcpu_valid) { 336 pr_err("%s: duplicate boot cpu reg property in DT\n", 337 dn->full_name); 338 goto next; 339 } 340 341 bootcpu_valid = true; 342 343 /* 344 * cpu_logical_map has already been 345 * initialized and the boot cpu doesn't need 346 * the enable-method so continue without 347 * incrementing cpu. 348 */ 349 continue; 350 } 351 352 if (cpu >= NR_CPUS) 353 goto next; 354 355 if (cpu_read_ops(dn, cpu) != 0) 356 goto next; 357 358 if (cpu_ops[cpu]->cpu_init(dn, cpu)) 359 goto next; 360 361 pr_debug("cpu logical map 0x%llx\n", hwid); 362 cpu_logical_map(cpu) = hwid; 363 next: 364 cpu++; 365 } 366 367 /* sanity check */ 368 if (cpu > NR_CPUS) 369 pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n", 370 cpu, NR_CPUS); 371 372 if (!bootcpu_valid) { 373 pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n"); 374 return; 375 } 376 377 /* 378 * All the cpus that made it to the cpu_logical_map have been 379 * validated so set them as possible cpus. 380 */ 381 for (i = 0; i < NR_CPUS; i++) 382 if (cpu_logical_map(i) != INVALID_HWID) 383 set_cpu_possible(i, true); 384 } 385 386 void __init smp_prepare_cpus(unsigned int max_cpus) 387 { 388 int err; 389 unsigned int cpu, ncores = num_possible_cpus(); 390 391 /* 392 * are we trying to boot more cores than exist? 393 */ 394 if (max_cpus > ncores) 395 max_cpus = ncores; 396 397 /* Don't bother if we're effectively UP */ 398 if (max_cpus <= 1) 399 return; 400 401 /* 402 * Initialise the present map (which describes the set of CPUs 403 * actually populated at the present time) and release the 404 * secondaries from the bootloader. 405 * 406 * Make sure we online at most (max_cpus - 1) additional CPUs. 407 */ 408 max_cpus--; 409 for_each_possible_cpu(cpu) { 410 if (max_cpus == 0) 411 break; 412 413 if (cpu == smp_processor_id()) 414 continue; 415 416 if (!cpu_ops[cpu]) 417 continue; 418 419 err = cpu_ops[cpu]->cpu_prepare(cpu); 420 if (err) 421 continue; 422 423 set_cpu_present(cpu, true); 424 max_cpus--; 425 } 426 } 427 428 429 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) 430 { 431 smp_cross_call = fn; 432 } 433 434 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 435 { 436 smp_cross_call(mask, IPI_CALL_FUNC); 437 } 438 439 void arch_send_call_function_single_ipi(int cpu) 440 { 441 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); 442 } 443 444 static const char *ipi_types[NR_IPI] = { 445 #define S(x,s) [x - IPI_RESCHEDULE] = s 446 S(IPI_RESCHEDULE, "Rescheduling interrupts"), 447 S(IPI_CALL_FUNC, "Function call interrupts"), 448 S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"), 449 S(IPI_CPU_STOP, "CPU stop interrupts"), 450 }; 451 452 void show_ipi_list(struct seq_file *p, int prec) 453 { 454 unsigned int cpu, i; 455 456 for (i = 0; i < NR_IPI; i++) { 457 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i + IPI_RESCHEDULE, 458 prec >= 4 ? " " : ""); 459 for_each_online_cpu(cpu) 460 seq_printf(p, "%10u ", 461 __get_irq_stat(cpu, ipi_irqs[i])); 462 seq_printf(p, " %s\n", ipi_types[i]); 463 } 464 } 465 466 u64 smp_irq_stat_cpu(unsigned int cpu) 467 { 468 u64 sum = 0; 469 int i; 470 471 for (i = 0; i < NR_IPI; i++) 472 sum += __get_irq_stat(cpu, ipi_irqs[i]); 473 474 return sum; 475 } 476 477 static DEFINE_RAW_SPINLOCK(stop_lock); 478 479 /* 480 * ipi_cpu_stop - handle IPI from smp_send_stop() 481 */ 482 static void ipi_cpu_stop(unsigned int cpu) 483 { 484 if (system_state == SYSTEM_BOOTING || 485 system_state == SYSTEM_RUNNING) { 486 raw_spin_lock(&stop_lock); 487 pr_crit("CPU%u: stopping\n", cpu); 488 dump_stack(); 489 raw_spin_unlock(&stop_lock); 490 } 491 492 set_cpu_online(cpu, false); 493 494 local_fiq_disable(); 495 local_irq_disable(); 496 497 while (1) 498 cpu_relax(); 499 } 500 501 /* 502 * Main handler for inter-processor interrupts 503 */ 504 void handle_IPI(int ipinr, struct pt_regs *regs) 505 { 506 unsigned int cpu = smp_processor_id(); 507 struct pt_regs *old_regs = set_irq_regs(regs); 508 509 if (ipinr >= IPI_RESCHEDULE && ipinr < IPI_RESCHEDULE + NR_IPI) 510 __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_RESCHEDULE]); 511 512 switch (ipinr) { 513 case IPI_RESCHEDULE: 514 scheduler_ipi(); 515 break; 516 517 case IPI_CALL_FUNC: 518 irq_enter(); 519 generic_smp_call_function_interrupt(); 520 irq_exit(); 521 break; 522 523 case IPI_CALL_FUNC_SINGLE: 524 irq_enter(); 525 generic_smp_call_function_single_interrupt(); 526 irq_exit(); 527 break; 528 529 case IPI_CPU_STOP: 530 irq_enter(); 531 ipi_cpu_stop(cpu); 532 irq_exit(); 533 break; 534 535 default: 536 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr); 537 break; 538 } 539 set_irq_regs(old_regs); 540 } 541 542 void smp_send_reschedule(int cpu) 543 { 544 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); 545 } 546 547 void smp_send_stop(void) 548 { 549 unsigned long timeout; 550 551 if (num_online_cpus() > 1) { 552 cpumask_t mask; 553 554 cpumask_copy(&mask, cpu_online_mask); 555 cpu_clear(smp_processor_id(), mask); 556 557 smp_cross_call(&mask, IPI_CPU_STOP); 558 } 559 560 /* Wait up to one second for other CPUs to stop */ 561 timeout = USEC_PER_SEC; 562 while (num_online_cpus() > 1 && timeout--) 563 udelay(1); 564 565 if (num_online_cpus() > 1) 566 pr_warning("SMP: failed to stop secondary CPUs\n"); 567 } 568 569 /* 570 * not supported here 571 */ 572 int setup_profiling_timer(unsigned int multiplier) 573 { 574 return -EINVAL; 575 } 576