xref: /openbmc/linux/arch/arm64/kernel/smp.c (revision 161f4089)
1 /*
2  * SMP initialisation and IPI support
3  * Based on arch/arm/kernel/smp.c
4  *
5  * Copyright (C) 2012 ARM Ltd.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/spinlock.h>
23 #include <linux/sched.h>
24 #include <linux/interrupt.h>
25 #include <linux/cache.h>
26 #include <linux/profile.h>
27 #include <linux/errno.h>
28 #include <linux/mm.h>
29 #include <linux/err.h>
30 #include <linux/cpu.h>
31 #include <linux/smp.h>
32 #include <linux/seq_file.h>
33 #include <linux/irq.h>
34 #include <linux/percpu.h>
35 #include <linux/clockchips.h>
36 #include <linux/completion.h>
37 #include <linux/of.h>
38 
39 #include <asm/atomic.h>
40 #include <asm/cacheflush.h>
41 #include <asm/cputype.h>
42 #include <asm/cpu_ops.h>
43 #include <asm/mmu_context.h>
44 #include <asm/pgtable.h>
45 #include <asm/pgalloc.h>
46 #include <asm/processor.h>
47 #include <asm/smp_plat.h>
48 #include <asm/sections.h>
49 #include <asm/tlbflush.h>
50 #include <asm/ptrace.h>
51 
52 /*
53  * as from 2.5, kernels no longer have an init_tasks structure
54  * so we need some other way of telling a new secondary core
55  * where to place its SVC stack
56  */
57 struct secondary_data secondary_data;
58 
59 enum ipi_msg_type {
60 	IPI_RESCHEDULE,
61 	IPI_CALL_FUNC,
62 	IPI_CALL_FUNC_SINGLE,
63 	IPI_CPU_STOP,
64 };
65 
66 /*
67  * Boot a secondary CPU, and assign it the specified idle task.
68  * This also gives us the initial stack to use for this CPU.
69  */
70 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
71 {
72 	if (cpu_ops[cpu]->cpu_boot)
73 		return cpu_ops[cpu]->cpu_boot(cpu);
74 
75 	return -EOPNOTSUPP;
76 }
77 
78 static DECLARE_COMPLETION(cpu_running);
79 
80 int __cpu_up(unsigned int cpu, struct task_struct *idle)
81 {
82 	int ret;
83 
84 	/*
85 	 * We need to tell the secondary core where to find its stack and the
86 	 * page tables.
87 	 */
88 	secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
89 	__flush_dcache_area(&secondary_data, sizeof(secondary_data));
90 
91 	/*
92 	 * Now bring the CPU into our world.
93 	 */
94 	ret = boot_secondary(cpu, idle);
95 	if (ret == 0) {
96 		/*
97 		 * CPU was successfully started, wait for it to come online or
98 		 * time out.
99 		 */
100 		wait_for_completion_timeout(&cpu_running,
101 					    msecs_to_jiffies(1000));
102 
103 		if (!cpu_online(cpu)) {
104 			pr_crit("CPU%u: failed to come online\n", cpu);
105 			ret = -EIO;
106 		}
107 	} else {
108 		pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
109 	}
110 
111 	secondary_data.stack = NULL;
112 
113 	return ret;
114 }
115 
116 /*
117  * This is the secondary CPU boot entry.  We're using this CPUs
118  * idle thread stack, but a set of temporary page tables.
119  */
120 asmlinkage void secondary_start_kernel(void)
121 {
122 	struct mm_struct *mm = &init_mm;
123 	unsigned int cpu = smp_processor_id();
124 
125 	printk("CPU%u: Booted secondary processor\n", cpu);
126 
127 	/*
128 	 * All kernel threads share the same mm context; grab a
129 	 * reference and switch to it.
130 	 */
131 	atomic_inc(&mm->mm_count);
132 	current->active_mm = mm;
133 	cpumask_set_cpu(cpu, mm_cpumask(mm));
134 
135 	/*
136 	 * TTBR0 is only used for the identity mapping at this stage. Make it
137 	 * point to zero page to avoid speculatively fetching new entries.
138 	 */
139 	cpu_set_reserved_ttbr0();
140 	flush_tlb_all();
141 
142 	preempt_disable();
143 	trace_hardirqs_off();
144 
145 	if (cpu_ops[cpu]->cpu_postboot)
146 		cpu_ops[cpu]->cpu_postboot();
147 
148 	/*
149 	 * Enable GIC and timers.
150 	 */
151 	notify_cpu_starting(cpu);
152 
153 	/*
154 	 * OK, now it's safe to let the boot CPU continue.  Wait for
155 	 * the CPU migration code to notice that the CPU is online
156 	 * before we continue.
157 	 */
158 	set_cpu_online(cpu, true);
159 	complete(&cpu_running);
160 
161 	local_irq_enable();
162 	local_fiq_enable();
163 
164 	/*
165 	 * OK, it's off to the idle thread for us
166 	 */
167 	cpu_startup_entry(CPUHP_ONLINE);
168 }
169 
170 #ifdef CONFIG_HOTPLUG_CPU
171 static int op_cpu_disable(unsigned int cpu)
172 {
173 	/*
174 	 * If we don't have a cpu_die method, abort before we reach the point
175 	 * of no return. CPU0 may not have an cpu_ops, so test for it.
176 	 */
177 	if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
178 		return -EOPNOTSUPP;
179 
180 	/*
181 	 * We may need to abort a hot unplug for some other mechanism-specific
182 	 * reason.
183 	 */
184 	if (cpu_ops[cpu]->cpu_disable)
185 		return cpu_ops[cpu]->cpu_disable(cpu);
186 
187 	return 0;
188 }
189 
190 /*
191  * __cpu_disable runs on the processor to be shutdown.
192  */
193 int __cpu_disable(void)
194 {
195 	unsigned int cpu = smp_processor_id();
196 	int ret;
197 
198 	ret = op_cpu_disable(cpu);
199 	if (ret)
200 		return ret;
201 
202 	/*
203 	 * Take this CPU offline.  Once we clear this, we can't return,
204 	 * and we must not schedule until we're ready to give up the cpu.
205 	 */
206 	set_cpu_online(cpu, false);
207 
208 	/*
209 	 * OK - migrate IRQs away from this CPU
210 	 */
211 	migrate_irqs();
212 
213 	/*
214 	 * Remove this CPU from the vm mask set of all processes.
215 	 */
216 	clear_tasks_mm_cpumask(cpu);
217 
218 	return 0;
219 }
220 
221 static DECLARE_COMPLETION(cpu_died);
222 
223 /*
224  * called on the thread which is asking for a CPU to be shutdown -
225  * waits until shutdown has completed, or it is timed out.
226  */
227 void __cpu_die(unsigned int cpu)
228 {
229 	if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
230 		pr_crit("CPU%u: cpu didn't die\n", cpu);
231 		return;
232 	}
233 	pr_notice("CPU%u: shutdown\n", cpu);
234 }
235 
236 /*
237  * Called from the idle thread for the CPU which has been shutdown.
238  *
239  * Note that we disable IRQs here, but do not re-enable them
240  * before returning to the caller. This is also the behaviour
241  * of the other hotplug-cpu capable cores, so presumably coming
242  * out of idle fixes this.
243  */
244 void cpu_die(void)
245 {
246 	unsigned int cpu = smp_processor_id();
247 
248 	idle_task_exit();
249 
250 	local_irq_disable();
251 
252 	/* Tell __cpu_die() that this CPU is now safe to dispose of */
253 	complete(&cpu_died);
254 
255 	/*
256 	 * Actually shutdown the CPU. This must never fail. The specific hotplug
257 	 * mechanism must perform all required cache maintenance to ensure that
258 	 * no dirty lines are lost in the process of shutting down the CPU.
259 	 */
260 	cpu_ops[cpu]->cpu_die(cpu);
261 
262 	BUG();
263 }
264 #endif
265 
266 void __init smp_cpus_done(unsigned int max_cpus)
267 {
268 	pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
269 }
270 
271 void __init smp_prepare_boot_cpu(void)
272 {
273 }
274 
275 static void (*smp_cross_call)(const struct cpumask *, unsigned int);
276 
277 /*
278  * Enumerate the possible CPU set from the device tree and build the
279  * cpu logical map array containing MPIDR values related to logical
280  * cpus. Assumes that cpu_logical_map(0) has already been initialized.
281  */
282 void __init smp_init_cpus(void)
283 {
284 	struct device_node *dn = NULL;
285 	unsigned int i, cpu = 1;
286 	bool bootcpu_valid = false;
287 
288 	while ((dn = of_find_node_by_type(dn, "cpu"))) {
289 		const u32 *cell;
290 		u64 hwid;
291 
292 		/*
293 		 * A cpu node with missing "reg" property is
294 		 * considered invalid to build a cpu_logical_map
295 		 * entry.
296 		 */
297 		cell = of_get_property(dn, "reg", NULL);
298 		if (!cell) {
299 			pr_err("%s: missing reg property\n", dn->full_name);
300 			goto next;
301 		}
302 		hwid = of_read_number(cell, of_n_addr_cells(dn));
303 
304 		/*
305 		 * Non affinity bits must be set to 0 in the DT
306 		 */
307 		if (hwid & ~MPIDR_HWID_BITMASK) {
308 			pr_err("%s: invalid reg property\n", dn->full_name);
309 			goto next;
310 		}
311 
312 		/*
313 		 * Duplicate MPIDRs are a recipe for disaster. Scan
314 		 * all initialized entries and check for
315 		 * duplicates. If any is found just ignore the cpu.
316 		 * cpu_logical_map was initialized to INVALID_HWID to
317 		 * avoid matching valid MPIDR values.
318 		 */
319 		for (i = 1; (i < cpu) && (i < NR_CPUS); i++) {
320 			if (cpu_logical_map(i) == hwid) {
321 				pr_err("%s: duplicate cpu reg properties in the DT\n",
322 					dn->full_name);
323 				goto next;
324 			}
325 		}
326 
327 		/*
328 		 * The numbering scheme requires that the boot CPU
329 		 * must be assigned logical id 0. Record it so that
330 		 * the logical map built from DT is validated and can
331 		 * be used.
332 		 */
333 		if (hwid == cpu_logical_map(0)) {
334 			if (bootcpu_valid) {
335 				pr_err("%s: duplicate boot cpu reg property in DT\n",
336 					dn->full_name);
337 				goto next;
338 			}
339 
340 			bootcpu_valid = true;
341 
342 			/*
343 			 * cpu_logical_map has already been
344 			 * initialized and the boot cpu doesn't need
345 			 * the enable-method so continue without
346 			 * incrementing cpu.
347 			 */
348 			continue;
349 		}
350 
351 		if (cpu >= NR_CPUS)
352 			goto next;
353 
354 		if (cpu_read_ops(dn, cpu) != 0)
355 			goto next;
356 
357 		if (cpu_ops[cpu]->cpu_init(dn, cpu))
358 			goto next;
359 
360 		pr_debug("cpu logical map 0x%llx\n", hwid);
361 		cpu_logical_map(cpu) = hwid;
362 next:
363 		cpu++;
364 	}
365 
366 	/* sanity check */
367 	if (cpu > NR_CPUS)
368 		pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
369 			   cpu, NR_CPUS);
370 
371 	if (!bootcpu_valid) {
372 		pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
373 		return;
374 	}
375 
376 	/*
377 	 * All the cpus that made it to the cpu_logical_map have been
378 	 * validated so set them as possible cpus.
379 	 */
380 	for (i = 0; i < NR_CPUS; i++)
381 		if (cpu_logical_map(i) != INVALID_HWID)
382 			set_cpu_possible(i, true);
383 }
384 
385 void __init smp_prepare_cpus(unsigned int max_cpus)
386 {
387 	int err;
388 	unsigned int cpu, ncores = num_possible_cpus();
389 
390 	/*
391 	 * are we trying to boot more cores than exist?
392 	 */
393 	if (max_cpus > ncores)
394 		max_cpus = ncores;
395 
396 	/* Don't bother if we're effectively UP */
397 	if (max_cpus <= 1)
398 		return;
399 
400 	/*
401 	 * Initialise the present map (which describes the set of CPUs
402 	 * actually populated at the present time) and release the
403 	 * secondaries from the bootloader.
404 	 *
405 	 * Make sure we online at most (max_cpus - 1) additional CPUs.
406 	 */
407 	max_cpus--;
408 	for_each_possible_cpu(cpu) {
409 		if (max_cpus == 0)
410 			break;
411 
412 		if (cpu == smp_processor_id())
413 			continue;
414 
415 		if (!cpu_ops[cpu])
416 			continue;
417 
418 		err = cpu_ops[cpu]->cpu_prepare(cpu);
419 		if (err)
420 			continue;
421 
422 		set_cpu_present(cpu, true);
423 		max_cpus--;
424 	}
425 }
426 
427 
428 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
429 {
430 	smp_cross_call = fn;
431 }
432 
433 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
434 {
435 	smp_cross_call(mask, IPI_CALL_FUNC);
436 }
437 
438 void arch_send_call_function_single_ipi(int cpu)
439 {
440 	smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
441 }
442 
443 static const char *ipi_types[NR_IPI] = {
444 #define S(x,s)	[x - IPI_RESCHEDULE] = s
445 	S(IPI_RESCHEDULE, "Rescheduling interrupts"),
446 	S(IPI_CALL_FUNC, "Function call interrupts"),
447 	S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
448 	S(IPI_CPU_STOP, "CPU stop interrupts"),
449 };
450 
451 void show_ipi_list(struct seq_file *p, int prec)
452 {
453 	unsigned int cpu, i;
454 
455 	for (i = 0; i < NR_IPI; i++) {
456 		seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i + IPI_RESCHEDULE,
457 			   prec >= 4 ? " " : "");
458 		for_each_online_cpu(cpu)
459 			seq_printf(p, "%10u ",
460 				   __get_irq_stat(cpu, ipi_irqs[i]));
461 		seq_printf(p, "      %s\n", ipi_types[i]);
462 	}
463 }
464 
465 u64 smp_irq_stat_cpu(unsigned int cpu)
466 {
467 	u64 sum = 0;
468 	int i;
469 
470 	for (i = 0; i < NR_IPI; i++)
471 		sum += __get_irq_stat(cpu, ipi_irqs[i]);
472 
473 	return sum;
474 }
475 
476 static DEFINE_RAW_SPINLOCK(stop_lock);
477 
478 /*
479  * ipi_cpu_stop - handle IPI from smp_send_stop()
480  */
481 static void ipi_cpu_stop(unsigned int cpu)
482 {
483 	if (system_state == SYSTEM_BOOTING ||
484 	    system_state == SYSTEM_RUNNING) {
485 		raw_spin_lock(&stop_lock);
486 		pr_crit("CPU%u: stopping\n", cpu);
487 		dump_stack();
488 		raw_spin_unlock(&stop_lock);
489 	}
490 
491 	set_cpu_online(cpu, false);
492 
493 	local_fiq_disable();
494 	local_irq_disable();
495 
496 	while (1)
497 		cpu_relax();
498 }
499 
500 /*
501  * Main handler for inter-processor interrupts
502  */
503 void handle_IPI(int ipinr, struct pt_regs *regs)
504 {
505 	unsigned int cpu = smp_processor_id();
506 	struct pt_regs *old_regs = set_irq_regs(regs);
507 
508 	if (ipinr >= IPI_RESCHEDULE && ipinr < IPI_RESCHEDULE + NR_IPI)
509 		__inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_RESCHEDULE]);
510 
511 	switch (ipinr) {
512 	case IPI_RESCHEDULE:
513 		scheduler_ipi();
514 		break;
515 
516 	case IPI_CALL_FUNC:
517 		irq_enter();
518 		generic_smp_call_function_interrupt();
519 		irq_exit();
520 		break;
521 
522 	case IPI_CALL_FUNC_SINGLE:
523 		irq_enter();
524 		generic_smp_call_function_single_interrupt();
525 		irq_exit();
526 		break;
527 
528 	case IPI_CPU_STOP:
529 		irq_enter();
530 		ipi_cpu_stop(cpu);
531 		irq_exit();
532 		break;
533 
534 	default:
535 		pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
536 		break;
537 	}
538 	set_irq_regs(old_regs);
539 }
540 
541 void smp_send_reschedule(int cpu)
542 {
543 	smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
544 }
545 
546 void smp_send_stop(void)
547 {
548 	unsigned long timeout;
549 
550 	if (num_online_cpus() > 1) {
551 		cpumask_t mask;
552 
553 		cpumask_copy(&mask, cpu_online_mask);
554 		cpu_clear(smp_processor_id(), mask);
555 
556 		smp_cross_call(&mask, IPI_CPU_STOP);
557 	}
558 
559 	/* Wait up to one second for other CPUs to stop */
560 	timeout = USEC_PER_SEC;
561 	while (num_online_cpus() > 1 && timeout--)
562 		udelay(1);
563 
564 	if (num_online_cpus() > 1)
565 		pr_warning("SMP: failed to stop secondary CPUs\n");
566 }
567 
568 /*
569  * not supported here
570  */
571 int setup_profiling_timer(unsigned int multiplier)
572 {
573 	return -EINVAL;
574 }
575