xref: /openbmc/linux/arch/arm64/kernel/sleep.S (revision 83a530e1)
1/* SPDX-License-Identifier: GPL-2.0 */
2#include <linux/errno.h>
3#include <linux/linkage.h>
4#include <asm/asm-offsets.h>
5#include <asm/assembler.h>
6
7	.text
8/*
9 * Implementation of MPIDR_EL1 hash algorithm through shifting
10 * and OR'ing.
11 *
12 * @dst: register containing hash result
13 * @rs0: register containing affinity level 0 bit shift
14 * @rs1: register containing affinity level 1 bit shift
15 * @rs2: register containing affinity level 2 bit shift
16 * @rs3: register containing affinity level 3 bit shift
17 * @mpidr: register containing MPIDR_EL1 value
18 * @mask: register containing MPIDR mask
19 *
20 * Pseudo C-code:
21 *
22 *u32 dst;
23 *
24 *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 rs3, u64 mpidr, u64 mask) {
25 *	u32 aff0, aff1, aff2, aff3;
26 *	u64 mpidr_masked = mpidr & mask;
27 *	aff0 = mpidr_masked & 0xff;
28 *	aff1 = mpidr_masked & 0xff00;
29 *	aff2 = mpidr_masked & 0xff0000;
30 *	aff2 = mpidr_masked & 0xff00000000;
31 *	dst = (aff0 >> rs0 | aff1 >> rs1 | aff2 >> rs2 | aff3 >> rs3);
32 *}
33 * Input registers: rs0, rs1, rs2, rs3, mpidr, mask
34 * Output register: dst
35 * Note: input and output registers must be disjoint register sets
36         (eg: a macro instance with mpidr = x1 and dst = x1 is invalid)
37 */
38	.macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
39	and	\mpidr, \mpidr, \mask		// mask out MPIDR bits
40	and	\dst, \mpidr, #0xff		// mask=aff0
41	lsr	\dst ,\dst, \rs0		// dst=aff0>>rs0
42	and	\mask, \mpidr, #0xff00		// mask = aff1
43	lsr	\mask ,\mask, \rs1
44	orr	\dst, \dst, \mask		// dst|=(aff1>>rs1)
45	and	\mask, \mpidr, #0xff0000	// mask = aff2
46	lsr	\mask ,\mask, \rs2
47	orr	\dst, \dst, \mask		// dst|=(aff2>>rs2)
48	and	\mask, \mpidr, #0xff00000000	// mask = aff3
49	lsr	\mask ,\mask, \rs3
50	orr	\dst, \dst, \mask		// dst|=(aff3>>rs3)
51	.endm
52/*
53 * Save CPU state in the provided sleep_stack_data area, and publish its
54 * location for cpu_resume()'s use in sleep_save_stash.
55 *
56 * cpu_resume() will restore this saved state, and return. Because the
57 * link-register is saved and restored, it will appear to return from this
58 * function. So that the caller can tell the suspend/resume paths apart,
59 * __cpu_suspend_enter() will always return a non-zero value, whereas the
60 * path through cpu_resume() will return 0.
61 *
62 *  x0 = struct sleep_stack_data area
63 */
64ENTRY(__cpu_suspend_enter)
65	stp	x29, lr, [x0, #SLEEP_STACK_DATA_CALLEE_REGS]
66	stp	x19, x20, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+16]
67	stp	x21, x22, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+32]
68	stp	x23, x24, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+48]
69	stp	x25, x26, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+64]
70	stp	x27, x28, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+80]
71
72	/* save the sp in cpu_suspend_ctx */
73	mov	x2, sp
74	str	x2, [x0, #SLEEP_STACK_DATA_SYSTEM_REGS + CPU_CTX_SP]
75
76	/* find the mpidr_hash */
77	ldr_l	x1, sleep_save_stash
78	mrs	x7, mpidr_el1
79	adr_l	x9, mpidr_hash
80	ldr	x10, [x9, #MPIDR_HASH_MASK]
81	/*
82	 * Following code relies on the struct mpidr_hash
83	 * members size.
84	 */
85	ldp	w3, w4, [x9, #MPIDR_HASH_SHIFTS]
86	ldp	w5, w6, [x9, #(MPIDR_HASH_SHIFTS + 8)]
87	compute_mpidr_hash x8, x3, x4, x5, x6, x7, x10
88	add	x1, x1, x8, lsl #3
89
90	str	x0, [x1]
91	add	x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
92	stp	x29, lr, [sp, #-16]!
93	bl	cpu_do_suspend
94	ldp	x29, lr, [sp], #16
95	mov	x0, #1
96	ret
97ENDPROC(__cpu_suspend_enter)
98
99	.pushsection ".idmap.text", "awx"
100ENTRY(cpu_resume)
101	bl	el2_setup		// if in EL2 drop to EL1 cleanly
102	bl	__cpu_setup
103	/* enable the MMU early - so we can access sleep_save_stash by va */
104	bl	__enable_mmu
105	ldr	x8, =_cpu_resume
106	br	x8
107ENDPROC(cpu_resume)
108	.ltorg
109	.popsection
110
111ENTRY(_cpu_resume)
112	mrs	x1, mpidr_el1
113	adr_l	x8, mpidr_hash		// x8 = struct mpidr_hash virt address
114
115	/* retrieve mpidr_hash members to compute the hash */
116	ldr	x2, [x8, #MPIDR_HASH_MASK]
117	ldp	w3, w4, [x8, #MPIDR_HASH_SHIFTS]
118	ldp	w5, w6, [x8, #(MPIDR_HASH_SHIFTS + 8)]
119	compute_mpidr_hash x7, x3, x4, x5, x6, x1, x2
120
121	/* x7 contains hash index, let's use it to grab context pointer */
122	ldr_l	x0, sleep_save_stash
123	ldr	x0, [x0, x7, lsl #3]
124	add	x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
125	add	x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
126	/* load sp from context */
127	ldr	x2, [x0, #CPU_CTX_SP]
128	mov	sp, x2
129	/*
130	 * cpu_do_resume expects x0 to contain context address pointer
131	 */
132	bl	cpu_do_resume
133
134#ifdef CONFIG_KASAN
135	mov	x0, sp
136	bl	kasan_unpoison_task_stack_below
137#endif
138
139	ldp	x19, x20, [x29, #16]
140	ldp	x21, x22, [x29, #32]
141	ldp	x23, x24, [x29, #48]
142	ldp	x25, x26, [x29, #64]
143	ldp	x27, x28, [x29, #80]
144	ldp	x29, lr, [x29]
145	mov	x0, #0
146	ret
147ENDPROC(_cpu_resume)
148