195322526SLorenzo Pieralisi#include <linux/errno.h> 295322526SLorenzo Pieralisi#include <linux/linkage.h> 395322526SLorenzo Pieralisi#include <asm/asm-offsets.h> 495322526SLorenzo Pieralisi#include <asm/assembler.h> 595322526SLorenzo Pieralisi 695322526SLorenzo Pieralisi .text 795322526SLorenzo Pieralisi/* 895322526SLorenzo Pieralisi * Implementation of MPIDR_EL1 hash algorithm through shifting 995322526SLorenzo Pieralisi * and OR'ing. 1095322526SLorenzo Pieralisi * 1195322526SLorenzo Pieralisi * @dst: register containing hash result 1295322526SLorenzo Pieralisi * @rs0: register containing affinity level 0 bit shift 1395322526SLorenzo Pieralisi * @rs1: register containing affinity level 1 bit shift 1495322526SLorenzo Pieralisi * @rs2: register containing affinity level 2 bit shift 1595322526SLorenzo Pieralisi * @rs3: register containing affinity level 3 bit shift 1695322526SLorenzo Pieralisi * @mpidr: register containing MPIDR_EL1 value 1795322526SLorenzo Pieralisi * @mask: register containing MPIDR mask 1895322526SLorenzo Pieralisi * 1995322526SLorenzo Pieralisi * Pseudo C-code: 2095322526SLorenzo Pieralisi * 2195322526SLorenzo Pieralisi *u32 dst; 2295322526SLorenzo Pieralisi * 2395322526SLorenzo Pieralisi *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 rs3, u64 mpidr, u64 mask) { 2495322526SLorenzo Pieralisi * u32 aff0, aff1, aff2, aff3; 2595322526SLorenzo Pieralisi * u64 mpidr_masked = mpidr & mask; 2695322526SLorenzo Pieralisi * aff0 = mpidr_masked & 0xff; 2795322526SLorenzo Pieralisi * aff1 = mpidr_masked & 0xff00; 2895322526SLorenzo Pieralisi * aff2 = mpidr_masked & 0xff0000; 2995322526SLorenzo Pieralisi * aff2 = mpidr_masked & 0xff00000000; 3095322526SLorenzo Pieralisi * dst = (aff0 >> rs0 | aff1 >> rs1 | aff2 >> rs2 | aff3 >> rs3); 3195322526SLorenzo Pieralisi *} 3295322526SLorenzo Pieralisi * Input registers: rs0, rs1, rs2, rs3, mpidr, mask 3395322526SLorenzo Pieralisi * Output register: dst 3495322526SLorenzo Pieralisi * Note: input and output registers must be disjoint register sets 3595322526SLorenzo Pieralisi (eg: a macro instance with mpidr = x1 and dst = x1 is invalid) 3695322526SLorenzo Pieralisi */ 3795322526SLorenzo Pieralisi .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask 3895322526SLorenzo Pieralisi and \mpidr, \mpidr, \mask // mask out MPIDR bits 3995322526SLorenzo Pieralisi and \dst, \mpidr, #0xff // mask=aff0 4095322526SLorenzo Pieralisi lsr \dst ,\dst, \rs0 // dst=aff0>>rs0 4195322526SLorenzo Pieralisi and \mask, \mpidr, #0xff00 // mask = aff1 4295322526SLorenzo Pieralisi lsr \mask ,\mask, \rs1 4395322526SLorenzo Pieralisi orr \dst, \dst, \mask // dst|=(aff1>>rs1) 4495322526SLorenzo Pieralisi and \mask, \mpidr, #0xff0000 // mask = aff2 4595322526SLorenzo Pieralisi lsr \mask ,\mask, \rs2 4695322526SLorenzo Pieralisi orr \dst, \dst, \mask // dst|=(aff2>>rs2) 4795322526SLorenzo Pieralisi and \mask, \mpidr, #0xff00000000 // mask = aff3 4895322526SLorenzo Pieralisi lsr \mask ,\mask, \rs3 4995322526SLorenzo Pieralisi orr \dst, \dst, \mask // dst|=(aff3>>rs3) 5095322526SLorenzo Pieralisi .endm 5195322526SLorenzo Pieralisi/* 52714f5992SLorenzo Pieralisi * Save CPU state for a suspend and execute the suspend finisher. 53714f5992SLorenzo Pieralisi * On success it will return 0 through cpu_resume - ie through a CPU 54714f5992SLorenzo Pieralisi * soft/hard reboot from the reset vector. 55714f5992SLorenzo Pieralisi * On failure it returns the suspend finisher return value or force 56714f5992SLorenzo Pieralisi * -EOPNOTSUPP if the finisher erroneously returns 0 (the suspend finisher 57714f5992SLorenzo Pieralisi * is not allowed to return, if it does this must be considered failure). 58714f5992SLorenzo Pieralisi * It saves callee registers, and allocates space on the kernel stack 59714f5992SLorenzo Pieralisi * to save the CPU specific registers + some other data for resume. 6095322526SLorenzo Pieralisi * 6195322526SLorenzo Pieralisi * x0 = suspend finisher argument 62714f5992SLorenzo Pieralisi * x1 = suspend finisher function pointer 6395322526SLorenzo Pieralisi */ 64714f5992SLorenzo PieralisiENTRY(__cpu_suspend_enter) 6595322526SLorenzo Pieralisi stp x29, lr, [sp, #-96]! 6695322526SLorenzo Pieralisi stp x19, x20, [sp,#16] 6795322526SLorenzo Pieralisi stp x21, x22, [sp,#32] 6895322526SLorenzo Pieralisi stp x23, x24, [sp,#48] 6995322526SLorenzo Pieralisi stp x25, x26, [sp,#64] 7095322526SLorenzo Pieralisi stp x27, x28, [sp,#80] 71714f5992SLorenzo Pieralisi /* 72714f5992SLorenzo Pieralisi * Stash suspend finisher and its argument in x20 and x19 73714f5992SLorenzo Pieralisi */ 74714f5992SLorenzo Pieralisi mov x19, x0 75714f5992SLorenzo Pieralisi mov x20, x1 7695322526SLorenzo Pieralisi mov x2, sp 7795322526SLorenzo Pieralisi sub sp, sp, #CPU_SUSPEND_SZ // allocate cpu_suspend_ctx 78714f5992SLorenzo Pieralisi mov x0, sp 7995322526SLorenzo Pieralisi /* 80714f5992SLorenzo Pieralisi * x0 now points to struct cpu_suspend_ctx allocated on the stack 8195322526SLorenzo Pieralisi */ 82714f5992SLorenzo Pieralisi str x2, [x0, #CPU_CTX_SP] 83714f5992SLorenzo Pieralisi ldr x1, =sleep_save_sp 84714f5992SLorenzo Pieralisi ldr x1, [x1, #SLEEP_SAVE_SP_VIRT] 8595322526SLorenzo Pieralisi mrs x7, mpidr_el1 8695322526SLorenzo Pieralisi ldr x9, =mpidr_hash 8795322526SLorenzo Pieralisi ldr x10, [x9, #MPIDR_HASH_MASK] 8895322526SLorenzo Pieralisi /* 8995322526SLorenzo Pieralisi * Following code relies on the struct mpidr_hash 9095322526SLorenzo Pieralisi * members size. 9195322526SLorenzo Pieralisi */ 9295322526SLorenzo Pieralisi ldp w3, w4, [x9, #MPIDR_HASH_SHIFTS] 9395322526SLorenzo Pieralisi ldp w5, w6, [x9, #(MPIDR_HASH_SHIFTS + 8)] 9495322526SLorenzo Pieralisi compute_mpidr_hash x8, x3, x4, x5, x6, x7, x10 95714f5992SLorenzo Pieralisi add x1, x1, x8, lsl #3 96714f5992SLorenzo Pieralisi bl __cpu_suspend_save 9795322526SLorenzo Pieralisi /* 98714f5992SLorenzo Pieralisi * Grab suspend finisher in x20 and its argument in x19 99714f5992SLorenzo Pieralisi */ 100714f5992SLorenzo Pieralisi mov x0, x19 101714f5992SLorenzo Pieralisi mov x1, x20 102714f5992SLorenzo Pieralisi /* 103714f5992SLorenzo Pieralisi * We are ready for power down, fire off the suspend finisher 104714f5992SLorenzo Pieralisi * in x1, with argument in x0 105714f5992SLorenzo Pieralisi */ 106714f5992SLorenzo Pieralisi blr x1 107714f5992SLorenzo Pieralisi /* 108714f5992SLorenzo Pieralisi * Never gets here, unless suspend finisher fails. 10995322526SLorenzo Pieralisi * Successful cpu_suspend should return from cpu_resume, returning 11095322526SLorenzo Pieralisi * through this code path is considered an error 11195322526SLorenzo Pieralisi * If the return value is set to 0 force x0 = -EOPNOTSUPP 11295322526SLorenzo Pieralisi * to make sure a proper error condition is propagated 11395322526SLorenzo Pieralisi */ 11495322526SLorenzo Pieralisi cmp x0, #0 11595322526SLorenzo Pieralisi mov x3, #-EOPNOTSUPP 11695322526SLorenzo Pieralisi csel x0, x3, x0, eq 11795322526SLorenzo Pieralisi add sp, sp, #CPU_SUSPEND_SZ // rewind stack pointer 11895322526SLorenzo Pieralisi ldp x19, x20, [sp, #16] 11995322526SLorenzo Pieralisi ldp x21, x22, [sp, #32] 12095322526SLorenzo Pieralisi ldp x23, x24, [sp, #48] 12195322526SLorenzo Pieralisi ldp x25, x26, [sp, #64] 12295322526SLorenzo Pieralisi ldp x27, x28, [sp, #80] 12395322526SLorenzo Pieralisi ldp x29, lr, [sp], #96 12495322526SLorenzo Pieralisi ret 125714f5992SLorenzo PieralisiENDPROC(__cpu_suspend_enter) 12695322526SLorenzo Pieralisi .ltorg 12795322526SLorenzo Pieralisi 12895322526SLorenzo Pieralisi/* 12995322526SLorenzo Pieralisi * x0 must contain the sctlr value retrieved from restored context 13095322526SLorenzo Pieralisi */ 1315dfe9d7dSArd Biesheuvel .pushsection ".idmap.text", "ax" 13295322526SLorenzo PieralisiENTRY(cpu_resume_mmu) 13395322526SLorenzo Pieralisi ldr x3, =cpu_resume_after_mmu 13495322526SLorenzo Pieralisi msr sctlr_el1, x0 // restore sctlr_el1 13595322526SLorenzo Pieralisi isb 1368ec41987SWill Deacon /* 1378ec41987SWill Deacon * Invalidate the local I-cache so that any instructions fetched 1388ec41987SWill Deacon * speculatively from the PoC are discarded, since they may have 1398ec41987SWill Deacon * been dynamically patched at the PoU. 1408ec41987SWill Deacon */ 1418ec41987SWill Deacon ic iallu 1428ec41987SWill Deacon dsb nsh 1438ec41987SWill Deacon isb 14495322526SLorenzo Pieralisi br x3 // global jump to virtual address 14595322526SLorenzo PieralisiENDPROC(cpu_resume_mmu) 1465dfe9d7dSArd Biesheuvel .popsection 14795322526SLorenzo Pieralisicpu_resume_after_mmu: 14895322526SLorenzo Pieralisi mov x0, #0 // return zero on success 14995322526SLorenzo Pieralisi ldp x19, x20, [sp, #16] 15095322526SLorenzo Pieralisi ldp x21, x22, [sp, #32] 15195322526SLorenzo Pieralisi ldp x23, x24, [sp, #48] 15295322526SLorenzo Pieralisi ldp x25, x26, [sp, #64] 15395322526SLorenzo Pieralisi ldp x27, x28, [sp, #80] 15495322526SLorenzo Pieralisi ldp x29, lr, [sp], #96 15595322526SLorenzo Pieralisi ret 15695322526SLorenzo PieralisiENDPROC(cpu_resume_after_mmu) 15795322526SLorenzo Pieralisi 15895322526SLorenzo PieralisiENTRY(cpu_resume) 15995322526SLorenzo Pieralisi bl el2_setup // if in EL2 drop to EL1 cleanly 16095322526SLorenzo Pieralisi mrs x1, mpidr_el1 161c3684fbbSLaura Abbott adrp x8, mpidr_hash 162c3684fbbSLaura Abbott add x8, x8, #:lo12:mpidr_hash // x8 = struct mpidr_hash phys address 16395322526SLorenzo Pieralisi /* retrieve mpidr_hash members to compute the hash */ 16495322526SLorenzo Pieralisi ldr x2, [x8, #MPIDR_HASH_MASK] 16595322526SLorenzo Pieralisi ldp w3, w4, [x8, #MPIDR_HASH_SHIFTS] 16695322526SLorenzo Pieralisi ldp w5, w6, [x8, #(MPIDR_HASH_SHIFTS + 8)] 16795322526SLorenzo Pieralisi compute_mpidr_hash x7, x3, x4, x5, x6, x1, x2 16895322526SLorenzo Pieralisi /* x7 contains hash index, let's use it to grab context pointer */ 1699acdc2afSArd Biesheuvel ldr_l x0, sleep_save_sp + SLEEP_SAVE_SP_PHYS 17095322526SLorenzo Pieralisi ldr x0, [x0, x7, lsl #3] 17195322526SLorenzo Pieralisi /* load sp from context */ 17295322526SLorenzo Pieralisi ldr x2, [x0, #CPU_CTX_SP] 17395322526SLorenzo Pieralisi /* load physical address of identity map page table in x1 */ 1749acdc2afSArd Biesheuvel adrp x1, idmap_pg_dir 17595322526SLorenzo Pieralisi mov sp, x2 17695322526SLorenzo Pieralisi /* 17795322526SLorenzo Pieralisi * cpu_do_resume expects x0 to contain context physical address 17895322526SLorenzo Pieralisi * pointer and x1 to contain physical address of 1:1 page tables 17995322526SLorenzo Pieralisi */ 18095322526SLorenzo Pieralisi bl cpu_do_resume // PC relative jump, MMU off 18195322526SLorenzo Pieralisi b cpu_resume_mmu // Resume MMU, never returns 18295322526SLorenzo PieralisiENDPROC(cpu_resume) 183