1 /* 2 * Based on arch/arm/kernel/setup.c 3 * 4 * Copyright (C) 1995-2001 Russell King 5 * Copyright (C) 2012 ARM Ltd. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include <linux/export.h> 21 #include <linux/kernel.h> 22 #include <linux/stddef.h> 23 #include <linux/ioport.h> 24 #include <linux/delay.h> 25 #include <linux/utsname.h> 26 #include <linux/initrd.h> 27 #include <linux/console.h> 28 #include <linux/bootmem.h> 29 #include <linux/seq_file.h> 30 #include <linux/screen_info.h> 31 #include <linux/init.h> 32 #include <linux/kexec.h> 33 #include <linux/crash_dump.h> 34 #include <linux/root_dev.h> 35 #include <linux/clk-provider.h> 36 #include <linux/cpu.h> 37 #include <linux/interrupt.h> 38 #include <linux/smp.h> 39 #include <linux/fs.h> 40 #include <linux/proc_fs.h> 41 #include <linux/memblock.h> 42 #include <linux/of_fdt.h> 43 #include <linux/of_platform.h> 44 45 #include <asm/cputype.h> 46 #include <asm/elf.h> 47 #include <asm/cputable.h> 48 #include <asm/cpu_ops.h> 49 #include <asm/sections.h> 50 #include <asm/setup.h> 51 #include <asm/smp_plat.h> 52 #include <asm/cacheflush.h> 53 #include <asm/tlbflush.h> 54 #include <asm/traps.h> 55 #include <asm/memblock.h> 56 #include <asm/psci.h> 57 58 unsigned int processor_id; 59 EXPORT_SYMBOL(processor_id); 60 61 unsigned long elf_hwcap __read_mostly; 62 EXPORT_SYMBOL_GPL(elf_hwcap); 63 64 #ifdef CONFIG_COMPAT 65 #define COMPAT_ELF_HWCAP_DEFAULT \ 66 (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\ 67 COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\ 68 COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\ 69 COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\ 70 COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV) 71 unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT; 72 #endif 73 74 static const char *cpu_name; 75 static const char *machine_name; 76 phys_addr_t __fdt_pointer __initdata; 77 78 /* 79 * Standard memory resources 80 */ 81 static struct resource mem_res[] = { 82 { 83 .name = "Kernel code", 84 .start = 0, 85 .end = 0, 86 .flags = IORESOURCE_MEM 87 }, 88 { 89 .name = "Kernel data", 90 .start = 0, 91 .end = 0, 92 .flags = IORESOURCE_MEM 93 } 94 }; 95 96 #define kernel_code mem_res[0] 97 #define kernel_data mem_res[1] 98 99 void __init early_print(const char *str, ...) 100 { 101 char buf[256]; 102 va_list ap; 103 104 va_start(ap, str); 105 vsnprintf(buf, sizeof(buf), str, ap); 106 va_end(ap); 107 108 printk("%s", buf); 109 } 110 111 bool arch_match_cpu_phys_id(int cpu, u64 phys_id) 112 { 113 return phys_id == cpu_logical_map(cpu); 114 } 115 116 static void __init setup_processor(void) 117 { 118 struct cpu_info *cpu_info; 119 120 /* 121 * locate processor in the list of supported processor 122 * types. The linker builds this table for us from the 123 * entries in arch/arm/mm/proc.S 124 */ 125 cpu_info = lookup_processor_type(read_cpuid_id()); 126 if (!cpu_info) { 127 printk("CPU configuration botched (ID %08x), unable to continue.\n", 128 read_cpuid_id()); 129 while (1); 130 } 131 132 cpu_name = cpu_info->cpu_name; 133 134 printk("CPU: %s [%08x] revision %d\n", 135 cpu_name, read_cpuid_id(), read_cpuid_id() & 15); 136 137 sprintf(init_utsname()->machine, ELF_PLATFORM); 138 elf_hwcap = 0; 139 } 140 141 static void __init setup_machine_fdt(phys_addr_t dt_phys) 142 { 143 if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys))) { 144 early_print("\n" 145 "Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n" 146 "The dtb must be 8-byte aligned and passed in the first 512MB of memory\n" 147 "\nPlease check your bootloader.\n", 148 dt_phys, phys_to_virt(dt_phys)); 149 150 while (true) 151 cpu_relax(); 152 } 153 154 machine_name = of_flat_dt_get_machine_name(); 155 } 156 157 /* 158 * Limit the memory size that was specified via FDT. 159 */ 160 static int __init early_mem(char *p) 161 { 162 phys_addr_t limit; 163 164 if (!p) 165 return 1; 166 167 limit = memparse(p, &p) & PAGE_MASK; 168 pr_notice("Memory limited to %lldMB\n", limit >> 20); 169 170 memblock_enforce_memory_limit(limit); 171 172 return 0; 173 } 174 early_param("mem", early_mem); 175 176 static void __init request_standard_resources(void) 177 { 178 struct memblock_region *region; 179 struct resource *res; 180 181 kernel_code.start = virt_to_phys(_text); 182 kernel_code.end = virt_to_phys(_etext - 1); 183 kernel_data.start = virt_to_phys(_sdata); 184 kernel_data.end = virt_to_phys(_end - 1); 185 186 for_each_memblock(memory, region) { 187 res = alloc_bootmem_low(sizeof(*res)); 188 res->name = "System RAM"; 189 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region)); 190 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1; 191 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; 192 193 request_resource(&iomem_resource, res); 194 195 if (kernel_code.start >= res->start && 196 kernel_code.end <= res->end) 197 request_resource(res, &kernel_code); 198 if (kernel_data.start >= res->start && 199 kernel_data.end <= res->end) 200 request_resource(res, &kernel_data); 201 } 202 } 203 204 u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID }; 205 206 void __init setup_arch(char **cmdline_p) 207 { 208 /* 209 * Unmask asynchronous aborts early to catch possible system errors. 210 */ 211 local_async_enable(); 212 213 setup_processor(); 214 215 setup_machine_fdt(__fdt_pointer); 216 217 init_mm.start_code = (unsigned long) _text; 218 init_mm.end_code = (unsigned long) _etext; 219 init_mm.end_data = (unsigned long) _edata; 220 init_mm.brk = (unsigned long) _end; 221 222 *cmdline_p = boot_command_line; 223 224 parse_early_param(); 225 226 arm64_memblock_init(); 227 228 paging_init(); 229 request_standard_resources(); 230 231 unflatten_device_tree(); 232 233 psci_init(); 234 235 cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; 236 cpu_read_bootcpu_ops(); 237 #ifdef CONFIG_SMP 238 smp_init_cpus(); 239 #endif 240 241 #ifdef CONFIG_VT 242 #if defined(CONFIG_VGA_CONSOLE) 243 conswitchp = &vga_con; 244 #elif defined(CONFIG_DUMMY_CONSOLE) 245 conswitchp = &dummy_con; 246 #endif 247 #endif 248 } 249 250 static int __init arm64_device_init(void) 251 { 252 of_clk_init(NULL); 253 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 254 return 0; 255 } 256 arch_initcall(arm64_device_init); 257 258 static DEFINE_PER_CPU(struct cpu, cpu_data); 259 260 static int __init topology_init(void) 261 { 262 int i; 263 264 for_each_possible_cpu(i) { 265 struct cpu *cpu = &per_cpu(cpu_data, i); 266 cpu->hotpluggable = 1; 267 register_cpu(cpu, i); 268 } 269 270 return 0; 271 } 272 subsys_initcall(topology_init); 273 274 static const char *hwcap_str[] = { 275 "fp", 276 "asimd", 277 "evtstrm", 278 NULL 279 }; 280 281 static int c_show(struct seq_file *m, void *v) 282 { 283 int i; 284 285 seq_printf(m, "Processor\t: %s rev %d (%s)\n", 286 cpu_name, read_cpuid_id() & 15, ELF_PLATFORM); 287 288 for_each_online_cpu(i) { 289 /* 290 * glibc reads /proc/cpuinfo to determine the number of 291 * online processors, looking for lines beginning with 292 * "processor". Give glibc what it expects. 293 */ 294 #ifdef CONFIG_SMP 295 seq_printf(m, "processor\t: %d\n", i); 296 #endif 297 } 298 299 /* dump out the processor features */ 300 seq_puts(m, "Features\t: "); 301 302 for (i = 0; hwcap_str[i]; i++) 303 if (elf_hwcap & (1 << i)) 304 seq_printf(m, "%s ", hwcap_str[i]); 305 306 seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24); 307 seq_printf(m, "CPU architecture: AArch64\n"); 308 seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15); 309 seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff); 310 seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15); 311 312 seq_puts(m, "\n"); 313 314 seq_printf(m, "Hardware\t: %s\n", machine_name); 315 316 return 0; 317 } 318 319 static void *c_start(struct seq_file *m, loff_t *pos) 320 { 321 return *pos < 1 ? (void *)1 : NULL; 322 } 323 324 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 325 { 326 ++*pos; 327 return NULL; 328 } 329 330 static void c_stop(struct seq_file *m, void *v) 331 { 332 } 333 334 const struct seq_operations cpuinfo_op = { 335 .start = c_start, 336 .next = c_next, 337 .stop = c_stop, 338 .show = c_show 339 }; 340