1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
29703d9d7SCatalin Marinas /*
39703d9d7SCatalin Marinas * Based on arch/arm/kernel/setup.c
49703d9d7SCatalin Marinas *
59703d9d7SCatalin Marinas * Copyright (C) 1995-2001 Russell King
69703d9d7SCatalin Marinas * Copyright (C) 2012 ARM Ltd.
79703d9d7SCatalin Marinas */
89703d9d7SCatalin Marinas
937655163SAl Stone #include <linux/acpi.h>
109703d9d7SCatalin Marinas #include <linux/export.h>
119703d9d7SCatalin Marinas #include <linux/kernel.h>
129703d9d7SCatalin Marinas #include <linux/stddef.h>
139703d9d7SCatalin Marinas #include <linux/ioport.h>
149703d9d7SCatalin Marinas #include <linux/delay.h>
159703d9d7SCatalin Marinas #include <linux/initrd.h>
169703d9d7SCatalin Marinas #include <linux/console.h>
17a41dc0e8SCatalin Marinas #include <linux/cache.h>
189703d9d7SCatalin Marinas #include <linux/screen_info.h>
199703d9d7SCatalin Marinas #include <linux/init.h>
209703d9d7SCatalin Marinas #include <linux/kexec.h>
219703d9d7SCatalin Marinas #include <linux/root_dev.h>
229703d9d7SCatalin Marinas #include <linux/cpu.h>
239703d9d7SCatalin Marinas #include <linux/interrupt.h>
249703d9d7SCatalin Marinas #include <linux/smp.h>
259703d9d7SCatalin Marinas #include <linux/fs.h>
26f39650deSAndy Shevchenko #include <linux/panic_notifier.h>
279703d9d7SCatalin Marinas #include <linux/proc_fs.h>
289703d9d7SCatalin Marinas #include <linux/memblock.h>
299703d9d7SCatalin Marinas #include <linux/of_fdt.h>
30f84d0275SMark Salter #include <linux/efi.h>
31bff60792SMark Rutland #include <linux/psci.h>
329164bb4aSIngo Molnar #include <linux/sched/task.h>
333b619e22SArd Biesheuvel #include <linux/scs.h>
342077be67SLaura Abbott #include <linux/mm.h>
359703d9d7SCatalin Marinas
3637655163SAl Stone #include <asm/acpi.h>
37bf4b558eSMark Salter #include <asm/fixmap.h>
38df857416SMark Rutland #include <asm/cpu.h>
399703d9d7SCatalin Marinas #include <asm/cputype.h>
4041bd5b5dSJames Morse #include <asm/daifflags.h>
419703d9d7SCatalin Marinas #include <asm/elf.h>
42930da09fSAndre Przywara #include <asm/cpufeature.h>
43e8765b26SMark Rutland #include <asm/cpu_ops.h>
4439d114ddSAndrey Ryabinin #include <asm/kasan.h>
451a2db300SGanapatrao Kulkarni #include <asm/numa.h>
463b619e22SArd Biesheuvel #include <asm/scs.h>
479703d9d7SCatalin Marinas #include <asm/sections.h>
489703d9d7SCatalin Marinas #include <asm/setup.h>
494c7aa002SJavi Merino #include <asm/smp_plat.h>
509703d9d7SCatalin Marinas #include <asm/cacheflush.h>
519703d9d7SCatalin Marinas #include <asm/tlbflush.h>
529703d9d7SCatalin Marinas #include <asm/traps.h>
53f84d0275SMark Salter #include <asm/efi.h>
545882bfefSStefano Stabellini #include <asm/xen/hypervisor.h>
559e8e865bSMark Rutland #include <asm/mmu_context.h>
569703d9d7SCatalin Marinas
57d91680e6SWill Deacon static int num_standard_resources;
58d91680e6SWill Deacon static struct resource *standard_resources;
59d91680e6SWill Deacon
609703d9d7SCatalin Marinas phys_addr_t __fdt_pointer __initdata;
619d7c13e5SArd Biesheuvel u64 mmu_enabled_at_boot __initdata;
629703d9d7SCatalin Marinas
639703d9d7SCatalin Marinas /*
649703d9d7SCatalin Marinas * Standard memory resources
659703d9d7SCatalin Marinas */
669703d9d7SCatalin Marinas static struct resource mem_res[] = {
679703d9d7SCatalin Marinas {
689703d9d7SCatalin Marinas .name = "Kernel code",
699703d9d7SCatalin Marinas .start = 0,
709703d9d7SCatalin Marinas .end = 0,
7135d98e93SToshi Kani .flags = IORESOURCE_SYSTEM_RAM
729703d9d7SCatalin Marinas },
739703d9d7SCatalin Marinas {
749703d9d7SCatalin Marinas .name = "Kernel data",
759703d9d7SCatalin Marinas .start = 0,
769703d9d7SCatalin Marinas .end = 0,
7735d98e93SToshi Kani .flags = IORESOURCE_SYSTEM_RAM
789703d9d7SCatalin Marinas }
799703d9d7SCatalin Marinas };
809703d9d7SCatalin Marinas
819703d9d7SCatalin Marinas #define kernel_code mem_res[0]
829703d9d7SCatalin Marinas #define kernel_data mem_res[1]
839703d9d7SCatalin Marinas
84da9c177dSArd Biesheuvel /*
85da9c177dSArd Biesheuvel * The recorded values of x0 .. x3 upon kernel entry.
86da9c177dSArd Biesheuvel */
87da9c177dSArd Biesheuvel u64 __cacheline_aligned boot_args[4];
88da9c177dSArd Biesheuvel
smp_setup_processor_id(void)8971586276SWill Deacon void __init smp_setup_processor_id(void)
9071586276SWill Deacon {
9180708677SMark Rutland u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
92eaecca9eSKefeng Wang set_cpu_logical_map(0, mpidr);
9380708677SMark Rutland
94ccaac162SMark Rutland pr_info("Booting Linux on physical CPU 0x%010lx [0x%08x]\n",
95ccaac162SMark Rutland (unsigned long)mpidr, read_cpuid_id());
9671586276SWill Deacon }
9771586276SWill Deacon
arch_match_cpu_phys_id(int cpu,u64 phys_id)986e15d0e0SSudeep KarkadaNagesha bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
996e15d0e0SSudeep KarkadaNagesha {
1006e15d0e0SSudeep KarkadaNagesha return phys_id == cpu_logical_map(cpu);
1016e15d0e0SSudeep KarkadaNagesha }
1026e15d0e0SSudeep KarkadaNagesha
103976d7d3fSLorenzo Pieralisi struct mpidr_hash mpidr_hash;
104976d7d3fSLorenzo Pieralisi /**
105976d7d3fSLorenzo Pieralisi * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
106976d7d3fSLorenzo Pieralisi * level in order to build a linear index from an
107976d7d3fSLorenzo Pieralisi * MPIDR value. Resulting algorithm is a collision
108976d7d3fSLorenzo Pieralisi * free hash carried out through shifting and ORing
109976d7d3fSLorenzo Pieralisi */
smp_build_mpidr_hash(void)110976d7d3fSLorenzo Pieralisi static void __init smp_build_mpidr_hash(void)
111976d7d3fSLorenzo Pieralisi {
112976d7d3fSLorenzo Pieralisi u32 i, affinity, fs[4], bits[4], ls;
113976d7d3fSLorenzo Pieralisi u64 mask = 0;
114976d7d3fSLorenzo Pieralisi /*
115976d7d3fSLorenzo Pieralisi * Pre-scan the list of MPIDRS and filter out bits that do
116976d7d3fSLorenzo Pieralisi * not contribute to affinity levels, ie they never toggle.
117976d7d3fSLorenzo Pieralisi */
118976d7d3fSLorenzo Pieralisi for_each_possible_cpu(i)
119976d7d3fSLorenzo Pieralisi mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
120976d7d3fSLorenzo Pieralisi pr_debug("mask of set bits %#llx\n", mask);
121976d7d3fSLorenzo Pieralisi /*
122976d7d3fSLorenzo Pieralisi * Find and stash the last and first bit set at all affinity levels to
123976d7d3fSLorenzo Pieralisi * check how many bits are required to represent them.
124976d7d3fSLorenzo Pieralisi */
125976d7d3fSLorenzo Pieralisi for (i = 0; i < 4; i++) {
126976d7d3fSLorenzo Pieralisi affinity = MPIDR_AFFINITY_LEVEL(mask, i);
127976d7d3fSLorenzo Pieralisi /*
128976d7d3fSLorenzo Pieralisi * Find the MSB bit and LSB bits position
129976d7d3fSLorenzo Pieralisi * to determine how many bits are required
130976d7d3fSLorenzo Pieralisi * to express the affinity level.
131976d7d3fSLorenzo Pieralisi */
132976d7d3fSLorenzo Pieralisi ls = fls(affinity);
133976d7d3fSLorenzo Pieralisi fs[i] = affinity ? ffs(affinity) - 1 : 0;
134976d7d3fSLorenzo Pieralisi bits[i] = ls - fs[i];
135976d7d3fSLorenzo Pieralisi }
136976d7d3fSLorenzo Pieralisi /*
137976d7d3fSLorenzo Pieralisi * An index can be created from the MPIDR_EL1 by isolating the
138976d7d3fSLorenzo Pieralisi * significant bits at each affinity level and by shifting
139976d7d3fSLorenzo Pieralisi * them in order to compress the 32 bits values space to a
140976d7d3fSLorenzo Pieralisi * compressed set of values. This is equivalent to hashing
141976d7d3fSLorenzo Pieralisi * the MPIDR_EL1 through shifting and ORing. It is a collision free
142976d7d3fSLorenzo Pieralisi * hash though not minimal since some levels might contain a number
143976d7d3fSLorenzo Pieralisi * of CPUs that is not an exact power of 2 and their bit
144976d7d3fSLorenzo Pieralisi * representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}.
145976d7d3fSLorenzo Pieralisi */
146976d7d3fSLorenzo Pieralisi mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];
147976d7d3fSLorenzo Pieralisi mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
148976d7d3fSLorenzo Pieralisi mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
149976d7d3fSLorenzo Pieralisi (bits[1] + bits[0]);
150976d7d3fSLorenzo Pieralisi mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +
151976d7d3fSLorenzo Pieralisi fs[3] - (bits[2] + bits[1] + bits[0]);
152976d7d3fSLorenzo Pieralisi mpidr_hash.mask = mask;
153976d7d3fSLorenzo Pieralisi mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0];
154976d7d3fSLorenzo Pieralisi pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n",
155976d7d3fSLorenzo Pieralisi mpidr_hash.shift_aff[0],
156976d7d3fSLorenzo Pieralisi mpidr_hash.shift_aff[1],
157976d7d3fSLorenzo Pieralisi mpidr_hash.shift_aff[2],
158976d7d3fSLorenzo Pieralisi mpidr_hash.shift_aff[3],
159976d7d3fSLorenzo Pieralisi mpidr_hash.mask,
160976d7d3fSLorenzo Pieralisi mpidr_hash.bits);
161976d7d3fSLorenzo Pieralisi /*
162976d7d3fSLorenzo Pieralisi * 4x is an arbitrary value used to warn on a hash table much bigger
163976d7d3fSLorenzo Pieralisi * than expected on most systems.
164976d7d3fSLorenzo Pieralisi */
165976d7d3fSLorenzo Pieralisi if (mpidr_hash_size() > 4 * num_possible_cpus())
166976d7d3fSLorenzo Pieralisi pr_warn("Large number of MPIDR hash buckets detected\n");
167976d7d3fSLorenzo Pieralisi }
168137650aaSMark Rutland
169f6f0c436SMarc Zyngier static void *early_fdt_ptr __initdata;
170f6f0c436SMarc Zyngier
get_early_fdt_ptr(void)171f6f0c436SMarc Zyngier void __init *get_early_fdt_ptr(void)
172f6f0c436SMarc Zyngier {
173f6f0c436SMarc Zyngier return early_fdt_ptr;
174f6f0c436SMarc Zyngier }
175f6f0c436SMarc Zyngier
early_fdt_map(u64 dt_phys)176f6f0c436SMarc Zyngier asmlinkage void __init early_fdt_map(u64 dt_phys)
177f6f0c436SMarc Zyngier {
178f6f0c436SMarc Zyngier int fdt_size;
179f6f0c436SMarc Zyngier
180f6f0c436SMarc Zyngier early_fixmap_init();
181f6f0c436SMarc Zyngier early_fdt_ptr = fixmap_remap_fdt(dt_phys, &fdt_size, PAGE_KERNEL);
182f6f0c436SMarc Zyngier }
183f6f0c436SMarc Zyngier
setup_machine_fdt(phys_addr_t dt_phys)1849703d9d7SCatalin Marinas static void __init setup_machine_fdt(phys_addr_t dt_phys)
1859703d9d7SCatalin Marinas {
186e112b032SHsin-Yi Wang int size;
187e112b032SHsin-Yi Wang void *dt_virt = fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL);
1882f9a0becSGeert Uytterhoeven const char *name;
18961bd93ceSArd Biesheuvel
190e112b032SHsin-Yi Wang if (dt_virt)
191e112b032SHsin-Yi Wang memblock_reserve(dt_phys, size);
192e112b032SHsin-Yi Wang
19361bd93ceSArd Biesheuvel if (!dt_virt || !early_init_dt_scan(dt_virt)) {
19461bd93ceSArd Biesheuvel pr_crit("\n"
19531e833b2SGuilherme G. Piccoli "Error: invalid device tree blob at physical address %pa (virtual address 0x%px)\n"
19661bd93ceSArd Biesheuvel "The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"
19761bd93ceSArd Biesheuvel "\nPlease check your bootloader.",
19861bd93ceSArd Biesheuvel &dt_phys, dt_virt);
1999703d9d7SCatalin Marinas
20031e833b2SGuilherme G. Piccoli /*
20131e833b2SGuilherme G. Piccoli * Note that in this _really_ early stage we cannot even BUG()
20231e833b2SGuilherme G. Piccoli * or oops, so the least terrible thing to do is cpu_relax(),
20331e833b2SGuilherme G. Piccoli * or else we could end-up printing non-initialized data, etc.
20431e833b2SGuilherme G. Piccoli */
2059703d9d7SCatalin Marinas while (true)
2069703d9d7SCatalin Marinas cpu_relax();
2079703d9d7SCatalin Marinas }
2085e39977eSWill Deacon
209e112b032SHsin-Yi Wang /* Early fixups are done, map the FDT as read-only now */
210e112b032SHsin-Yi Wang fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO);
211e112b032SHsin-Yi Wang
2122f9a0becSGeert Uytterhoeven name = of_flat_dt_get_machine_name();
213690e95ddSKefeng Wang if (!name)
214690e95ddSKefeng Wang return;
215690e95ddSKefeng Wang
2162f9a0becSGeert Uytterhoeven pr_info("Machine model: %s\n", name);
2172f9a0becSGeert Uytterhoeven dump_stack_set_arch_desc("%s (DT)", name);
2189703d9d7SCatalin Marinas }
2199703d9d7SCatalin Marinas
request_standard_resources(void)2209703d9d7SCatalin Marinas static void __init request_standard_resources(void)
2219703d9d7SCatalin Marinas {
2229703d9d7SCatalin Marinas struct memblock_region *region;
2239703d9d7SCatalin Marinas struct resource *res;
224d91680e6SWill Deacon unsigned long i = 0;
2258a7f97b9SMike Rapoport size_t res_size;
2269703d9d7SCatalin Marinas
227e2a073ddSArd Biesheuvel kernel_code.start = __pa_symbol(_stext);
2282077be67SLaura Abbott kernel_code.end = __pa_symbol(__init_begin - 1);
2292077be67SLaura Abbott kernel_data.start = __pa_symbol(_sdata);
2302077be67SLaura Abbott kernel_data.end = __pa_symbol(_end - 1);
231e6b39442SZhen Lei insert_resource(&iomem_resource, &kernel_code);
232e6b39442SZhen Lei insert_resource(&iomem_resource, &kernel_data);
2339703d9d7SCatalin Marinas
234d91680e6SWill Deacon num_standard_resources = memblock.memory.cnt;
2358a7f97b9SMike Rapoport res_size = num_standard_resources * sizeof(*standard_resources);
2369e0a17dbSChen Zhou standard_resources = memblock_alloc(res_size, SMP_CACHE_BYTES);
2378a7f97b9SMike Rapoport if (!standard_resources)
2388a7f97b9SMike Rapoport panic("%s: Failed to allocate %zu bytes\n", __func__, res_size);
239d91680e6SWill Deacon
240cc6de168SMike Rapoport for_each_mem_region(region) {
241d91680e6SWill Deacon res = &standard_resources[i++];
242e7cd1903SAKASHI Takahiro if (memblock_is_nomap(region)) {
243e7cd1903SAKASHI Takahiro res->name = "reserved";
24479ba11d2SArd Biesheuvel res->flags = IORESOURCE_MEM;
245daa149ddSHuacai Chen res->start = __pfn_to_phys(memblock_region_reserved_base_pfn(region));
246daa149ddSHuacai Chen res->end = __pfn_to_phys(memblock_region_reserved_end_pfn(region)) - 1;
247e7cd1903SAKASHI Takahiro } else {
2489703d9d7SCatalin Marinas res->name = "System RAM";
249e7cd1903SAKASHI Takahiro res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
2509703d9d7SCatalin Marinas res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
2519703d9d7SCatalin Marinas res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
252daa149ddSHuacai Chen }
2539703d9d7SCatalin Marinas
254e6b39442SZhen Lei insert_resource(&iomem_resource, res);
2559703d9d7SCatalin Marinas }
2569703d9d7SCatalin Marinas }
2579703d9d7SCatalin Marinas
reserve_memblock_reserved_regions(void)25850d7ba36SJames Morse static int __init reserve_memblock_reserved_regions(void)
25950d7ba36SJames Morse {
260d91680e6SWill Deacon u64 i, j;
26150d7ba36SJames Morse
262d91680e6SWill Deacon for (i = 0; i < num_standard_resources; ++i) {
263d91680e6SWill Deacon struct resource *mem = &standard_resources[i];
264d91680e6SWill Deacon phys_addr_t r_start, r_end, mem_size = resource_size(mem);
26550d7ba36SJames Morse
266d91680e6SWill Deacon if (!memblock_is_region_reserved(mem->start, mem_size))
26750d7ba36SJames Morse continue;
268d91680e6SWill Deacon
2699f3d5eaaSMike Rapoport for_each_reserved_mem_range(j, &r_start, &r_end) {
270d91680e6SWill Deacon resource_size_t start, end;
271d91680e6SWill Deacon
272d91680e6SWill Deacon start = max(PFN_PHYS(PFN_DOWN(r_start)), mem->start);
273d91680e6SWill Deacon end = min(PFN_PHYS(PFN_UP(r_end)) - 1, mem->end);
274d91680e6SWill Deacon
275d91680e6SWill Deacon if (start > mem->end || end < mem->start)
276d91680e6SWill Deacon continue;
27750d7ba36SJames Morse
27850d7ba36SJames Morse reserve_region_with_split(mem, start, end, "reserved");
27950d7ba36SJames Morse }
280d91680e6SWill Deacon }
28150d7ba36SJames Morse
28250d7ba36SJames Morse return 0;
28350d7ba36SJames Morse }
28450d7ba36SJames Morse arch_initcall(reserve_memblock_reserved_regions);
28550d7ba36SJames Morse
2864c7aa002SJavi Merino u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
2874c7aa002SJavi Merino
cpu_logical_map(unsigned int cpu)288c1f45f4eSDavid Brazdil u64 cpu_logical_map(unsigned int cpu)
289eaecca9eSKefeng Wang {
290eaecca9eSKefeng Wang return __cpu_logical_map[cpu];
291eaecca9eSKefeng Wang }
292eaecca9eSKefeng Wang
setup_arch(char ** cmdline_p)293f9409d58SAndrey Konovalov void __init __no_sanitize_address setup_arch(char **cmdline_p)
2949703d9d7SCatalin Marinas {
29529ffbca1SKefeng Wang setup_initial_init_mm(_stext, _etext, _edata, _end);
2969703d9d7SCatalin Marinas
2979703d9d7SCatalin Marinas *cmdline_p = boot_command_line;
2989703d9d7SCatalin Marinas
299*6e13b6b9SMark Rutland kaslr_init();
300*6e13b6b9SMark Rutland
30109e3c22aSMark Brown /*
30209e3c22aSMark Brown * If know now we are going to need KPTI then use non-global
30309e3c22aSMark Brown * mappings from the start, avoiding the cost of rewriting
30409e3c22aSMark Brown * everything later.
30509e3c22aSMark Brown */
30609e3c22aSMark Brown arm64_use_ng_mappings = kaslr_requires_kpti();
30709e3c22aSMark Brown
308af86e597SLaura Abbott early_fixmap_init();
309bf4b558eSMark Salter early_ioremap_init();
3100bf757c7SMark Salter
31173e2d827SStephen Boyd setup_machine_fdt(__fdt_pointer);
31273e2d827SStephen Boyd
31327d8fa20SCatalin Marinas /*
31427d8fa20SCatalin Marinas * Initialise the static keys early as they may be enabled by the
31527d8fa20SCatalin Marinas * cpufeature code and early parameters.
31627d8fa20SCatalin Marinas */
31727d8fa20SCatalin Marinas jump_label_init();
3189703d9d7SCatalin Marinas parse_early_param();
3199703d9d7SCatalin Marinas
3203b619e22SArd Biesheuvel dynamic_scs_init();
3213b619e22SArd Biesheuvel
3227a9c43beSJon Masters /*
32341bd5b5dSJames Morse * Unmask asynchronous aborts and fiq after bringing up possible
32441bd5b5dSJames Morse * earlycon. (Report possible System Errors once we can report this
32541bd5b5dSJames Morse * occurred).
3267a9c43beSJon Masters */
32741bd5b5dSJames Morse local_daif_restore(DAIF_PROCCTX_NOIRQ);
3287a9c43beSJon Masters
32986ccce89SMark Rutland /*
33086ccce89SMark Rutland * TTBR0 is only used for the identity mapping at this stage. Make it
33186ccce89SMark Rutland * point to zero page to avoid speculatively fetching new entries.
33286ccce89SMark Rutland */
33386ccce89SMark Rutland cpu_uninstall_idmap();
33486ccce89SMark Rutland
3359b08aaa3SShannon Zhao xen_early_init();
336f84d0275SMark Salter efi_init();
337dd4bc607SArd Biesheuvel
3389d7c13e5SArd Biesheuvel if (!efi_enabled(EFI_BOOT)) {
3399d7c13e5SArd Biesheuvel if ((u64)_text % MIN_KIMG_ALIGN)
340dd4bc607SArd Biesheuvel pr_warn(FW_BUG "Kernel image misaligned at boot, please fix your bootloader!");
3419d7c13e5SArd Biesheuvel WARN_TAINT(mmu_enabled_at_boot, TAINT_FIRMWARE_WORKAROUND,
3429d7c13e5SArd Biesheuvel FW_BUG "Booted with MMU enabled!");
3439d7c13e5SArd Biesheuvel }
344dd4bc607SArd Biesheuvel
3459703d9d7SCatalin Marinas arm64_memblock_init();
3469703d9d7SCatalin Marinas
34738b04a74SJon Masters paging_init();
34838b04a74SJon Masters
34938b04a74SJon Masters acpi_table_upgrade();
35038b04a74SJon Masters
35137655163SAl Stone /* Parse the ACPI tables for possible boot-time configuration */
35237655163SAl Stone acpi_boot_table_init();
35337655163SAl Stone
3543194ac6eSDavid Daney if (acpi_disabled)
3553194ac6eSDavid Daney unflatten_device_tree();
3563194ac6eSDavid Daney
3573194ac6eSDavid Daney bootmem_init();
3583194ac6eSDavid Daney
35939d114ddSAndrey Ryabinin kasan_init();
36039d114ddSAndrey Ryabinin
3619703d9d7SCatalin Marinas request_standard_resources();
3629703d9d7SCatalin Marinas
3630e63ea48SArd Biesheuvel early_ioremap_reset();
364f84d0275SMark Salter
3653194ac6eSDavid Daney if (acpi_disabled)
3667c59a3dfSGraeme Gregory psci_dt_init();
3673194ac6eSDavid Daney else
368fccb9a81SHanjun Guo psci_acpi_init();
3693194ac6eSDavid Daney
3706885fb12SGavin Shan init_bootcpu_ops();
3710f078336SLorenzo Pieralisi smp_init_cpus();
372976d7d3fSLorenzo Pieralisi smp_build_mpidr_hash();
3739703d9d7SCatalin Marinas
3743f41b609SAndrey Konovalov /* Init percpu seeds for random tags after cpus are set up. */
37560a3a5feSAndrey Konovalov kasan_init_sw_tags();
3763f41b609SAndrey Konovalov
37739bc88e5SCatalin Marinas #ifdef CONFIG_ARM64_SW_TTBR0_PAN
37839bc88e5SCatalin Marinas /*
37939bc88e5SCatalin Marinas * Make sure init_thread_info.ttbr0 always generates translation
38039bc88e5SCatalin Marinas * faults in case uaccess_enable() is inadvertently called by the init
38139bc88e5SCatalin Marinas * thread.
38239bc88e5SCatalin Marinas */
3839163f011SAnshuman Khandual init_task.thread_info.ttbr0 = phys_to_ttbr(__pa_symbol(reserved_pg_dir));
38439bc88e5SCatalin Marinas #endif
38539bc88e5SCatalin Marinas
386da9c177dSArd Biesheuvel if (boot_args[1] || boot_args[2] || boot_args[3]) {
387da9c177dSArd Biesheuvel pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n"
388da9c177dSArd Biesheuvel "\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n"
389da9c177dSArd Biesheuvel "This indicates a broken bootloader or old kernel\n",
390da9c177dSArd Biesheuvel boot_args[1], boot_args[2], boot_args[3]);
391da9c177dSArd Biesheuvel }
3929703d9d7SCatalin Marinas }
3939703d9d7SCatalin Marinas
cpu_can_disable(unsigned int cpu)394d55c5f28SSudeep Holla static inline bool cpu_can_disable(unsigned int cpu)
395d55c5f28SSudeep Holla {
396d55c5f28SSudeep Holla #ifdef CONFIG_HOTPLUG_CPU
397de58ed5eSGavin Shan const struct cpu_operations *ops = get_cpu_ops(cpu);
398de58ed5eSGavin Shan
399de58ed5eSGavin Shan if (ops && ops->cpu_can_disable)
400de58ed5eSGavin Shan return ops->cpu_can_disable(cpu);
401d55c5f28SSudeep Holla #endif
402d55c5f28SSudeep Holla return false;
403d55c5f28SSudeep Holla }
404d55c5f28SSudeep Holla
topology_init(void)4059703d9d7SCatalin Marinas static int __init topology_init(void)
4069703d9d7SCatalin Marinas {
4079703d9d7SCatalin Marinas int i;
4089703d9d7SCatalin Marinas
4099703d9d7SCatalin Marinas for_each_possible_cpu(i) {
410df857416SMark Rutland struct cpu *cpu = &per_cpu(cpu_data.cpu, i);
411d55c5f28SSudeep Holla cpu->hotpluggable = cpu_can_disable(i);
4129703d9d7SCatalin Marinas register_cpu(cpu, i);
4139703d9d7SCatalin Marinas }
4149703d9d7SCatalin Marinas
4159703d9d7SCatalin Marinas return 0;
4169703d9d7SCatalin Marinas }
4179703d9d7SCatalin Marinas subsys_initcall(topology_init);
418f80fb3a3SArd Biesheuvel
dump_kernel_offset(void)419638d5031SAnshuman Khandual static void dump_kernel_offset(void)
420f80fb3a3SArd Biesheuvel {
4217ede8665SAlexander Popov const unsigned long offset = kaslr_offset();
422f80fb3a3SArd Biesheuvel
4237ede8665SAlexander Popov if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && offset > 0) {
4247ede8665SAlexander Popov pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
4257ede8665SAlexander Popov offset, KIMAGE_VADDR);
42612f799c8SMiles Chen pr_emerg("PHYS_OFFSET: 0x%llx\n", PHYS_OFFSET);
427f80fb3a3SArd Biesheuvel } else {
428f80fb3a3SArd Biesheuvel pr_emerg("Kernel Offset: disabled\n");
429f80fb3a3SArd Biesheuvel }
430638d5031SAnshuman Khandual }
431638d5031SAnshuman Khandual
arm64_panic_block_dump(struct notifier_block * self,unsigned long v,void * p)432638d5031SAnshuman Khandual static int arm64_panic_block_dump(struct notifier_block *self,
433638d5031SAnshuman Khandual unsigned long v, void *p)
434638d5031SAnshuman Khandual {
435638d5031SAnshuman Khandual dump_kernel_offset();
436638d5031SAnshuman Khandual dump_cpu_features();
437638d5031SAnshuman Khandual dump_mem_limit();
438f80fb3a3SArd Biesheuvel return 0;
439f80fb3a3SArd Biesheuvel }
440f80fb3a3SArd Biesheuvel
441638d5031SAnshuman Khandual static struct notifier_block arm64_panic_block = {
442638d5031SAnshuman Khandual .notifier_call = arm64_panic_block_dump
443f80fb3a3SArd Biesheuvel };
444f80fb3a3SArd Biesheuvel
register_arm64_panic_block(void)445638d5031SAnshuman Khandual static int __init register_arm64_panic_block(void)
446f80fb3a3SArd Biesheuvel {
447f80fb3a3SArd Biesheuvel atomic_notifier_chain_register(&panic_notifier_list,
448638d5031SAnshuman Khandual &arm64_panic_block);
449f80fb3a3SArd Biesheuvel return 0;
450f80fb3a3SArd Biesheuvel }
451638d5031SAnshuman Khandual device_initcall(register_arm64_panic_block);
4529d7c13e5SArd Biesheuvel
check_mmu_enabled_at_boot(void)4539d7c13e5SArd Biesheuvel static int __init check_mmu_enabled_at_boot(void)
4549d7c13e5SArd Biesheuvel {
4559d7c13e5SArd Biesheuvel if (!efi_enabled(EFI_BOOT) && mmu_enabled_at_boot)
4569d7c13e5SArd Biesheuvel panic("Non-EFI boot detected with MMU and caches enabled");
4579d7c13e5SArd Biesheuvel return 0;
4589d7c13e5SArd Biesheuvel }
4599d7c13e5SArd Biesheuvel device_initcall_sync(check_mmu_enabled_at_boot);
460