1 /* 2 * Based on arch/arm/kernel/ptrace.c 3 * 4 * By Ross Biro 1/23/92 5 * edited by Linus Torvalds 6 * ARM modifications Copyright (C) 2000 Russell King 7 * Copyright (C) 2012 ARM Ltd. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program. If not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include <linux/audit.h> 23 #include <linux/compat.h> 24 #include <linux/kernel.h> 25 #include <linux/sched.h> 26 #include <linux/mm.h> 27 #include <linux/smp.h> 28 #include <linux/ptrace.h> 29 #include <linux/user.h> 30 #include <linux/seccomp.h> 31 #include <linux/security.h> 32 #include <linux/init.h> 33 #include <linux/signal.h> 34 #include <linux/uaccess.h> 35 #include <linux/perf_event.h> 36 #include <linux/hw_breakpoint.h> 37 #include <linux/regset.h> 38 #include <linux/tracehook.h> 39 #include <linux/elf.h> 40 41 #include <asm/compat.h> 42 #include <asm/debug-monitors.h> 43 #include <asm/pgtable.h> 44 #include <asm/syscall.h> 45 #include <asm/traps.h> 46 #include <asm/system_misc.h> 47 48 #define CREATE_TRACE_POINTS 49 #include <trace/events/syscalls.h> 50 51 struct pt_regs_offset { 52 const char *name; 53 int offset; 54 }; 55 56 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)} 57 #define REG_OFFSET_END {.name = NULL, .offset = 0} 58 #define GPR_OFFSET_NAME(r) \ 59 {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])} 60 61 static const struct pt_regs_offset regoffset_table[] = { 62 GPR_OFFSET_NAME(0), 63 GPR_OFFSET_NAME(1), 64 GPR_OFFSET_NAME(2), 65 GPR_OFFSET_NAME(3), 66 GPR_OFFSET_NAME(4), 67 GPR_OFFSET_NAME(5), 68 GPR_OFFSET_NAME(6), 69 GPR_OFFSET_NAME(7), 70 GPR_OFFSET_NAME(8), 71 GPR_OFFSET_NAME(9), 72 GPR_OFFSET_NAME(10), 73 GPR_OFFSET_NAME(11), 74 GPR_OFFSET_NAME(12), 75 GPR_OFFSET_NAME(13), 76 GPR_OFFSET_NAME(14), 77 GPR_OFFSET_NAME(15), 78 GPR_OFFSET_NAME(16), 79 GPR_OFFSET_NAME(17), 80 GPR_OFFSET_NAME(18), 81 GPR_OFFSET_NAME(19), 82 GPR_OFFSET_NAME(20), 83 GPR_OFFSET_NAME(21), 84 GPR_OFFSET_NAME(22), 85 GPR_OFFSET_NAME(23), 86 GPR_OFFSET_NAME(24), 87 GPR_OFFSET_NAME(25), 88 GPR_OFFSET_NAME(26), 89 GPR_OFFSET_NAME(27), 90 GPR_OFFSET_NAME(28), 91 GPR_OFFSET_NAME(29), 92 GPR_OFFSET_NAME(30), 93 {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])}, 94 REG_OFFSET_NAME(sp), 95 REG_OFFSET_NAME(pc), 96 REG_OFFSET_NAME(pstate), 97 REG_OFFSET_END, 98 }; 99 100 /** 101 * regs_query_register_offset() - query register offset from its name 102 * @name: the name of a register 103 * 104 * regs_query_register_offset() returns the offset of a register in struct 105 * pt_regs from its name. If the name is invalid, this returns -EINVAL; 106 */ 107 int regs_query_register_offset(const char *name) 108 { 109 const struct pt_regs_offset *roff; 110 111 for (roff = regoffset_table; roff->name != NULL; roff++) 112 if (!strcmp(roff->name, name)) 113 return roff->offset; 114 return -EINVAL; 115 } 116 117 /** 118 * regs_within_kernel_stack() - check the address in the stack 119 * @regs: pt_regs which contains kernel stack pointer. 120 * @addr: address which is checked. 121 * 122 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s). 123 * If @addr is within the kernel stack, it returns true. If not, returns false. 124 */ 125 static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr) 126 { 127 return ((addr & ~(THREAD_SIZE - 1)) == 128 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) || 129 on_irq_stack(addr, raw_smp_processor_id()); 130 } 131 132 /** 133 * regs_get_kernel_stack_nth() - get Nth entry of the stack 134 * @regs: pt_regs which contains kernel stack pointer. 135 * @n: stack entry number. 136 * 137 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which 138 * is specified by @regs. If the @n th entry is NOT in the kernel stack, 139 * this returns 0. 140 */ 141 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n) 142 { 143 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs); 144 145 addr += n; 146 if (regs_within_kernel_stack(regs, (unsigned long)addr)) 147 return *addr; 148 else 149 return 0; 150 } 151 152 /* 153 * TODO: does not yet catch signals sent when the child dies. 154 * in exit.c or in signal.c. 155 */ 156 157 /* 158 * Called by kernel/ptrace.c when detaching.. 159 */ 160 void ptrace_disable(struct task_struct *child) 161 { 162 /* 163 * This would be better off in core code, but PTRACE_DETACH has 164 * grown its fair share of arch-specific worts and changing it 165 * is likely to cause regressions on obscure architectures. 166 */ 167 user_disable_single_step(child); 168 } 169 170 #ifdef CONFIG_HAVE_HW_BREAKPOINT 171 /* 172 * Handle hitting a HW-breakpoint. 173 */ 174 static void ptrace_hbptriggered(struct perf_event *bp, 175 struct perf_sample_data *data, 176 struct pt_regs *regs) 177 { 178 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp); 179 siginfo_t info = { 180 .si_signo = SIGTRAP, 181 .si_errno = 0, 182 .si_code = TRAP_HWBKPT, 183 .si_addr = (void __user *)(bkpt->trigger), 184 }; 185 186 #ifdef CONFIG_COMPAT 187 int i; 188 189 if (!is_compat_task()) 190 goto send_sig; 191 192 for (i = 0; i < ARM_MAX_BRP; ++i) { 193 if (current->thread.debug.hbp_break[i] == bp) { 194 info.si_errno = (i << 1) + 1; 195 break; 196 } 197 } 198 199 for (i = 0; i < ARM_MAX_WRP; ++i) { 200 if (current->thread.debug.hbp_watch[i] == bp) { 201 info.si_errno = -((i << 1) + 1); 202 break; 203 } 204 } 205 206 send_sig: 207 #endif 208 force_sig_info(SIGTRAP, &info, current); 209 } 210 211 /* 212 * Unregister breakpoints from this task and reset the pointers in 213 * the thread_struct. 214 */ 215 void flush_ptrace_hw_breakpoint(struct task_struct *tsk) 216 { 217 int i; 218 struct thread_struct *t = &tsk->thread; 219 220 for (i = 0; i < ARM_MAX_BRP; i++) { 221 if (t->debug.hbp_break[i]) { 222 unregister_hw_breakpoint(t->debug.hbp_break[i]); 223 t->debug.hbp_break[i] = NULL; 224 } 225 } 226 227 for (i = 0; i < ARM_MAX_WRP; i++) { 228 if (t->debug.hbp_watch[i]) { 229 unregister_hw_breakpoint(t->debug.hbp_watch[i]); 230 t->debug.hbp_watch[i] = NULL; 231 } 232 } 233 } 234 235 void ptrace_hw_copy_thread(struct task_struct *tsk) 236 { 237 memset(&tsk->thread.debug, 0, sizeof(struct debug_info)); 238 } 239 240 static struct perf_event *ptrace_hbp_get_event(unsigned int note_type, 241 struct task_struct *tsk, 242 unsigned long idx) 243 { 244 struct perf_event *bp = ERR_PTR(-EINVAL); 245 246 switch (note_type) { 247 case NT_ARM_HW_BREAK: 248 if (idx < ARM_MAX_BRP) 249 bp = tsk->thread.debug.hbp_break[idx]; 250 break; 251 case NT_ARM_HW_WATCH: 252 if (idx < ARM_MAX_WRP) 253 bp = tsk->thread.debug.hbp_watch[idx]; 254 break; 255 } 256 257 return bp; 258 } 259 260 static int ptrace_hbp_set_event(unsigned int note_type, 261 struct task_struct *tsk, 262 unsigned long idx, 263 struct perf_event *bp) 264 { 265 int err = -EINVAL; 266 267 switch (note_type) { 268 case NT_ARM_HW_BREAK: 269 if (idx < ARM_MAX_BRP) { 270 tsk->thread.debug.hbp_break[idx] = bp; 271 err = 0; 272 } 273 break; 274 case NT_ARM_HW_WATCH: 275 if (idx < ARM_MAX_WRP) { 276 tsk->thread.debug.hbp_watch[idx] = bp; 277 err = 0; 278 } 279 break; 280 } 281 282 return err; 283 } 284 285 static struct perf_event *ptrace_hbp_create(unsigned int note_type, 286 struct task_struct *tsk, 287 unsigned long idx) 288 { 289 struct perf_event *bp; 290 struct perf_event_attr attr; 291 int err, type; 292 293 switch (note_type) { 294 case NT_ARM_HW_BREAK: 295 type = HW_BREAKPOINT_X; 296 break; 297 case NT_ARM_HW_WATCH: 298 type = HW_BREAKPOINT_RW; 299 break; 300 default: 301 return ERR_PTR(-EINVAL); 302 } 303 304 ptrace_breakpoint_init(&attr); 305 306 /* 307 * Initialise fields to sane defaults 308 * (i.e. values that will pass validation). 309 */ 310 attr.bp_addr = 0; 311 attr.bp_len = HW_BREAKPOINT_LEN_4; 312 attr.bp_type = type; 313 attr.disabled = 1; 314 315 bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk); 316 if (IS_ERR(bp)) 317 return bp; 318 319 err = ptrace_hbp_set_event(note_type, tsk, idx, bp); 320 if (err) 321 return ERR_PTR(err); 322 323 return bp; 324 } 325 326 static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type, 327 struct arch_hw_breakpoint_ctrl ctrl, 328 struct perf_event_attr *attr) 329 { 330 int err, len, type, offset, disabled = !ctrl.enabled; 331 332 attr->disabled = disabled; 333 if (disabled) 334 return 0; 335 336 err = arch_bp_generic_fields(ctrl, &len, &type, &offset); 337 if (err) 338 return err; 339 340 switch (note_type) { 341 case NT_ARM_HW_BREAK: 342 if ((type & HW_BREAKPOINT_X) != type) 343 return -EINVAL; 344 break; 345 case NT_ARM_HW_WATCH: 346 if ((type & HW_BREAKPOINT_RW) != type) 347 return -EINVAL; 348 break; 349 default: 350 return -EINVAL; 351 } 352 353 attr->bp_len = len; 354 attr->bp_type = type; 355 attr->bp_addr += offset; 356 357 return 0; 358 } 359 360 static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info) 361 { 362 u8 num; 363 u32 reg = 0; 364 365 switch (note_type) { 366 case NT_ARM_HW_BREAK: 367 num = hw_breakpoint_slots(TYPE_INST); 368 break; 369 case NT_ARM_HW_WATCH: 370 num = hw_breakpoint_slots(TYPE_DATA); 371 break; 372 default: 373 return -EINVAL; 374 } 375 376 reg |= debug_monitors_arch(); 377 reg <<= 8; 378 reg |= num; 379 380 *info = reg; 381 return 0; 382 } 383 384 static int ptrace_hbp_get_ctrl(unsigned int note_type, 385 struct task_struct *tsk, 386 unsigned long idx, 387 u32 *ctrl) 388 { 389 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx); 390 391 if (IS_ERR(bp)) 392 return PTR_ERR(bp); 393 394 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0; 395 return 0; 396 } 397 398 static int ptrace_hbp_get_addr(unsigned int note_type, 399 struct task_struct *tsk, 400 unsigned long idx, 401 u64 *addr) 402 { 403 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx); 404 405 if (IS_ERR(bp)) 406 return PTR_ERR(bp); 407 408 *addr = bp ? counter_arch_bp(bp)->address : 0; 409 return 0; 410 } 411 412 static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type, 413 struct task_struct *tsk, 414 unsigned long idx) 415 { 416 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx); 417 418 if (!bp) 419 bp = ptrace_hbp_create(note_type, tsk, idx); 420 421 return bp; 422 } 423 424 static int ptrace_hbp_set_ctrl(unsigned int note_type, 425 struct task_struct *tsk, 426 unsigned long idx, 427 u32 uctrl) 428 { 429 int err; 430 struct perf_event *bp; 431 struct perf_event_attr attr; 432 struct arch_hw_breakpoint_ctrl ctrl; 433 434 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx); 435 if (IS_ERR(bp)) { 436 err = PTR_ERR(bp); 437 return err; 438 } 439 440 attr = bp->attr; 441 decode_ctrl_reg(uctrl, &ctrl); 442 err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr); 443 if (err) 444 return err; 445 446 return modify_user_hw_breakpoint(bp, &attr); 447 } 448 449 static int ptrace_hbp_set_addr(unsigned int note_type, 450 struct task_struct *tsk, 451 unsigned long idx, 452 u64 addr) 453 { 454 int err; 455 struct perf_event *bp; 456 struct perf_event_attr attr; 457 458 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx); 459 if (IS_ERR(bp)) { 460 err = PTR_ERR(bp); 461 return err; 462 } 463 464 attr = bp->attr; 465 attr.bp_addr = addr; 466 err = modify_user_hw_breakpoint(bp, &attr); 467 return err; 468 } 469 470 #define PTRACE_HBP_ADDR_SZ sizeof(u64) 471 #define PTRACE_HBP_CTRL_SZ sizeof(u32) 472 #define PTRACE_HBP_PAD_SZ sizeof(u32) 473 474 static int hw_break_get(struct task_struct *target, 475 const struct user_regset *regset, 476 unsigned int pos, unsigned int count, 477 void *kbuf, void __user *ubuf) 478 { 479 unsigned int note_type = regset->core_note_type; 480 int ret, idx = 0, offset, limit; 481 u32 info, ctrl; 482 u64 addr; 483 484 /* Resource info */ 485 ret = ptrace_hbp_get_resource_info(note_type, &info); 486 if (ret) 487 return ret; 488 489 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0, 490 sizeof(info)); 491 if (ret) 492 return ret; 493 494 /* Pad */ 495 offset = offsetof(struct user_hwdebug_state, pad); 496 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset, 497 offset + PTRACE_HBP_PAD_SZ); 498 if (ret) 499 return ret; 500 501 /* (address, ctrl) registers */ 502 offset = offsetof(struct user_hwdebug_state, dbg_regs); 503 limit = regset->n * regset->size; 504 while (count && offset < limit) { 505 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr); 506 if (ret) 507 return ret; 508 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr, 509 offset, offset + PTRACE_HBP_ADDR_SZ); 510 if (ret) 511 return ret; 512 offset += PTRACE_HBP_ADDR_SZ; 513 514 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl); 515 if (ret) 516 return ret; 517 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl, 518 offset, offset + PTRACE_HBP_CTRL_SZ); 519 if (ret) 520 return ret; 521 offset += PTRACE_HBP_CTRL_SZ; 522 523 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, 524 offset, 525 offset + PTRACE_HBP_PAD_SZ); 526 if (ret) 527 return ret; 528 offset += PTRACE_HBP_PAD_SZ; 529 idx++; 530 } 531 532 return 0; 533 } 534 535 static int hw_break_set(struct task_struct *target, 536 const struct user_regset *regset, 537 unsigned int pos, unsigned int count, 538 const void *kbuf, const void __user *ubuf) 539 { 540 unsigned int note_type = regset->core_note_type; 541 int ret, idx = 0, offset, limit; 542 u32 ctrl; 543 u64 addr; 544 545 /* Resource info and pad */ 546 offset = offsetof(struct user_hwdebug_state, dbg_regs); 547 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset); 548 if (ret) 549 return ret; 550 551 /* (address, ctrl) registers */ 552 limit = regset->n * regset->size; 553 while (count && offset < limit) { 554 if (count < PTRACE_HBP_ADDR_SZ) 555 return -EINVAL; 556 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr, 557 offset, offset + PTRACE_HBP_ADDR_SZ); 558 if (ret) 559 return ret; 560 ret = ptrace_hbp_set_addr(note_type, target, idx, addr); 561 if (ret) 562 return ret; 563 offset += PTRACE_HBP_ADDR_SZ; 564 565 if (!count) 566 break; 567 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 568 offset, offset + PTRACE_HBP_CTRL_SZ); 569 if (ret) 570 return ret; 571 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl); 572 if (ret) 573 return ret; 574 offset += PTRACE_HBP_CTRL_SZ; 575 576 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 577 offset, 578 offset + PTRACE_HBP_PAD_SZ); 579 if (ret) 580 return ret; 581 offset += PTRACE_HBP_PAD_SZ; 582 idx++; 583 } 584 585 return 0; 586 } 587 #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 588 589 static int gpr_get(struct task_struct *target, 590 const struct user_regset *regset, 591 unsigned int pos, unsigned int count, 592 void *kbuf, void __user *ubuf) 593 { 594 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs; 595 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1); 596 } 597 598 static int gpr_set(struct task_struct *target, const struct user_regset *regset, 599 unsigned int pos, unsigned int count, 600 const void *kbuf, const void __user *ubuf) 601 { 602 int ret; 603 struct user_pt_regs newregs = task_pt_regs(target)->user_regs; 604 605 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1); 606 if (ret) 607 return ret; 608 609 if (!valid_user_regs(&newregs, target)) 610 return -EINVAL; 611 612 task_pt_regs(target)->user_regs = newregs; 613 return 0; 614 } 615 616 /* 617 * TODO: update fp accessors for lazy context switching (sync/flush hwstate) 618 */ 619 static int fpr_get(struct task_struct *target, const struct user_regset *regset, 620 unsigned int pos, unsigned int count, 621 void *kbuf, void __user *ubuf) 622 { 623 struct user_fpsimd_state *uregs; 624 uregs = &target->thread.fpsimd_state.user_fpsimd; 625 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1); 626 } 627 628 static int fpr_set(struct task_struct *target, const struct user_regset *regset, 629 unsigned int pos, unsigned int count, 630 const void *kbuf, const void __user *ubuf) 631 { 632 int ret; 633 struct user_fpsimd_state newstate = 634 target->thread.fpsimd_state.user_fpsimd; 635 636 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1); 637 if (ret) 638 return ret; 639 640 target->thread.fpsimd_state.user_fpsimd = newstate; 641 fpsimd_flush_task_state(target); 642 return ret; 643 } 644 645 static int tls_get(struct task_struct *target, const struct user_regset *regset, 646 unsigned int pos, unsigned int count, 647 void *kbuf, void __user *ubuf) 648 { 649 unsigned long *tls = &target->thread.tp_value; 650 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1); 651 } 652 653 static int tls_set(struct task_struct *target, const struct user_regset *regset, 654 unsigned int pos, unsigned int count, 655 const void *kbuf, const void __user *ubuf) 656 { 657 int ret; 658 unsigned long tls = target->thread.tp_value; 659 660 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1); 661 if (ret) 662 return ret; 663 664 target->thread.tp_value = tls; 665 return ret; 666 } 667 668 static int system_call_get(struct task_struct *target, 669 const struct user_regset *regset, 670 unsigned int pos, unsigned int count, 671 void *kbuf, void __user *ubuf) 672 { 673 int syscallno = task_pt_regs(target)->syscallno; 674 675 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 676 &syscallno, 0, -1); 677 } 678 679 static int system_call_set(struct task_struct *target, 680 const struct user_regset *regset, 681 unsigned int pos, unsigned int count, 682 const void *kbuf, const void __user *ubuf) 683 { 684 int syscallno = task_pt_regs(target)->syscallno; 685 int ret; 686 687 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1); 688 if (ret) 689 return ret; 690 691 task_pt_regs(target)->syscallno = syscallno; 692 return ret; 693 } 694 695 enum aarch64_regset { 696 REGSET_GPR, 697 REGSET_FPR, 698 REGSET_TLS, 699 #ifdef CONFIG_HAVE_HW_BREAKPOINT 700 REGSET_HW_BREAK, 701 REGSET_HW_WATCH, 702 #endif 703 REGSET_SYSTEM_CALL, 704 }; 705 706 static const struct user_regset aarch64_regsets[] = { 707 [REGSET_GPR] = { 708 .core_note_type = NT_PRSTATUS, 709 .n = sizeof(struct user_pt_regs) / sizeof(u64), 710 .size = sizeof(u64), 711 .align = sizeof(u64), 712 .get = gpr_get, 713 .set = gpr_set 714 }, 715 [REGSET_FPR] = { 716 .core_note_type = NT_PRFPREG, 717 .n = sizeof(struct user_fpsimd_state) / sizeof(u32), 718 /* 719 * We pretend we have 32-bit registers because the fpsr and 720 * fpcr are 32-bits wide. 721 */ 722 .size = sizeof(u32), 723 .align = sizeof(u32), 724 .get = fpr_get, 725 .set = fpr_set 726 }, 727 [REGSET_TLS] = { 728 .core_note_type = NT_ARM_TLS, 729 .n = 1, 730 .size = sizeof(void *), 731 .align = sizeof(void *), 732 .get = tls_get, 733 .set = tls_set, 734 }, 735 #ifdef CONFIG_HAVE_HW_BREAKPOINT 736 [REGSET_HW_BREAK] = { 737 .core_note_type = NT_ARM_HW_BREAK, 738 .n = sizeof(struct user_hwdebug_state) / sizeof(u32), 739 .size = sizeof(u32), 740 .align = sizeof(u32), 741 .get = hw_break_get, 742 .set = hw_break_set, 743 }, 744 [REGSET_HW_WATCH] = { 745 .core_note_type = NT_ARM_HW_WATCH, 746 .n = sizeof(struct user_hwdebug_state) / sizeof(u32), 747 .size = sizeof(u32), 748 .align = sizeof(u32), 749 .get = hw_break_get, 750 .set = hw_break_set, 751 }, 752 #endif 753 [REGSET_SYSTEM_CALL] = { 754 .core_note_type = NT_ARM_SYSTEM_CALL, 755 .n = 1, 756 .size = sizeof(int), 757 .align = sizeof(int), 758 .get = system_call_get, 759 .set = system_call_set, 760 }, 761 }; 762 763 static const struct user_regset_view user_aarch64_view = { 764 .name = "aarch64", .e_machine = EM_AARCH64, 765 .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets) 766 }; 767 768 #ifdef CONFIG_COMPAT 769 #include <linux/compat.h> 770 771 enum compat_regset { 772 REGSET_COMPAT_GPR, 773 REGSET_COMPAT_VFP, 774 }; 775 776 static int compat_gpr_get(struct task_struct *target, 777 const struct user_regset *regset, 778 unsigned int pos, unsigned int count, 779 void *kbuf, void __user *ubuf) 780 { 781 int ret = 0; 782 unsigned int i, start, num_regs; 783 784 /* Calculate the number of AArch32 registers contained in count */ 785 num_regs = count / regset->size; 786 787 /* Convert pos into an register number */ 788 start = pos / regset->size; 789 790 if (start + num_regs > regset->n) 791 return -EIO; 792 793 for (i = 0; i < num_regs; ++i) { 794 unsigned int idx = start + i; 795 compat_ulong_t reg; 796 797 switch (idx) { 798 case 15: 799 reg = task_pt_regs(target)->pc; 800 break; 801 case 16: 802 reg = task_pt_regs(target)->pstate; 803 break; 804 case 17: 805 reg = task_pt_regs(target)->orig_x0; 806 break; 807 default: 808 reg = task_pt_regs(target)->regs[idx]; 809 } 810 811 if (kbuf) { 812 memcpy(kbuf, ®, sizeof(reg)); 813 kbuf += sizeof(reg); 814 } else { 815 ret = copy_to_user(ubuf, ®, sizeof(reg)); 816 if (ret) { 817 ret = -EFAULT; 818 break; 819 } 820 821 ubuf += sizeof(reg); 822 } 823 } 824 825 return ret; 826 } 827 828 static int compat_gpr_set(struct task_struct *target, 829 const struct user_regset *regset, 830 unsigned int pos, unsigned int count, 831 const void *kbuf, const void __user *ubuf) 832 { 833 struct pt_regs newregs; 834 int ret = 0; 835 unsigned int i, start, num_regs; 836 837 /* Calculate the number of AArch32 registers contained in count */ 838 num_regs = count / regset->size; 839 840 /* Convert pos into an register number */ 841 start = pos / regset->size; 842 843 if (start + num_regs > regset->n) 844 return -EIO; 845 846 newregs = *task_pt_regs(target); 847 848 for (i = 0; i < num_regs; ++i) { 849 unsigned int idx = start + i; 850 compat_ulong_t reg; 851 852 if (kbuf) { 853 memcpy(®, kbuf, sizeof(reg)); 854 kbuf += sizeof(reg); 855 } else { 856 ret = copy_from_user(®, ubuf, sizeof(reg)); 857 if (ret) { 858 ret = -EFAULT; 859 break; 860 } 861 862 ubuf += sizeof(reg); 863 } 864 865 switch (idx) { 866 case 15: 867 newregs.pc = reg; 868 break; 869 case 16: 870 newregs.pstate = reg; 871 break; 872 case 17: 873 newregs.orig_x0 = reg; 874 break; 875 default: 876 newregs.regs[idx] = reg; 877 } 878 879 } 880 881 if (valid_user_regs(&newregs.user_regs, target)) 882 *task_pt_regs(target) = newregs; 883 else 884 ret = -EINVAL; 885 886 return ret; 887 } 888 889 static int compat_vfp_get(struct task_struct *target, 890 const struct user_regset *regset, 891 unsigned int pos, unsigned int count, 892 void *kbuf, void __user *ubuf) 893 { 894 struct user_fpsimd_state *uregs; 895 compat_ulong_t fpscr; 896 int ret; 897 898 uregs = &target->thread.fpsimd_state.user_fpsimd; 899 900 /* 901 * The VFP registers are packed into the fpsimd_state, so they all sit 902 * nicely together for us. We just need to create the fpscr separately. 903 */ 904 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, 905 VFP_STATE_SIZE - sizeof(compat_ulong_t)); 906 907 if (count && !ret) { 908 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) | 909 (uregs->fpcr & VFP_FPSCR_CTRL_MASK); 910 ret = put_user(fpscr, (compat_ulong_t *)ubuf); 911 } 912 913 return ret; 914 } 915 916 static int compat_vfp_set(struct task_struct *target, 917 const struct user_regset *regset, 918 unsigned int pos, unsigned int count, 919 const void *kbuf, const void __user *ubuf) 920 { 921 struct user_fpsimd_state *uregs; 922 compat_ulong_t fpscr; 923 int ret; 924 925 if (pos + count > VFP_STATE_SIZE) 926 return -EIO; 927 928 uregs = &target->thread.fpsimd_state.user_fpsimd; 929 930 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0, 931 VFP_STATE_SIZE - sizeof(compat_ulong_t)); 932 933 if (count && !ret) { 934 ret = get_user(fpscr, (compat_ulong_t *)ubuf); 935 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK; 936 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK; 937 } 938 939 fpsimd_flush_task_state(target); 940 return ret; 941 } 942 943 static int compat_tls_get(struct task_struct *target, 944 const struct user_regset *regset, unsigned int pos, 945 unsigned int count, void *kbuf, void __user *ubuf) 946 { 947 compat_ulong_t tls = (compat_ulong_t)target->thread.tp_value; 948 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1); 949 } 950 951 static int compat_tls_set(struct task_struct *target, 952 const struct user_regset *regset, unsigned int pos, 953 unsigned int count, const void *kbuf, 954 const void __user *ubuf) 955 { 956 int ret; 957 compat_ulong_t tls = target->thread.tp_value; 958 959 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1); 960 if (ret) 961 return ret; 962 963 target->thread.tp_value = tls; 964 return ret; 965 } 966 967 static const struct user_regset aarch32_regsets[] = { 968 [REGSET_COMPAT_GPR] = { 969 .core_note_type = NT_PRSTATUS, 970 .n = COMPAT_ELF_NGREG, 971 .size = sizeof(compat_elf_greg_t), 972 .align = sizeof(compat_elf_greg_t), 973 .get = compat_gpr_get, 974 .set = compat_gpr_set 975 }, 976 [REGSET_COMPAT_VFP] = { 977 .core_note_type = NT_ARM_VFP, 978 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t), 979 .size = sizeof(compat_ulong_t), 980 .align = sizeof(compat_ulong_t), 981 .get = compat_vfp_get, 982 .set = compat_vfp_set 983 }, 984 }; 985 986 static const struct user_regset_view user_aarch32_view = { 987 .name = "aarch32", .e_machine = EM_ARM, 988 .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets) 989 }; 990 991 static const struct user_regset aarch32_ptrace_regsets[] = { 992 [REGSET_GPR] = { 993 .core_note_type = NT_PRSTATUS, 994 .n = COMPAT_ELF_NGREG, 995 .size = sizeof(compat_elf_greg_t), 996 .align = sizeof(compat_elf_greg_t), 997 .get = compat_gpr_get, 998 .set = compat_gpr_set 999 }, 1000 [REGSET_FPR] = { 1001 .core_note_type = NT_ARM_VFP, 1002 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t), 1003 .size = sizeof(compat_ulong_t), 1004 .align = sizeof(compat_ulong_t), 1005 .get = compat_vfp_get, 1006 .set = compat_vfp_set 1007 }, 1008 [REGSET_TLS] = { 1009 .core_note_type = NT_ARM_TLS, 1010 .n = 1, 1011 .size = sizeof(compat_ulong_t), 1012 .align = sizeof(compat_ulong_t), 1013 .get = compat_tls_get, 1014 .set = compat_tls_set, 1015 }, 1016 #ifdef CONFIG_HAVE_HW_BREAKPOINT 1017 [REGSET_HW_BREAK] = { 1018 .core_note_type = NT_ARM_HW_BREAK, 1019 .n = sizeof(struct user_hwdebug_state) / sizeof(u32), 1020 .size = sizeof(u32), 1021 .align = sizeof(u32), 1022 .get = hw_break_get, 1023 .set = hw_break_set, 1024 }, 1025 [REGSET_HW_WATCH] = { 1026 .core_note_type = NT_ARM_HW_WATCH, 1027 .n = sizeof(struct user_hwdebug_state) / sizeof(u32), 1028 .size = sizeof(u32), 1029 .align = sizeof(u32), 1030 .get = hw_break_get, 1031 .set = hw_break_set, 1032 }, 1033 #endif 1034 [REGSET_SYSTEM_CALL] = { 1035 .core_note_type = NT_ARM_SYSTEM_CALL, 1036 .n = 1, 1037 .size = sizeof(int), 1038 .align = sizeof(int), 1039 .get = system_call_get, 1040 .set = system_call_set, 1041 }, 1042 }; 1043 1044 static const struct user_regset_view user_aarch32_ptrace_view = { 1045 .name = "aarch32", .e_machine = EM_ARM, 1046 .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets) 1047 }; 1048 1049 static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off, 1050 compat_ulong_t __user *ret) 1051 { 1052 compat_ulong_t tmp; 1053 1054 if (off & 3) 1055 return -EIO; 1056 1057 if (off == COMPAT_PT_TEXT_ADDR) 1058 tmp = tsk->mm->start_code; 1059 else if (off == COMPAT_PT_DATA_ADDR) 1060 tmp = tsk->mm->start_data; 1061 else if (off == COMPAT_PT_TEXT_END_ADDR) 1062 tmp = tsk->mm->end_code; 1063 else if (off < sizeof(compat_elf_gregset_t)) 1064 return copy_regset_to_user(tsk, &user_aarch32_view, 1065 REGSET_COMPAT_GPR, off, 1066 sizeof(compat_ulong_t), ret); 1067 else if (off >= COMPAT_USER_SZ) 1068 return -EIO; 1069 else 1070 tmp = 0; 1071 1072 return put_user(tmp, ret); 1073 } 1074 1075 static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off, 1076 compat_ulong_t val) 1077 { 1078 int ret; 1079 mm_segment_t old_fs = get_fs(); 1080 1081 if (off & 3 || off >= COMPAT_USER_SZ) 1082 return -EIO; 1083 1084 if (off >= sizeof(compat_elf_gregset_t)) 1085 return 0; 1086 1087 set_fs(KERNEL_DS); 1088 ret = copy_regset_from_user(tsk, &user_aarch32_view, 1089 REGSET_COMPAT_GPR, off, 1090 sizeof(compat_ulong_t), 1091 &val); 1092 set_fs(old_fs); 1093 1094 return ret; 1095 } 1096 1097 #ifdef CONFIG_HAVE_HW_BREAKPOINT 1098 1099 /* 1100 * Convert a virtual register number into an index for a thread_info 1101 * breakpoint array. Breakpoints are identified using positive numbers 1102 * whilst watchpoints are negative. The registers are laid out as pairs 1103 * of (address, control), each pair mapping to a unique hw_breakpoint struct. 1104 * Register 0 is reserved for describing resource information. 1105 */ 1106 static int compat_ptrace_hbp_num_to_idx(compat_long_t num) 1107 { 1108 return (abs(num) - 1) >> 1; 1109 } 1110 1111 static int compat_ptrace_hbp_get_resource_info(u32 *kdata) 1112 { 1113 u8 num_brps, num_wrps, debug_arch, wp_len; 1114 u32 reg = 0; 1115 1116 num_brps = hw_breakpoint_slots(TYPE_INST); 1117 num_wrps = hw_breakpoint_slots(TYPE_DATA); 1118 1119 debug_arch = debug_monitors_arch(); 1120 wp_len = 8; 1121 reg |= debug_arch; 1122 reg <<= 8; 1123 reg |= wp_len; 1124 reg <<= 8; 1125 reg |= num_wrps; 1126 reg <<= 8; 1127 reg |= num_brps; 1128 1129 *kdata = reg; 1130 return 0; 1131 } 1132 1133 static int compat_ptrace_hbp_get(unsigned int note_type, 1134 struct task_struct *tsk, 1135 compat_long_t num, 1136 u32 *kdata) 1137 { 1138 u64 addr = 0; 1139 u32 ctrl = 0; 1140 1141 int err, idx = compat_ptrace_hbp_num_to_idx(num);; 1142 1143 if (num & 1) { 1144 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr); 1145 *kdata = (u32)addr; 1146 } else { 1147 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl); 1148 *kdata = ctrl; 1149 } 1150 1151 return err; 1152 } 1153 1154 static int compat_ptrace_hbp_set(unsigned int note_type, 1155 struct task_struct *tsk, 1156 compat_long_t num, 1157 u32 *kdata) 1158 { 1159 u64 addr; 1160 u32 ctrl; 1161 1162 int err, idx = compat_ptrace_hbp_num_to_idx(num); 1163 1164 if (num & 1) { 1165 addr = *kdata; 1166 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr); 1167 } else { 1168 ctrl = *kdata; 1169 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl); 1170 } 1171 1172 return err; 1173 } 1174 1175 static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num, 1176 compat_ulong_t __user *data) 1177 { 1178 int ret; 1179 u32 kdata; 1180 mm_segment_t old_fs = get_fs(); 1181 1182 set_fs(KERNEL_DS); 1183 /* Watchpoint */ 1184 if (num < 0) { 1185 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata); 1186 /* Resource info */ 1187 } else if (num == 0) { 1188 ret = compat_ptrace_hbp_get_resource_info(&kdata); 1189 /* Breakpoint */ 1190 } else { 1191 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata); 1192 } 1193 set_fs(old_fs); 1194 1195 if (!ret) 1196 ret = put_user(kdata, data); 1197 1198 return ret; 1199 } 1200 1201 static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num, 1202 compat_ulong_t __user *data) 1203 { 1204 int ret; 1205 u32 kdata = 0; 1206 mm_segment_t old_fs = get_fs(); 1207 1208 if (num == 0) 1209 return 0; 1210 1211 ret = get_user(kdata, data); 1212 if (ret) 1213 return ret; 1214 1215 set_fs(KERNEL_DS); 1216 if (num < 0) 1217 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata); 1218 else 1219 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata); 1220 set_fs(old_fs); 1221 1222 return ret; 1223 } 1224 #endif /* CONFIG_HAVE_HW_BREAKPOINT */ 1225 1226 long compat_arch_ptrace(struct task_struct *child, compat_long_t request, 1227 compat_ulong_t caddr, compat_ulong_t cdata) 1228 { 1229 unsigned long addr = caddr; 1230 unsigned long data = cdata; 1231 void __user *datap = compat_ptr(data); 1232 int ret; 1233 1234 switch (request) { 1235 case PTRACE_PEEKUSR: 1236 ret = compat_ptrace_read_user(child, addr, datap); 1237 break; 1238 1239 case PTRACE_POKEUSR: 1240 ret = compat_ptrace_write_user(child, addr, data); 1241 break; 1242 1243 case COMPAT_PTRACE_GETREGS: 1244 ret = copy_regset_to_user(child, 1245 &user_aarch32_view, 1246 REGSET_COMPAT_GPR, 1247 0, sizeof(compat_elf_gregset_t), 1248 datap); 1249 break; 1250 1251 case COMPAT_PTRACE_SETREGS: 1252 ret = copy_regset_from_user(child, 1253 &user_aarch32_view, 1254 REGSET_COMPAT_GPR, 1255 0, sizeof(compat_elf_gregset_t), 1256 datap); 1257 break; 1258 1259 case COMPAT_PTRACE_GET_THREAD_AREA: 1260 ret = put_user((compat_ulong_t)child->thread.tp_value, 1261 (compat_ulong_t __user *)datap); 1262 break; 1263 1264 case COMPAT_PTRACE_SET_SYSCALL: 1265 task_pt_regs(child)->syscallno = data; 1266 ret = 0; 1267 break; 1268 1269 case COMPAT_PTRACE_GETVFPREGS: 1270 ret = copy_regset_to_user(child, 1271 &user_aarch32_view, 1272 REGSET_COMPAT_VFP, 1273 0, VFP_STATE_SIZE, 1274 datap); 1275 break; 1276 1277 case COMPAT_PTRACE_SETVFPREGS: 1278 ret = copy_regset_from_user(child, 1279 &user_aarch32_view, 1280 REGSET_COMPAT_VFP, 1281 0, VFP_STATE_SIZE, 1282 datap); 1283 break; 1284 1285 #ifdef CONFIG_HAVE_HW_BREAKPOINT 1286 case COMPAT_PTRACE_GETHBPREGS: 1287 ret = compat_ptrace_gethbpregs(child, addr, datap); 1288 break; 1289 1290 case COMPAT_PTRACE_SETHBPREGS: 1291 ret = compat_ptrace_sethbpregs(child, addr, datap); 1292 break; 1293 #endif 1294 1295 default: 1296 ret = compat_ptrace_request(child, request, addr, 1297 data); 1298 break; 1299 } 1300 1301 return ret; 1302 } 1303 #endif /* CONFIG_COMPAT */ 1304 1305 const struct user_regset_view *task_user_regset_view(struct task_struct *task) 1306 { 1307 #ifdef CONFIG_COMPAT 1308 /* 1309 * Core dumping of 32-bit tasks or compat ptrace requests must use the 1310 * user_aarch32_view compatible with arm32. Native ptrace requests on 1311 * 32-bit children use an extended user_aarch32_ptrace_view to allow 1312 * access to the TLS register. 1313 */ 1314 if (is_compat_task()) 1315 return &user_aarch32_view; 1316 else if (is_compat_thread(task_thread_info(task))) 1317 return &user_aarch32_ptrace_view; 1318 #endif 1319 return &user_aarch64_view; 1320 } 1321 1322 long arch_ptrace(struct task_struct *child, long request, 1323 unsigned long addr, unsigned long data) 1324 { 1325 return ptrace_request(child, request, addr, data); 1326 } 1327 1328 enum ptrace_syscall_dir { 1329 PTRACE_SYSCALL_ENTER = 0, 1330 PTRACE_SYSCALL_EXIT, 1331 }; 1332 1333 static void tracehook_report_syscall(struct pt_regs *regs, 1334 enum ptrace_syscall_dir dir) 1335 { 1336 int regno; 1337 unsigned long saved_reg; 1338 1339 /* 1340 * A scratch register (ip(r12) on AArch32, x7 on AArch64) is 1341 * used to denote syscall entry/exit: 1342 */ 1343 regno = (is_compat_task() ? 12 : 7); 1344 saved_reg = regs->regs[regno]; 1345 regs->regs[regno] = dir; 1346 1347 if (dir == PTRACE_SYSCALL_EXIT) 1348 tracehook_report_syscall_exit(regs, 0); 1349 else if (tracehook_report_syscall_entry(regs)) 1350 regs->syscallno = ~0UL; 1351 1352 regs->regs[regno] = saved_reg; 1353 } 1354 1355 asmlinkage int syscall_trace_enter(struct pt_regs *regs) 1356 { 1357 if (test_thread_flag(TIF_SYSCALL_TRACE)) 1358 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER); 1359 1360 /* Do the secure computing after ptrace; failures should be fast. */ 1361 if (secure_computing(NULL) == -1) 1362 return -1; 1363 1364 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) 1365 trace_sys_enter(regs, regs->syscallno); 1366 1367 audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1], 1368 regs->regs[2], regs->regs[3]); 1369 1370 return regs->syscallno; 1371 } 1372 1373 asmlinkage void syscall_trace_exit(struct pt_regs *regs) 1374 { 1375 audit_syscall_exit(regs); 1376 1377 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) 1378 trace_sys_exit(regs, regs_return_value(regs)); 1379 1380 if (test_thread_flag(TIF_SYSCALL_TRACE)) 1381 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT); 1382 } 1383 1384 /* 1385 * Bits which are always architecturally RES0 per ARM DDI 0487A.h 1386 * Userspace cannot use these until they have an architectural meaning. 1387 * We also reserve IL for the kernel; SS is handled dynamically. 1388 */ 1389 #define SPSR_EL1_AARCH64_RES0_BITS \ 1390 (GENMASK_ULL(63,32) | GENMASK_ULL(27, 22) | GENMASK_ULL(20, 10) | \ 1391 GENMASK_ULL(5, 5)) 1392 #define SPSR_EL1_AARCH32_RES0_BITS \ 1393 (GENMASK_ULL(63,32) | GENMASK_ULL(24, 22) | GENMASK_ULL(20,20)) 1394 1395 static int valid_compat_regs(struct user_pt_regs *regs) 1396 { 1397 regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS; 1398 1399 if (!system_supports_mixed_endian_el0()) { 1400 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) 1401 regs->pstate |= COMPAT_PSR_E_BIT; 1402 else 1403 regs->pstate &= ~COMPAT_PSR_E_BIT; 1404 } 1405 1406 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) && 1407 (regs->pstate & COMPAT_PSR_A_BIT) == 0 && 1408 (regs->pstate & COMPAT_PSR_I_BIT) == 0 && 1409 (regs->pstate & COMPAT_PSR_F_BIT) == 0) { 1410 return 1; 1411 } 1412 1413 /* 1414 * Force PSR to a valid 32-bit EL0t, preserving the same bits as 1415 * arch/arm. 1416 */ 1417 regs->pstate &= COMPAT_PSR_N_BIT | COMPAT_PSR_Z_BIT | 1418 COMPAT_PSR_C_BIT | COMPAT_PSR_V_BIT | 1419 COMPAT_PSR_Q_BIT | COMPAT_PSR_IT_MASK | 1420 COMPAT_PSR_GE_MASK | COMPAT_PSR_E_BIT | 1421 COMPAT_PSR_T_BIT; 1422 regs->pstate |= PSR_MODE32_BIT; 1423 1424 return 0; 1425 } 1426 1427 static int valid_native_regs(struct user_pt_regs *regs) 1428 { 1429 regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS; 1430 1431 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) && 1432 (regs->pstate & PSR_D_BIT) == 0 && 1433 (regs->pstate & PSR_A_BIT) == 0 && 1434 (regs->pstate & PSR_I_BIT) == 0 && 1435 (regs->pstate & PSR_F_BIT) == 0) { 1436 return 1; 1437 } 1438 1439 /* Force PSR to a valid 64-bit EL0t */ 1440 regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT; 1441 1442 return 0; 1443 } 1444 1445 /* 1446 * Are the current registers suitable for user mode? (used to maintain 1447 * security in signal handlers) 1448 */ 1449 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task) 1450 { 1451 if (!test_tsk_thread_flag(task, TIF_SINGLESTEP)) 1452 regs->pstate &= ~DBG_SPSR_SS; 1453 1454 if (is_compat_thread(task_thread_info(task))) 1455 return valid_compat_regs(regs); 1456 else 1457 return valid_native_regs(regs); 1458 } 1459