1 /* 2 * Based on arch/arm/kernel/process.c 3 * 4 * Original Copyright (C) 1995 Linus Torvalds 5 * Copyright (C) 1996-2000 Russell King - Converted to ARM. 6 * Copyright (C) 2012 ARM Ltd. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program. If not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include <stdarg.h> 22 23 #include <linux/export.h> 24 #include <linux/sched.h> 25 #include <linux/kernel.h> 26 #include <linux/mm.h> 27 #include <linux/stddef.h> 28 #include <linux/unistd.h> 29 #include <linux/user.h> 30 #include <linux/delay.h> 31 #include <linux/reboot.h> 32 #include <linux/interrupt.h> 33 #include <linux/kallsyms.h> 34 #include <linux/init.h> 35 #include <linux/cpu.h> 36 #include <linux/elfcore.h> 37 #include <linux/pm.h> 38 #include <linux/tick.h> 39 #include <linux/utsname.h> 40 #include <linux/uaccess.h> 41 #include <linux/random.h> 42 #include <linux/hw_breakpoint.h> 43 #include <linux/personality.h> 44 #include <linux/notifier.h> 45 46 #include <asm/compat.h> 47 #include <asm/cacheflush.h> 48 #include <asm/fpsimd.h> 49 #include <asm/mmu_context.h> 50 #include <asm/processor.h> 51 #include <asm/stacktrace.h> 52 53 static void setup_restart(void) 54 { 55 /* 56 * Tell the mm system that we are going to reboot - 57 * we may need it to insert some 1:1 mappings so that 58 * soft boot works. 59 */ 60 setup_mm_for_reboot(); 61 62 /* Clean and invalidate caches */ 63 flush_cache_all(); 64 65 /* Turn D-cache off */ 66 cpu_cache_off(); 67 68 /* Push out any further dirty data, and ensure cache is empty */ 69 flush_cache_all(); 70 } 71 72 void soft_restart(unsigned long addr) 73 { 74 setup_restart(); 75 cpu_reset(addr); 76 } 77 78 /* 79 * Function pointers to optional machine specific functions 80 */ 81 void (*pm_power_off)(void); 82 EXPORT_SYMBOL_GPL(pm_power_off); 83 84 void (*arm_pm_restart)(char str, const char *cmd); 85 EXPORT_SYMBOL_GPL(arm_pm_restart); 86 87 void arch_cpu_idle_prepare(void) 88 { 89 local_fiq_enable(); 90 } 91 92 /* 93 * This is our default idle handler. 94 */ 95 void arch_cpu_idle(void) 96 { 97 /* 98 * This should do all the clock switching and wait for interrupt 99 * tricks 100 */ 101 cpu_do_idle(); 102 local_irq_enable(); 103 } 104 105 void machine_shutdown(void) 106 { 107 #ifdef CONFIG_SMP 108 smp_send_stop(); 109 #endif 110 } 111 112 void machine_halt(void) 113 { 114 machine_shutdown(); 115 while (1); 116 } 117 118 void machine_power_off(void) 119 { 120 machine_shutdown(); 121 if (pm_power_off) 122 pm_power_off(); 123 } 124 125 void machine_restart(char *cmd) 126 { 127 machine_shutdown(); 128 129 /* Disable interrupts first */ 130 local_irq_disable(); 131 local_fiq_disable(); 132 133 /* Now call the architecture specific reboot code. */ 134 if (arm_pm_restart) 135 arm_pm_restart('h', cmd); 136 137 /* 138 * Whoops - the architecture was unable to reboot. 139 */ 140 printk("Reboot failed -- System halted\n"); 141 while (1); 142 } 143 144 void __show_regs(struct pt_regs *regs) 145 { 146 int i; 147 148 show_regs_print_info(KERN_DEFAULT); 149 print_symbol("PC is at %s\n", instruction_pointer(regs)); 150 print_symbol("LR is at %s\n", regs->regs[30]); 151 printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n", 152 regs->pc, regs->regs[30], regs->pstate); 153 printk("sp : %016llx\n", regs->sp); 154 for (i = 29; i >= 0; i--) { 155 printk("x%-2d: %016llx ", i, regs->regs[i]); 156 if (i % 2 == 0) 157 printk("\n"); 158 } 159 printk("\n"); 160 } 161 162 void show_regs(struct pt_regs * regs) 163 { 164 printk("\n"); 165 __show_regs(regs); 166 } 167 168 /* 169 * Free current thread data structures etc.. 170 */ 171 void exit_thread(void) 172 { 173 } 174 175 void flush_thread(void) 176 { 177 fpsimd_flush_thread(); 178 flush_ptrace_hw_breakpoint(current); 179 } 180 181 void release_thread(struct task_struct *dead_task) 182 { 183 } 184 185 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 186 { 187 fpsimd_save_state(¤t->thread.fpsimd_state); 188 *dst = *src; 189 return 0; 190 } 191 192 asmlinkage void ret_from_fork(void) asm("ret_from_fork"); 193 194 int copy_thread(unsigned long clone_flags, unsigned long stack_start, 195 unsigned long stk_sz, struct task_struct *p) 196 { 197 struct pt_regs *childregs = task_pt_regs(p); 198 unsigned long tls = p->thread.tp_value; 199 200 memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context)); 201 202 if (likely(!(p->flags & PF_KTHREAD))) { 203 *childregs = *current_pt_regs(); 204 childregs->regs[0] = 0; 205 if (is_compat_thread(task_thread_info(p))) { 206 if (stack_start) 207 childregs->compat_sp = stack_start; 208 } else { 209 /* 210 * Read the current TLS pointer from tpidr_el0 as it may be 211 * out-of-sync with the saved value. 212 */ 213 asm("mrs %0, tpidr_el0" : "=r" (tls)); 214 if (stack_start) { 215 /* 16-byte aligned stack mandatory on AArch64 */ 216 if (stack_start & 15) 217 return -EINVAL; 218 childregs->sp = stack_start; 219 } 220 } 221 /* 222 * If a TLS pointer was passed to clone (4th argument), use it 223 * for the new thread. 224 */ 225 if (clone_flags & CLONE_SETTLS) 226 tls = childregs->regs[3]; 227 } else { 228 memset(childregs, 0, sizeof(struct pt_regs)); 229 childregs->pstate = PSR_MODE_EL1h; 230 p->thread.cpu_context.x19 = stack_start; 231 p->thread.cpu_context.x20 = stk_sz; 232 } 233 p->thread.cpu_context.pc = (unsigned long)ret_from_fork; 234 p->thread.cpu_context.sp = (unsigned long)childregs; 235 p->thread.tp_value = tls; 236 237 ptrace_hw_copy_thread(p); 238 239 return 0; 240 } 241 242 static void tls_thread_switch(struct task_struct *next) 243 { 244 unsigned long tpidr, tpidrro; 245 246 if (!is_compat_task()) { 247 asm("mrs %0, tpidr_el0" : "=r" (tpidr)); 248 current->thread.tp_value = tpidr; 249 } 250 251 if (is_compat_thread(task_thread_info(next))) { 252 tpidr = 0; 253 tpidrro = next->thread.tp_value; 254 } else { 255 tpidr = next->thread.tp_value; 256 tpidrro = 0; 257 } 258 259 asm( 260 " msr tpidr_el0, %0\n" 261 " msr tpidrro_el0, %1" 262 : : "r" (tpidr), "r" (tpidrro)); 263 } 264 265 /* 266 * Thread switching. 267 */ 268 struct task_struct *__switch_to(struct task_struct *prev, 269 struct task_struct *next) 270 { 271 struct task_struct *last; 272 273 fpsimd_thread_switch(next); 274 tls_thread_switch(next); 275 hw_breakpoint_thread_switch(next); 276 contextidr_thread_switch(next); 277 278 /* 279 * Complete any pending TLB or cache maintenance on this CPU in case 280 * the thread migrates to a different CPU. 281 */ 282 dsb(); 283 284 /* the actual thread switch */ 285 last = cpu_switch_to(prev, next); 286 287 return last; 288 } 289 290 unsigned long get_wchan(struct task_struct *p) 291 { 292 struct stackframe frame; 293 int count = 0; 294 if (!p || p == current || p->state == TASK_RUNNING) 295 return 0; 296 297 frame.fp = thread_saved_fp(p); 298 frame.sp = thread_saved_sp(p); 299 frame.pc = thread_saved_pc(p); 300 do { 301 int ret = unwind_frame(&frame); 302 if (ret < 0) 303 return 0; 304 if (!in_sched_functions(frame.pc)) 305 return frame.pc; 306 } while (count ++ < 16); 307 return 0; 308 } 309 310 unsigned long arch_align_stack(unsigned long sp) 311 { 312 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 313 sp -= get_random_int() & ~PAGE_MASK; 314 return sp & ~0xf; 315 } 316 317 static unsigned long randomize_base(unsigned long base) 318 { 319 unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1; 320 return randomize_range(base, range_end, 0) ? : base; 321 } 322 323 unsigned long arch_randomize_brk(struct mm_struct *mm) 324 { 325 return randomize_base(mm->brk); 326 } 327 328 unsigned long randomize_et_dyn(unsigned long base) 329 { 330 return randomize_base(base); 331 } 332