1 /* 2 * Based on arch/arm/kernel/process.c 3 * 4 * Original Copyright (C) 1995 Linus Torvalds 5 * Copyright (C) 1996-2000 Russell King - Converted to ARM. 6 * Copyright (C) 2012 ARM Ltd. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program. If not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include <stdarg.h> 22 23 #include <linux/compat.h> 24 #include <linux/efi.h> 25 #include <linux/export.h> 26 #include <linux/sched.h> 27 #include <linux/kernel.h> 28 #include <linux/mm.h> 29 #include <linux/stddef.h> 30 #include <linux/unistd.h> 31 #include <linux/user.h> 32 #include <linux/delay.h> 33 #include <linux/reboot.h> 34 #include <linux/interrupt.h> 35 #include <linux/kallsyms.h> 36 #include <linux/init.h> 37 #include <linux/cpu.h> 38 #include <linux/elfcore.h> 39 #include <linux/pm.h> 40 #include <linux/tick.h> 41 #include <linux/utsname.h> 42 #include <linux/uaccess.h> 43 #include <linux/random.h> 44 #include <linux/hw_breakpoint.h> 45 #include <linux/personality.h> 46 #include <linux/notifier.h> 47 #include <trace/events/power.h> 48 #include <linux/percpu.h> 49 50 #include <asm/alternative.h> 51 #include <asm/compat.h> 52 #include <asm/cacheflush.h> 53 #include <asm/exec.h> 54 #include <asm/fpsimd.h> 55 #include <asm/mmu_context.h> 56 #include <asm/processor.h> 57 #include <asm/stacktrace.h> 58 59 #ifdef CONFIG_CC_STACKPROTECTOR 60 #include <linux/stackprotector.h> 61 unsigned long __stack_chk_guard __read_mostly; 62 EXPORT_SYMBOL(__stack_chk_guard); 63 #endif 64 65 /* 66 * Function pointers to optional machine specific functions 67 */ 68 void (*pm_power_off)(void); 69 EXPORT_SYMBOL_GPL(pm_power_off); 70 71 void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd); 72 73 /* 74 * This is our default idle handler. 75 */ 76 void arch_cpu_idle(void) 77 { 78 /* 79 * This should do all the clock switching and wait for interrupt 80 * tricks 81 */ 82 trace_cpu_idle_rcuidle(1, smp_processor_id()); 83 cpu_do_idle(); 84 local_irq_enable(); 85 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id()); 86 } 87 88 #ifdef CONFIG_HOTPLUG_CPU 89 void arch_cpu_idle_dead(void) 90 { 91 cpu_die(); 92 } 93 #endif 94 95 /* 96 * Called by kexec, immediately prior to machine_kexec(). 97 * 98 * This must completely disable all secondary CPUs; simply causing those CPUs 99 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the 100 * kexec'd kernel to use any and all RAM as it sees fit, without having to 101 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug 102 * functionality embodied in disable_nonboot_cpus() to achieve this. 103 */ 104 void machine_shutdown(void) 105 { 106 disable_nonboot_cpus(); 107 } 108 109 /* 110 * Halting simply requires that the secondary CPUs stop performing any 111 * activity (executing tasks, handling interrupts). smp_send_stop() 112 * achieves this. 113 */ 114 void machine_halt(void) 115 { 116 local_irq_disable(); 117 smp_send_stop(); 118 while (1); 119 } 120 121 /* 122 * Power-off simply requires that the secondary CPUs stop performing any 123 * activity (executing tasks, handling interrupts). smp_send_stop() 124 * achieves this. When the system power is turned off, it will take all CPUs 125 * with it. 126 */ 127 void machine_power_off(void) 128 { 129 local_irq_disable(); 130 smp_send_stop(); 131 if (pm_power_off) 132 pm_power_off(); 133 } 134 135 /* 136 * Restart requires that the secondary CPUs stop performing any activity 137 * while the primary CPU resets the system. Systems with multiple CPUs must 138 * provide a HW restart implementation, to ensure that all CPUs reset at once. 139 * This is required so that any code running after reset on the primary CPU 140 * doesn't have to co-ordinate with other CPUs to ensure they aren't still 141 * executing pre-reset code, and using RAM that the primary CPU's code wishes 142 * to use. Implementing such co-ordination would be essentially impossible. 143 */ 144 void machine_restart(char *cmd) 145 { 146 /* Disable interrupts first */ 147 local_irq_disable(); 148 smp_send_stop(); 149 150 /* 151 * UpdateCapsule() depends on the system being reset via 152 * ResetSystem(). 153 */ 154 if (efi_enabled(EFI_RUNTIME_SERVICES)) 155 efi_reboot(reboot_mode, NULL); 156 157 /* Now call the architecture specific reboot code. */ 158 if (arm_pm_restart) 159 arm_pm_restart(reboot_mode, cmd); 160 else 161 do_kernel_restart(cmd); 162 163 /* 164 * Whoops - the architecture was unable to reboot. 165 */ 166 printk("Reboot failed -- System halted\n"); 167 while (1); 168 } 169 170 void __show_regs(struct pt_regs *regs) 171 { 172 int i, top_reg; 173 u64 lr, sp; 174 175 if (compat_user_mode(regs)) { 176 lr = regs->compat_lr; 177 sp = regs->compat_sp; 178 top_reg = 12; 179 } else { 180 lr = regs->regs[30]; 181 sp = regs->sp; 182 top_reg = 29; 183 } 184 185 show_regs_print_info(KERN_DEFAULT); 186 print_symbol("PC is at %s\n", instruction_pointer(regs)); 187 print_symbol("LR is at %s\n", lr); 188 printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n", 189 regs->pc, lr, regs->pstate); 190 printk("sp : %016llx\n", sp); 191 192 i = top_reg; 193 194 while (i >= 0) { 195 printk("x%-2d: %016llx ", i, regs->regs[i]); 196 i--; 197 198 if (i % 2 == 0) { 199 pr_cont("x%-2d: %016llx ", i, regs->regs[i]); 200 i--; 201 } 202 203 pr_cont("\n"); 204 } 205 printk("\n"); 206 } 207 208 void show_regs(struct pt_regs * regs) 209 { 210 printk("\n"); 211 __show_regs(regs); 212 } 213 214 static void tls_thread_flush(void) 215 { 216 write_sysreg(0, tpidr_el0); 217 218 if (is_compat_task()) { 219 current->thread.tp_value = 0; 220 221 /* 222 * We need to ensure ordering between the shadow state and the 223 * hardware state, so that we don't corrupt the hardware state 224 * with a stale shadow state during context switch. 225 */ 226 barrier(); 227 write_sysreg(0, tpidrro_el0); 228 } 229 } 230 231 void flush_thread(void) 232 { 233 fpsimd_flush_thread(); 234 tls_thread_flush(); 235 flush_ptrace_hw_breakpoint(current); 236 } 237 238 void release_thread(struct task_struct *dead_task) 239 { 240 } 241 242 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 243 { 244 if (current->mm) 245 fpsimd_preserve_current_state(); 246 *dst = *src; 247 return 0; 248 } 249 250 asmlinkage void ret_from_fork(void) asm("ret_from_fork"); 251 252 int copy_thread(unsigned long clone_flags, unsigned long stack_start, 253 unsigned long stk_sz, struct task_struct *p) 254 { 255 struct pt_regs *childregs = task_pt_regs(p); 256 257 memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context)); 258 259 if (likely(!(p->flags & PF_KTHREAD))) { 260 *childregs = *current_pt_regs(); 261 childregs->regs[0] = 0; 262 263 /* 264 * Read the current TLS pointer from tpidr_el0 as it may be 265 * out-of-sync with the saved value. 266 */ 267 *task_user_tls(p) = read_sysreg(tpidr_el0); 268 269 if (stack_start) { 270 if (is_compat_thread(task_thread_info(p))) 271 childregs->compat_sp = stack_start; 272 else 273 childregs->sp = stack_start; 274 } 275 276 /* 277 * If a TLS pointer was passed to clone (4th argument), use it 278 * for the new thread. 279 */ 280 if (clone_flags & CLONE_SETTLS) 281 p->thread.tp_value = childregs->regs[3]; 282 } else { 283 memset(childregs, 0, sizeof(struct pt_regs)); 284 childregs->pstate = PSR_MODE_EL1h; 285 if (IS_ENABLED(CONFIG_ARM64_UAO) && 286 cpus_have_const_cap(ARM64_HAS_UAO)) 287 childregs->pstate |= PSR_UAO_BIT; 288 p->thread.cpu_context.x19 = stack_start; 289 p->thread.cpu_context.x20 = stk_sz; 290 } 291 p->thread.cpu_context.pc = (unsigned long)ret_from_fork; 292 p->thread.cpu_context.sp = (unsigned long)childregs; 293 294 ptrace_hw_copy_thread(p); 295 296 return 0; 297 } 298 299 static void tls_thread_switch(struct task_struct *next) 300 { 301 unsigned long tpidr, tpidrro; 302 303 tpidr = read_sysreg(tpidr_el0); 304 *task_user_tls(current) = tpidr; 305 306 tpidr = *task_user_tls(next); 307 tpidrro = is_compat_thread(task_thread_info(next)) ? 308 next->thread.tp_value : 0; 309 310 write_sysreg(tpidr, tpidr_el0); 311 write_sysreg(tpidrro, tpidrro_el0); 312 } 313 314 /* Restore the UAO state depending on next's addr_limit */ 315 void uao_thread_switch(struct task_struct *next) 316 { 317 if (IS_ENABLED(CONFIG_ARM64_UAO)) { 318 if (task_thread_info(next)->addr_limit == KERNEL_DS) 319 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO)); 320 else 321 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO)); 322 } 323 } 324 325 /* 326 * We store our current task in sp_el0, which is clobbered by userspace. Keep a 327 * shadow copy so that we can restore this upon entry from userspace. 328 * 329 * This is *only* for exception entry from EL0, and is not valid until we 330 * __switch_to() a user task. 331 */ 332 DEFINE_PER_CPU(struct task_struct *, __entry_task); 333 334 static void entry_task_switch(struct task_struct *next) 335 { 336 __this_cpu_write(__entry_task, next); 337 } 338 339 /* 340 * Thread switching. 341 */ 342 struct task_struct *__switch_to(struct task_struct *prev, 343 struct task_struct *next) 344 { 345 struct task_struct *last; 346 347 fpsimd_thread_switch(next); 348 tls_thread_switch(next); 349 hw_breakpoint_thread_switch(next); 350 contextidr_thread_switch(next); 351 entry_task_switch(next); 352 uao_thread_switch(next); 353 354 /* 355 * Complete any pending TLB or cache maintenance on this CPU in case 356 * the thread migrates to a different CPU. 357 */ 358 dsb(ish); 359 360 /* the actual thread switch */ 361 last = cpu_switch_to(prev, next); 362 363 return last; 364 } 365 366 unsigned long get_wchan(struct task_struct *p) 367 { 368 struct stackframe frame; 369 unsigned long stack_page, ret = 0; 370 int count = 0; 371 if (!p || p == current || p->state == TASK_RUNNING) 372 return 0; 373 374 stack_page = (unsigned long)try_get_task_stack(p); 375 if (!stack_page) 376 return 0; 377 378 frame.fp = thread_saved_fp(p); 379 frame.sp = thread_saved_sp(p); 380 frame.pc = thread_saved_pc(p); 381 #ifdef CONFIG_FUNCTION_GRAPH_TRACER 382 frame.graph = p->curr_ret_stack; 383 #endif 384 do { 385 if (frame.sp < stack_page || 386 frame.sp >= stack_page + THREAD_SIZE || 387 unwind_frame(p, &frame)) 388 goto out; 389 if (!in_sched_functions(frame.pc)) { 390 ret = frame.pc; 391 goto out; 392 } 393 } while (count ++ < 16); 394 395 out: 396 put_task_stack(p); 397 return ret; 398 } 399 400 unsigned long arch_align_stack(unsigned long sp) 401 { 402 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 403 sp -= get_random_int() & ~PAGE_MASK; 404 return sp & ~0xf; 405 } 406 407 unsigned long arch_randomize_brk(struct mm_struct *mm) 408 { 409 if (is_compat_task()) 410 return randomize_page(mm->brk, 0x02000000); 411 else 412 return randomize_page(mm->brk, 0x40000000); 413 } 414