1 /* 2 * Based on arch/arm/kernel/process.c 3 * 4 * Original Copyright (C) 1995 Linus Torvalds 5 * Copyright (C) 1996-2000 Russell King - Converted to ARM. 6 * Copyright (C) 2012 ARM Ltd. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program. If not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include <stdarg.h> 22 23 #include <linux/compat.h> 24 #include <linux/export.h> 25 #include <linux/sched.h> 26 #include <linux/kernel.h> 27 #include <linux/mm.h> 28 #include <linux/stddef.h> 29 #include <linux/unistd.h> 30 #include <linux/user.h> 31 #include <linux/delay.h> 32 #include <linux/reboot.h> 33 #include <linux/interrupt.h> 34 #include <linux/kallsyms.h> 35 #include <linux/init.h> 36 #include <linux/cpu.h> 37 #include <linux/elfcore.h> 38 #include <linux/pm.h> 39 #include <linux/tick.h> 40 #include <linux/utsname.h> 41 #include <linux/uaccess.h> 42 #include <linux/random.h> 43 #include <linux/hw_breakpoint.h> 44 #include <linux/personality.h> 45 #include <linux/notifier.h> 46 47 #include <asm/compat.h> 48 #include <asm/cacheflush.h> 49 #include <asm/fpsimd.h> 50 #include <asm/mmu_context.h> 51 #include <asm/processor.h> 52 #include <asm/stacktrace.h> 53 54 #ifdef CONFIG_CC_STACKPROTECTOR 55 #include <linux/stackprotector.h> 56 unsigned long __stack_chk_guard __read_mostly; 57 EXPORT_SYMBOL(__stack_chk_guard); 58 #endif 59 60 void soft_restart(unsigned long addr) 61 { 62 setup_mm_for_reboot(); 63 cpu_soft_restart(virt_to_phys(cpu_reset), addr); 64 /* Should never get here */ 65 BUG(); 66 } 67 68 /* 69 * Function pointers to optional machine specific functions 70 */ 71 void (*pm_power_off)(void); 72 EXPORT_SYMBOL_GPL(pm_power_off); 73 74 void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd); 75 76 /* 77 * This is our default idle handler. 78 */ 79 void arch_cpu_idle(void) 80 { 81 /* 82 * This should do all the clock switching and wait for interrupt 83 * tricks 84 */ 85 cpu_do_idle(); 86 local_irq_enable(); 87 } 88 89 #ifdef CONFIG_HOTPLUG_CPU 90 void arch_cpu_idle_dead(void) 91 { 92 cpu_die(); 93 } 94 #endif 95 96 /* 97 * Called by kexec, immediately prior to machine_kexec(). 98 * 99 * This must completely disable all secondary CPUs; simply causing those CPUs 100 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the 101 * kexec'd kernel to use any and all RAM as it sees fit, without having to 102 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug 103 * functionality embodied in disable_nonboot_cpus() to achieve this. 104 */ 105 void machine_shutdown(void) 106 { 107 disable_nonboot_cpus(); 108 } 109 110 /* 111 * Halting simply requires that the secondary CPUs stop performing any 112 * activity (executing tasks, handling interrupts). smp_send_stop() 113 * achieves this. 114 */ 115 void machine_halt(void) 116 { 117 local_irq_disable(); 118 smp_send_stop(); 119 while (1); 120 } 121 122 /* 123 * Power-off simply requires that the secondary CPUs stop performing any 124 * activity (executing tasks, handling interrupts). smp_send_stop() 125 * achieves this. When the system power is turned off, it will take all CPUs 126 * with it. 127 */ 128 void machine_power_off(void) 129 { 130 local_irq_disable(); 131 smp_send_stop(); 132 if (pm_power_off) 133 pm_power_off(); 134 } 135 136 /* 137 * Restart requires that the secondary CPUs stop performing any activity 138 * while the primary CPU resets the system. Systems with a single CPU can 139 * use soft_restart() as their machine descriptor's .restart hook, since that 140 * will cause the only available CPU to reset. Systems with multiple CPUs must 141 * provide a HW restart implementation, to ensure that all CPUs reset at once. 142 * This is required so that any code running after reset on the primary CPU 143 * doesn't have to co-ordinate with other CPUs to ensure they aren't still 144 * executing pre-reset code, and using RAM that the primary CPU's code wishes 145 * to use. Implementing such co-ordination would be essentially impossible. 146 */ 147 void machine_restart(char *cmd) 148 { 149 /* Disable interrupts first */ 150 local_irq_disable(); 151 smp_send_stop(); 152 153 /* Now call the architecture specific reboot code. */ 154 if (arm_pm_restart) 155 arm_pm_restart(reboot_mode, cmd); 156 else 157 do_kernel_restart(cmd); 158 159 /* 160 * Whoops - the architecture was unable to reboot. 161 */ 162 printk("Reboot failed -- System halted\n"); 163 while (1); 164 } 165 166 void __show_regs(struct pt_regs *regs) 167 { 168 int i, top_reg; 169 u64 lr, sp; 170 171 if (compat_user_mode(regs)) { 172 lr = regs->compat_lr; 173 sp = regs->compat_sp; 174 top_reg = 12; 175 } else { 176 lr = regs->regs[30]; 177 sp = regs->sp; 178 top_reg = 29; 179 } 180 181 show_regs_print_info(KERN_DEFAULT); 182 print_symbol("PC is at %s\n", instruction_pointer(regs)); 183 print_symbol("LR is at %s\n", lr); 184 printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n", 185 regs->pc, lr, regs->pstate); 186 printk("sp : %016llx\n", sp); 187 for (i = top_reg; i >= 0; i--) { 188 printk("x%-2d: %016llx ", i, regs->regs[i]); 189 if (i % 2 == 0) 190 printk("\n"); 191 } 192 printk("\n"); 193 } 194 195 void show_regs(struct pt_regs * regs) 196 { 197 printk("\n"); 198 __show_regs(regs); 199 } 200 201 /* 202 * Free current thread data structures etc.. 203 */ 204 void exit_thread(void) 205 { 206 } 207 208 static void tls_thread_flush(void) 209 { 210 asm ("msr tpidr_el0, xzr"); 211 212 if (is_compat_task()) { 213 current->thread.tp_value = 0; 214 215 /* 216 * We need to ensure ordering between the shadow state and the 217 * hardware state, so that we don't corrupt the hardware state 218 * with a stale shadow state during context switch. 219 */ 220 barrier(); 221 asm ("msr tpidrro_el0, xzr"); 222 } 223 } 224 225 void flush_thread(void) 226 { 227 fpsimd_flush_thread(); 228 tls_thread_flush(); 229 flush_ptrace_hw_breakpoint(current); 230 } 231 232 void release_thread(struct task_struct *dead_task) 233 { 234 } 235 236 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 237 { 238 fpsimd_preserve_current_state(); 239 *dst = *src; 240 return 0; 241 } 242 243 asmlinkage void ret_from_fork(void) asm("ret_from_fork"); 244 245 int copy_thread(unsigned long clone_flags, unsigned long stack_start, 246 unsigned long stk_sz, struct task_struct *p) 247 { 248 struct pt_regs *childregs = task_pt_regs(p); 249 unsigned long tls = p->thread.tp_value; 250 251 memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context)); 252 253 if (likely(!(p->flags & PF_KTHREAD))) { 254 *childregs = *current_pt_regs(); 255 childregs->regs[0] = 0; 256 if (is_compat_thread(task_thread_info(p))) { 257 if (stack_start) 258 childregs->compat_sp = stack_start; 259 } else { 260 /* 261 * Read the current TLS pointer from tpidr_el0 as it may be 262 * out-of-sync with the saved value. 263 */ 264 asm("mrs %0, tpidr_el0" : "=r" (tls)); 265 if (stack_start) { 266 /* 16-byte aligned stack mandatory on AArch64 */ 267 if (stack_start & 15) 268 return -EINVAL; 269 childregs->sp = stack_start; 270 } 271 } 272 /* 273 * If a TLS pointer was passed to clone (4th argument), use it 274 * for the new thread. 275 */ 276 if (clone_flags & CLONE_SETTLS) 277 tls = childregs->regs[3]; 278 } else { 279 memset(childregs, 0, sizeof(struct pt_regs)); 280 childregs->pstate = PSR_MODE_EL1h; 281 p->thread.cpu_context.x19 = stack_start; 282 p->thread.cpu_context.x20 = stk_sz; 283 } 284 p->thread.cpu_context.pc = (unsigned long)ret_from_fork; 285 p->thread.cpu_context.sp = (unsigned long)childregs; 286 p->thread.tp_value = tls; 287 288 ptrace_hw_copy_thread(p); 289 290 return 0; 291 } 292 293 static void tls_thread_switch(struct task_struct *next) 294 { 295 unsigned long tpidr, tpidrro; 296 297 if (!is_compat_task()) { 298 asm("mrs %0, tpidr_el0" : "=r" (tpidr)); 299 current->thread.tp_value = tpidr; 300 } 301 302 if (is_compat_thread(task_thread_info(next))) { 303 tpidr = 0; 304 tpidrro = next->thread.tp_value; 305 } else { 306 tpidr = next->thread.tp_value; 307 tpidrro = 0; 308 } 309 310 asm( 311 " msr tpidr_el0, %0\n" 312 " msr tpidrro_el0, %1" 313 : : "r" (tpidr), "r" (tpidrro)); 314 } 315 316 /* 317 * Thread switching. 318 */ 319 struct task_struct *__switch_to(struct task_struct *prev, 320 struct task_struct *next) 321 { 322 struct task_struct *last; 323 324 fpsimd_thread_switch(next); 325 tls_thread_switch(next); 326 hw_breakpoint_thread_switch(next); 327 contextidr_thread_switch(next); 328 329 /* 330 * Complete any pending TLB or cache maintenance on this CPU in case 331 * the thread migrates to a different CPU. 332 */ 333 dsb(ish); 334 335 /* the actual thread switch */ 336 last = cpu_switch_to(prev, next); 337 338 return last; 339 } 340 341 unsigned long get_wchan(struct task_struct *p) 342 { 343 struct stackframe frame; 344 unsigned long stack_page; 345 int count = 0; 346 if (!p || p == current || p->state == TASK_RUNNING) 347 return 0; 348 349 frame.fp = thread_saved_fp(p); 350 frame.sp = thread_saved_sp(p); 351 frame.pc = thread_saved_pc(p); 352 stack_page = (unsigned long)task_stack_page(p); 353 do { 354 if (frame.sp < stack_page || 355 frame.sp >= stack_page + THREAD_SIZE || 356 unwind_frame(&frame)) 357 return 0; 358 if (!in_sched_functions(frame.pc)) 359 return frame.pc; 360 } while (count ++ < 16); 361 return 0; 362 } 363 364 unsigned long arch_align_stack(unsigned long sp) 365 { 366 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 367 sp -= get_random_int() & ~PAGE_MASK; 368 return sp & ~0xf; 369 } 370 371 static unsigned long randomize_base(unsigned long base) 372 { 373 unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1; 374 return randomize_range(base, range_end, 0) ? : base; 375 } 376 377 unsigned long arch_randomize_brk(struct mm_struct *mm) 378 { 379 return randomize_base(mm->brk); 380 } 381