xref: /openbmc/linux/arch/arm64/kernel/process.c (revision 275876e2)
1 /*
2  * Based on arch/arm/kernel/process.c
3  *
4  * Original Copyright (C) 1995  Linus Torvalds
5  * Copyright (C) 1996-2000 Russell King - Converted to ARM.
6  * Copyright (C) 2012 ARM Ltd.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #include <stdarg.h>
22 
23 #include <linux/compat.h>
24 #include <linux/export.h>
25 #include <linux/sched.h>
26 #include <linux/kernel.h>
27 #include <linux/mm.h>
28 #include <linux/stddef.h>
29 #include <linux/unistd.h>
30 #include <linux/user.h>
31 #include <linux/delay.h>
32 #include <linux/reboot.h>
33 #include <linux/interrupt.h>
34 #include <linux/kallsyms.h>
35 #include <linux/init.h>
36 #include <linux/cpu.h>
37 #include <linux/elfcore.h>
38 #include <linux/pm.h>
39 #include <linux/tick.h>
40 #include <linux/utsname.h>
41 #include <linux/uaccess.h>
42 #include <linux/random.h>
43 #include <linux/hw_breakpoint.h>
44 #include <linux/personality.h>
45 #include <linux/notifier.h>
46 
47 #include <asm/compat.h>
48 #include <asm/cacheflush.h>
49 #include <asm/fpsimd.h>
50 #include <asm/mmu_context.h>
51 #include <asm/processor.h>
52 #include <asm/stacktrace.h>
53 
54 #ifdef CONFIG_CC_STACKPROTECTOR
55 #include <linux/stackprotector.h>
56 unsigned long __stack_chk_guard __read_mostly;
57 EXPORT_SYMBOL(__stack_chk_guard);
58 #endif
59 
60 static void setup_restart(void)
61 {
62 	/*
63 	 * Tell the mm system that we are going to reboot -
64 	 * we may need it to insert some 1:1 mappings so that
65 	 * soft boot works.
66 	 */
67 	setup_mm_for_reboot();
68 
69 	/* Clean and invalidate caches */
70 	flush_cache_all();
71 
72 	/* Turn D-cache off */
73 	cpu_cache_off();
74 
75 	/* Push out any further dirty data, and ensure cache is empty */
76 	flush_cache_all();
77 }
78 
79 void soft_restart(unsigned long addr)
80 {
81 	typedef void (*phys_reset_t)(unsigned long);
82 	phys_reset_t phys_reset;
83 
84 	setup_restart();
85 
86 	/* Switch to the identity mapping */
87 	phys_reset = (phys_reset_t)virt_to_phys(cpu_reset);
88 	phys_reset(addr);
89 
90 	/* Should never get here */
91 	BUG();
92 }
93 
94 /*
95  * Function pointers to optional machine specific functions
96  */
97 void (*pm_power_off)(void);
98 EXPORT_SYMBOL_GPL(pm_power_off);
99 
100 void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
101 EXPORT_SYMBOL_GPL(arm_pm_restart);
102 
103 /*
104  * This is our default idle handler.
105  */
106 void arch_cpu_idle(void)
107 {
108 	/*
109 	 * This should do all the clock switching and wait for interrupt
110 	 * tricks
111 	 */
112 	cpu_do_idle();
113 	local_irq_enable();
114 }
115 
116 #ifdef CONFIG_HOTPLUG_CPU
117 void arch_cpu_idle_dead(void)
118 {
119        cpu_die();
120 }
121 #endif
122 
123 /*
124  * Called by kexec, immediately prior to machine_kexec().
125  *
126  * This must completely disable all secondary CPUs; simply causing those CPUs
127  * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
128  * kexec'd kernel to use any and all RAM as it sees fit, without having to
129  * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
130  * functionality embodied in disable_nonboot_cpus() to achieve this.
131  */
132 void machine_shutdown(void)
133 {
134 	disable_nonboot_cpus();
135 }
136 
137 /*
138  * Halting simply requires that the secondary CPUs stop performing any
139  * activity (executing tasks, handling interrupts). smp_send_stop()
140  * achieves this.
141  */
142 void machine_halt(void)
143 {
144 	local_irq_disable();
145 	smp_send_stop();
146 	while (1);
147 }
148 
149 /*
150  * Power-off simply requires that the secondary CPUs stop performing any
151  * activity (executing tasks, handling interrupts). smp_send_stop()
152  * achieves this. When the system power is turned off, it will take all CPUs
153  * with it.
154  */
155 void machine_power_off(void)
156 {
157 	local_irq_disable();
158 	smp_send_stop();
159 	if (pm_power_off)
160 		pm_power_off();
161 }
162 
163 /*
164  * Restart requires that the secondary CPUs stop performing any activity
165  * while the primary CPU resets the system. Systems with a single CPU can
166  * use soft_restart() as their machine descriptor's .restart hook, since that
167  * will cause the only available CPU to reset. Systems with multiple CPUs must
168  * provide a HW restart implementation, to ensure that all CPUs reset at once.
169  * This is required so that any code running after reset on the primary CPU
170  * doesn't have to co-ordinate with other CPUs to ensure they aren't still
171  * executing pre-reset code, and using RAM that the primary CPU's code wishes
172  * to use. Implementing such co-ordination would be essentially impossible.
173  */
174 void machine_restart(char *cmd)
175 {
176 	/* Disable interrupts first */
177 	local_irq_disable();
178 	smp_send_stop();
179 
180 	/* Now call the architecture specific reboot code. */
181 	if (arm_pm_restart)
182 		arm_pm_restart(reboot_mode, cmd);
183 
184 	/*
185 	 * Whoops - the architecture was unable to reboot.
186 	 */
187 	printk("Reboot failed -- System halted\n");
188 	while (1);
189 }
190 
191 void __show_regs(struct pt_regs *regs)
192 {
193 	int i, top_reg;
194 	u64 lr, sp;
195 
196 	if (compat_user_mode(regs)) {
197 		lr = regs->compat_lr;
198 		sp = regs->compat_sp;
199 		top_reg = 12;
200 	} else {
201 		lr = regs->regs[30];
202 		sp = regs->sp;
203 		top_reg = 29;
204 	}
205 
206 	show_regs_print_info(KERN_DEFAULT);
207 	print_symbol("PC is at %s\n", instruction_pointer(regs));
208 	print_symbol("LR is at %s\n", lr);
209 	printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
210 	       regs->pc, lr, regs->pstate);
211 	printk("sp : %016llx\n", sp);
212 	for (i = top_reg; i >= 0; i--) {
213 		printk("x%-2d: %016llx ", i, regs->regs[i]);
214 		if (i % 2 == 0)
215 			printk("\n");
216 	}
217 	printk("\n");
218 }
219 
220 void show_regs(struct pt_regs * regs)
221 {
222 	printk("\n");
223 	__show_regs(regs);
224 }
225 
226 /*
227  * Free current thread data structures etc..
228  */
229 void exit_thread(void)
230 {
231 }
232 
233 void flush_thread(void)
234 {
235 	fpsimd_flush_thread();
236 	flush_ptrace_hw_breakpoint(current);
237 }
238 
239 void release_thread(struct task_struct *dead_task)
240 {
241 }
242 
243 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
244 {
245 	fpsimd_preserve_current_state();
246 	*dst = *src;
247 	return 0;
248 }
249 
250 asmlinkage void ret_from_fork(void) asm("ret_from_fork");
251 
252 int copy_thread(unsigned long clone_flags, unsigned long stack_start,
253 		unsigned long stk_sz, struct task_struct *p)
254 {
255 	struct pt_regs *childregs = task_pt_regs(p);
256 	unsigned long tls = p->thread.tp_value;
257 
258 	memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
259 
260 	if (likely(!(p->flags & PF_KTHREAD))) {
261 		*childregs = *current_pt_regs();
262 		childregs->regs[0] = 0;
263 		if (is_compat_thread(task_thread_info(p))) {
264 			if (stack_start)
265 				childregs->compat_sp = stack_start;
266 		} else {
267 			/*
268 			 * Read the current TLS pointer from tpidr_el0 as it may be
269 			 * out-of-sync with the saved value.
270 			 */
271 			asm("mrs %0, tpidr_el0" : "=r" (tls));
272 			if (stack_start) {
273 				/* 16-byte aligned stack mandatory on AArch64 */
274 				if (stack_start & 15)
275 					return -EINVAL;
276 				childregs->sp = stack_start;
277 			}
278 		}
279 		/*
280 		 * If a TLS pointer was passed to clone (4th argument), use it
281 		 * for the new thread.
282 		 */
283 		if (clone_flags & CLONE_SETTLS)
284 			tls = childregs->regs[3];
285 	} else {
286 		memset(childregs, 0, sizeof(struct pt_regs));
287 		childregs->pstate = PSR_MODE_EL1h;
288 		p->thread.cpu_context.x19 = stack_start;
289 		p->thread.cpu_context.x20 = stk_sz;
290 	}
291 	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
292 	p->thread.cpu_context.sp = (unsigned long)childregs;
293 	p->thread.tp_value = tls;
294 
295 	ptrace_hw_copy_thread(p);
296 
297 	return 0;
298 }
299 
300 static void tls_thread_switch(struct task_struct *next)
301 {
302 	unsigned long tpidr, tpidrro;
303 
304 	if (!is_compat_task()) {
305 		asm("mrs %0, tpidr_el0" : "=r" (tpidr));
306 		current->thread.tp_value = tpidr;
307 	}
308 
309 	if (is_compat_thread(task_thread_info(next))) {
310 		tpidr = 0;
311 		tpidrro = next->thread.tp_value;
312 	} else {
313 		tpidr = next->thread.tp_value;
314 		tpidrro = 0;
315 	}
316 
317 	asm(
318 	"	msr	tpidr_el0, %0\n"
319 	"	msr	tpidrro_el0, %1"
320 	: : "r" (tpidr), "r" (tpidrro));
321 }
322 
323 /*
324  * Thread switching.
325  */
326 struct task_struct *__switch_to(struct task_struct *prev,
327 				struct task_struct *next)
328 {
329 	struct task_struct *last;
330 
331 	fpsimd_thread_switch(next);
332 	tls_thread_switch(next);
333 	hw_breakpoint_thread_switch(next);
334 	contextidr_thread_switch(next);
335 
336 	/*
337 	 * Complete any pending TLB or cache maintenance on this CPU in case
338 	 * the thread migrates to a different CPU.
339 	 */
340 	dsb(ish);
341 
342 	/* the actual thread switch */
343 	last = cpu_switch_to(prev, next);
344 
345 	return last;
346 }
347 
348 unsigned long get_wchan(struct task_struct *p)
349 {
350 	struct stackframe frame;
351 	unsigned long stack_page;
352 	int count = 0;
353 	if (!p || p == current || p->state == TASK_RUNNING)
354 		return 0;
355 
356 	frame.fp = thread_saved_fp(p);
357 	frame.sp = thread_saved_sp(p);
358 	frame.pc = thread_saved_pc(p);
359 	stack_page = (unsigned long)task_stack_page(p);
360 	do {
361 		if (frame.sp < stack_page ||
362 		    frame.sp >= stack_page + THREAD_SIZE ||
363 		    unwind_frame(&frame))
364 			return 0;
365 		if (!in_sched_functions(frame.pc))
366 			return frame.pc;
367 	} while (count ++ < 16);
368 	return 0;
369 }
370 
371 unsigned long arch_align_stack(unsigned long sp)
372 {
373 	if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
374 		sp -= get_random_int() & ~PAGE_MASK;
375 	return sp & ~0xf;
376 }
377 
378 static unsigned long randomize_base(unsigned long base)
379 {
380 	unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
381 	return randomize_range(base, range_end, 0) ? : base;
382 }
383 
384 unsigned long arch_randomize_brk(struct mm_struct *mm)
385 {
386 	return randomize_base(mm->brk);
387 }
388 
389 unsigned long randomize_et_dyn(unsigned long base)
390 {
391 	return randomize_base(base);
392 }
393