xref: /openbmc/linux/arch/arm64/kernel/pci.c (revision f2a89d3b)
1 /*
2  * Code borrowed from powerpc/kernel/pci-common.c
3  *
4  * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
5  * Copyright (C) 2014 ARM Ltd.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * version 2 as published by the Free Software Foundation.
10  *
11  */
12 
13 #include <linux/acpi.h>
14 #include <linux/init.h>
15 #include <linux/io.h>
16 #include <linux/kernel.h>
17 #include <linux/mm.h>
18 #include <linux/of_pci.h>
19 #include <linux/of_platform.h>
20 #include <linux/pci.h>
21 #include <linux/pci-acpi.h>
22 #include <linux/pci-ecam.h>
23 #include <linux/slab.h>
24 
25 /*
26  * Called after each bus is probed, but before its children are examined
27  */
28 void pcibios_fixup_bus(struct pci_bus *bus)
29 {
30 	/* nothing to do, expected to be removed in the future */
31 }
32 
33 /*
34  * We don't have to worry about legacy ISA devices, so nothing to do here
35  */
36 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
37 				resource_size_t size, resource_size_t align)
38 {
39 	return res->start;
40 }
41 
42 /*
43  * Try to assign the IRQ number when probing a new device
44  */
45 int pcibios_alloc_irq(struct pci_dev *dev)
46 {
47 	if (acpi_disabled)
48 		dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
49 #ifdef CONFIG_ACPI
50 	else
51 		return acpi_pci_irq_enable(dev);
52 #endif
53 
54 	return 0;
55 }
56 
57 /*
58  * raw_pci_read/write - Platform-specific PCI config space access.
59  */
60 int raw_pci_read(unsigned int domain, unsigned int bus,
61 		  unsigned int devfn, int reg, int len, u32 *val)
62 {
63 	struct pci_bus *b = pci_find_bus(domain, bus);
64 
65 	if (!b)
66 		return PCIBIOS_DEVICE_NOT_FOUND;
67 	return b->ops->read(b, devfn, reg, len, val);
68 }
69 
70 int raw_pci_write(unsigned int domain, unsigned int bus,
71 		unsigned int devfn, int reg, int len, u32 val)
72 {
73 	struct pci_bus *b = pci_find_bus(domain, bus);
74 
75 	if (!b)
76 		return PCIBIOS_DEVICE_NOT_FOUND;
77 	return b->ops->write(b, devfn, reg, len, val);
78 }
79 
80 #ifdef CONFIG_NUMA
81 
82 int pcibus_to_node(struct pci_bus *bus)
83 {
84 	return dev_to_node(&bus->dev);
85 }
86 EXPORT_SYMBOL(pcibus_to_node);
87 
88 #endif
89 
90 #ifdef CONFIG_ACPI
91 
92 struct acpi_pci_generic_root_info {
93 	struct acpi_pci_root_info	common;
94 	struct pci_config_window	*cfg;	/* config space mapping */
95 };
96 
97 int acpi_pci_bus_find_domain_nr(struct pci_bus *bus)
98 {
99 	struct pci_config_window *cfg = bus->sysdata;
100 	struct acpi_device *adev = to_acpi_device(cfg->parent);
101 	struct acpi_pci_root *root = acpi_driver_data(adev);
102 
103 	return root->segment;
104 }
105 
106 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
107 {
108 	if (!acpi_disabled) {
109 		struct pci_config_window *cfg = bridge->bus->sysdata;
110 		struct acpi_device *adev = to_acpi_device(cfg->parent);
111 		ACPI_COMPANION_SET(&bridge->dev, adev);
112 	}
113 
114 	return 0;
115 }
116 
117 /*
118  * Lookup the bus range for the domain in MCFG, and set up config space
119  * mapping.
120  */
121 static struct pci_config_window *
122 pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root)
123 {
124 	struct resource *bus_res = &root->secondary;
125 	u16 seg = root->segment;
126 	struct pci_config_window *cfg;
127 	struct resource cfgres;
128 	unsigned int bsz;
129 
130 	/* Use address from _CBA if present, otherwise lookup MCFG */
131 	if (!root->mcfg_addr)
132 		root->mcfg_addr = pci_mcfg_lookup(seg, bus_res);
133 
134 	if (!root->mcfg_addr) {
135 		dev_err(&root->device->dev, "%04x:%pR ECAM region not found\n",
136 			seg, bus_res);
137 		return NULL;
138 	}
139 
140 	bsz = 1 << pci_generic_ecam_ops.bus_shift;
141 	cfgres.start = root->mcfg_addr + bus_res->start * bsz;
142 	cfgres.end = cfgres.start + resource_size(bus_res) * bsz - 1;
143 	cfgres.flags = IORESOURCE_MEM;
144 	cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res,
145 			      &pci_generic_ecam_ops);
146 	if (IS_ERR(cfg)) {
147 		dev_err(&root->device->dev, "%04x:%pR error %ld mapping ECAM\n",
148 			seg, bus_res, PTR_ERR(cfg));
149 		return NULL;
150 	}
151 
152 	return cfg;
153 }
154 
155 /* release_info: free resources allocated by init_info */
156 static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci)
157 {
158 	struct acpi_pci_generic_root_info *ri;
159 
160 	ri = container_of(ci, struct acpi_pci_generic_root_info, common);
161 	pci_ecam_free(ri->cfg);
162 	kfree(ri);
163 }
164 
165 static struct acpi_pci_root_ops acpi_pci_root_ops = {
166 	.release_info = pci_acpi_generic_release_info,
167 };
168 
169 /* Interface called from ACPI code to setup PCI host controller */
170 struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
171 {
172 	int node = acpi_get_node(root->device->handle);
173 	struct acpi_pci_generic_root_info *ri;
174 	struct pci_bus *bus, *child;
175 
176 	ri = kzalloc_node(sizeof(*ri), GFP_KERNEL, node);
177 	if (!ri)
178 		return NULL;
179 
180 	ri->cfg = pci_acpi_setup_ecam_mapping(root);
181 	if (!ri->cfg) {
182 		kfree(ri);
183 		return NULL;
184 	}
185 
186 	acpi_pci_root_ops.pci_ops = &ri->cfg->ops->pci_ops;
187 	bus = acpi_pci_root_create(root, &acpi_pci_root_ops, &ri->common,
188 				   ri->cfg);
189 	if (!bus)
190 		return NULL;
191 
192 	pci_bus_size_bridges(bus);
193 	pci_bus_assign_resources(bus);
194 
195 	list_for_each_entry(child, &bus->children, node)
196 		pcie_bus_configure_settings(child);
197 
198 	return bus;
199 }
200 
201 void pcibios_add_bus(struct pci_bus *bus)
202 {
203 	acpi_pci_add_bus(bus);
204 }
205 
206 void pcibios_remove_bus(struct pci_bus *bus)
207 {
208 	acpi_pci_remove_bus(bus);
209 }
210 
211 #endif
212