1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2020 ARM Ltd. 4 */ 5 6 #include <linux/bitops.h> 7 #include <linux/kernel.h> 8 #include <linux/mm.h> 9 #include <linux/prctl.h> 10 #include <linux/sched.h> 11 #include <linux/sched/mm.h> 12 #include <linux/string.h> 13 #include <linux/swap.h> 14 #include <linux/swapops.h> 15 #include <linux/thread_info.h> 16 #include <linux/types.h> 17 #include <linux/uio.h> 18 19 #include <asm/barrier.h> 20 #include <asm/cpufeature.h> 21 #include <asm/mte.h> 22 #include <asm/ptrace.h> 23 #include <asm/sysreg.h> 24 25 u64 gcr_kernel_excl __ro_after_init; 26 27 static bool report_fault_once = true; 28 29 #ifdef CONFIG_KASAN_HW_TAGS 30 /* Whether the MTE asynchronous mode is enabled. */ 31 DEFINE_STATIC_KEY_FALSE(mte_async_mode); 32 EXPORT_SYMBOL_GPL(mte_async_mode); 33 #endif 34 35 static void mte_sync_page_tags(struct page *page, pte_t old_pte, 36 bool check_swap, bool pte_is_tagged) 37 { 38 if (check_swap && is_swap_pte(old_pte)) { 39 swp_entry_t entry = pte_to_swp_entry(old_pte); 40 41 if (!non_swap_entry(entry) && mte_restore_tags(entry, page)) 42 return; 43 } 44 45 if (!pte_is_tagged) 46 return; 47 48 page_kasan_tag_reset(page); 49 /* 50 * We need smp_wmb() in between setting the flags and clearing the 51 * tags because if another thread reads page->flags and builds a 52 * tagged address out of it, there is an actual dependency to the 53 * memory access, but on the current thread we do not guarantee that 54 * the new page->flags are visible before the tags were updated. 55 */ 56 smp_wmb(); 57 mte_clear_page_tags(page_address(page)); 58 } 59 60 void mte_sync_tags(pte_t old_pte, pte_t pte) 61 { 62 struct page *page = pte_page(pte); 63 long i, nr_pages = compound_nr(page); 64 bool check_swap = nr_pages == 1; 65 bool pte_is_tagged = pte_tagged(pte); 66 67 /* Early out if there's nothing to do */ 68 if (!check_swap && !pte_is_tagged) 69 return; 70 71 /* if PG_mte_tagged is set, tags have already been initialised */ 72 for (i = 0; i < nr_pages; i++, page++) { 73 if (!test_and_set_bit(PG_mte_tagged, &page->flags)) 74 mte_sync_page_tags(page, old_pte, check_swap, 75 pte_is_tagged); 76 } 77 } 78 79 int memcmp_pages(struct page *page1, struct page *page2) 80 { 81 char *addr1, *addr2; 82 int ret; 83 84 addr1 = page_address(page1); 85 addr2 = page_address(page2); 86 ret = memcmp(addr1, addr2, PAGE_SIZE); 87 88 if (!system_supports_mte() || ret) 89 return ret; 90 91 /* 92 * If the page content is identical but at least one of the pages is 93 * tagged, return non-zero to avoid KSM merging. If only one of the 94 * pages is tagged, set_pte_at() may zero or change the tags of the 95 * other page via mte_sync_tags(). 96 */ 97 if (test_bit(PG_mte_tagged, &page1->flags) || 98 test_bit(PG_mte_tagged, &page2->flags)) 99 return addr1 != addr2; 100 101 return ret; 102 } 103 104 void mte_init_tags(u64 max_tag) 105 { 106 static bool gcr_kernel_excl_initialized; 107 108 if (!gcr_kernel_excl_initialized) { 109 /* 110 * The format of the tags in KASAN is 0xFF and in MTE is 0xF. 111 * This conversion extracts an MTE tag from a KASAN tag. 112 */ 113 u64 incl = GENMASK(FIELD_GET(MTE_TAG_MASK >> MTE_TAG_SHIFT, 114 max_tag), 0); 115 116 gcr_kernel_excl = ~incl & SYS_GCR_EL1_EXCL_MASK; 117 gcr_kernel_excl_initialized = true; 118 } 119 120 /* Enable the kernel exclude mask for random tags generation. */ 121 write_sysreg_s(SYS_GCR_EL1_RRND | gcr_kernel_excl, SYS_GCR_EL1); 122 } 123 124 static inline void __mte_enable_kernel(const char *mode, unsigned long tcf) 125 { 126 /* Enable MTE Sync Mode for EL1. */ 127 sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, tcf); 128 isb(); 129 130 pr_info_once("MTE: enabled in %s mode at EL1\n", mode); 131 } 132 133 #ifdef CONFIG_KASAN_HW_TAGS 134 void mte_enable_kernel_sync(void) 135 { 136 /* 137 * Make sure we enter this function when no PE has set 138 * async mode previously. 139 */ 140 WARN_ONCE(system_uses_mte_async_mode(), 141 "MTE async mode enabled system wide!"); 142 143 __mte_enable_kernel("synchronous", SCTLR_ELx_TCF_SYNC); 144 } 145 146 void mte_enable_kernel_async(void) 147 { 148 __mte_enable_kernel("asynchronous", SCTLR_ELx_TCF_ASYNC); 149 150 /* 151 * MTE async mode is set system wide by the first PE that 152 * executes this function. 153 * 154 * Note: If in future KASAN acquires a runtime switching 155 * mode in between sync and async, this strategy needs 156 * to be reviewed. 157 */ 158 if (!system_uses_mte_async_mode()) 159 static_branch_enable(&mte_async_mode); 160 } 161 #endif 162 163 void mte_set_report_once(bool state) 164 { 165 WRITE_ONCE(report_fault_once, state); 166 } 167 168 bool mte_report_once(void) 169 { 170 return READ_ONCE(report_fault_once); 171 } 172 173 #ifdef CONFIG_KASAN_HW_TAGS 174 void mte_check_tfsr_el1(void) 175 { 176 u64 tfsr_el1; 177 178 if (!system_supports_mte()) 179 return; 180 181 tfsr_el1 = read_sysreg_s(SYS_TFSR_EL1); 182 183 if (unlikely(tfsr_el1 & SYS_TFSR_EL1_TF1)) { 184 /* 185 * Note: isb() is not required after this direct write 186 * because there is no indirect read subsequent to it 187 * (per ARM DDI 0487F.c table D13-1). 188 */ 189 write_sysreg_s(0, SYS_TFSR_EL1); 190 191 kasan_report_async(); 192 } 193 } 194 #endif 195 196 static void update_gcr_el1_excl(u64 excl) 197 { 198 199 /* 200 * Note that the mask controlled by the user via prctl() is an 201 * include while GCR_EL1 accepts an exclude mask. 202 * No need for ISB since this only affects EL0 currently, implicit 203 * with ERET. 204 */ 205 sysreg_clear_set_s(SYS_GCR_EL1, SYS_GCR_EL1_EXCL_MASK, excl); 206 } 207 208 static void set_gcr_el1_excl(u64 excl) 209 { 210 current->thread.gcr_user_excl = excl; 211 212 /* 213 * SYS_GCR_EL1 will be set to current->thread.gcr_user_excl value 214 * by mte_set_user_gcr() in kernel_exit, 215 */ 216 } 217 218 void mte_thread_init_user(void) 219 { 220 if (!system_supports_mte()) 221 return; 222 223 /* clear any pending asynchronous tag fault */ 224 dsb(ish); 225 write_sysreg_s(0, SYS_TFSRE0_EL1); 226 clear_thread_flag(TIF_MTE_ASYNC_FAULT); 227 /* disable tag checking */ 228 set_task_sctlr_el1((current->thread.sctlr_user & ~SCTLR_EL1_TCF0_MASK) | 229 SCTLR_EL1_TCF0_NONE); 230 /* reset tag generation mask */ 231 set_gcr_el1_excl(SYS_GCR_EL1_EXCL_MASK); 232 } 233 234 void mte_thread_switch(struct task_struct *next) 235 { 236 /* 237 * Check if an async tag exception occurred at EL1. 238 * 239 * Note: On the context switch path we rely on the dsb() present 240 * in __switch_to() to guarantee that the indirect writes to TFSR_EL1 241 * are synchronized before this point. 242 */ 243 isb(); 244 mte_check_tfsr_el1(); 245 } 246 247 void mte_suspend_enter(void) 248 { 249 if (!system_supports_mte()) 250 return; 251 252 /* 253 * The barriers are required to guarantee that the indirect writes 254 * to TFSR_EL1 are synchronized before we report the state. 255 */ 256 dsb(nsh); 257 isb(); 258 259 /* Report SYS_TFSR_EL1 before suspend entry */ 260 mte_check_tfsr_el1(); 261 } 262 263 void mte_suspend_exit(void) 264 { 265 if (!system_supports_mte()) 266 return; 267 268 update_gcr_el1_excl(gcr_kernel_excl); 269 } 270 271 long set_mte_ctrl(struct task_struct *task, unsigned long arg) 272 { 273 u64 sctlr = task->thread.sctlr_user & ~SCTLR_EL1_TCF0_MASK; 274 u64 gcr_excl = ~((arg & PR_MTE_TAG_MASK) >> PR_MTE_TAG_SHIFT) & 275 SYS_GCR_EL1_EXCL_MASK; 276 277 if (!system_supports_mte()) 278 return 0; 279 280 switch (arg & PR_MTE_TCF_MASK) { 281 case PR_MTE_TCF_NONE: 282 sctlr |= SCTLR_EL1_TCF0_NONE; 283 break; 284 case PR_MTE_TCF_SYNC: 285 sctlr |= SCTLR_EL1_TCF0_SYNC; 286 break; 287 case PR_MTE_TCF_ASYNC: 288 sctlr |= SCTLR_EL1_TCF0_ASYNC; 289 break; 290 default: 291 return -EINVAL; 292 } 293 294 if (task != current) { 295 task->thread.sctlr_user = sctlr; 296 task->thread.gcr_user_excl = gcr_excl; 297 } else { 298 set_task_sctlr_el1(sctlr); 299 set_gcr_el1_excl(gcr_excl); 300 } 301 302 return 0; 303 } 304 305 long get_mte_ctrl(struct task_struct *task) 306 { 307 unsigned long ret; 308 u64 incl = ~task->thread.gcr_user_excl & SYS_GCR_EL1_EXCL_MASK; 309 310 if (!system_supports_mte()) 311 return 0; 312 313 ret = incl << PR_MTE_TAG_SHIFT; 314 315 switch (task->thread.sctlr_user & SCTLR_EL1_TCF0_MASK) { 316 case SCTLR_EL1_TCF0_NONE: 317 ret |= PR_MTE_TCF_NONE; 318 break; 319 case SCTLR_EL1_TCF0_SYNC: 320 ret |= PR_MTE_TCF_SYNC; 321 break; 322 case SCTLR_EL1_TCF0_ASYNC: 323 ret |= PR_MTE_TCF_ASYNC; 324 break; 325 } 326 327 return ret; 328 } 329 330 /* 331 * Access MTE tags in another process' address space as given in mm. Update 332 * the number of tags copied. Return 0 if any tags copied, error otherwise. 333 * Inspired by __access_remote_vm(). 334 */ 335 static int __access_remote_tags(struct mm_struct *mm, unsigned long addr, 336 struct iovec *kiov, unsigned int gup_flags) 337 { 338 struct vm_area_struct *vma; 339 void __user *buf = kiov->iov_base; 340 size_t len = kiov->iov_len; 341 int ret; 342 int write = gup_flags & FOLL_WRITE; 343 344 if (!access_ok(buf, len)) 345 return -EFAULT; 346 347 if (mmap_read_lock_killable(mm)) 348 return -EIO; 349 350 while (len) { 351 unsigned long tags, offset; 352 void *maddr; 353 struct page *page = NULL; 354 355 ret = get_user_pages_remote(mm, addr, 1, gup_flags, &page, 356 &vma, NULL); 357 if (ret <= 0) 358 break; 359 360 /* 361 * Only copy tags if the page has been mapped as PROT_MTE 362 * (PG_mte_tagged set). Otherwise the tags are not valid and 363 * not accessible to user. Moreover, an mprotect(PROT_MTE) 364 * would cause the existing tags to be cleared if the page 365 * was never mapped with PROT_MTE. 366 */ 367 if (!(vma->vm_flags & VM_MTE)) { 368 ret = -EOPNOTSUPP; 369 put_page(page); 370 break; 371 } 372 WARN_ON_ONCE(!test_bit(PG_mte_tagged, &page->flags)); 373 374 /* limit access to the end of the page */ 375 offset = offset_in_page(addr); 376 tags = min(len, (PAGE_SIZE - offset) / MTE_GRANULE_SIZE); 377 378 maddr = page_address(page); 379 if (write) { 380 tags = mte_copy_tags_from_user(maddr + offset, buf, tags); 381 set_page_dirty_lock(page); 382 } else { 383 tags = mte_copy_tags_to_user(buf, maddr + offset, tags); 384 } 385 put_page(page); 386 387 /* error accessing the tracer's buffer */ 388 if (!tags) 389 break; 390 391 len -= tags; 392 buf += tags; 393 addr += tags * MTE_GRANULE_SIZE; 394 } 395 mmap_read_unlock(mm); 396 397 /* return an error if no tags copied */ 398 kiov->iov_len = buf - kiov->iov_base; 399 if (!kiov->iov_len) { 400 /* check for error accessing the tracee's address space */ 401 if (ret <= 0) 402 return -EIO; 403 else 404 return -EFAULT; 405 } 406 407 return 0; 408 } 409 410 /* 411 * Copy MTE tags in another process' address space at 'addr' to/from tracer's 412 * iovec buffer. Return 0 on success. Inspired by ptrace_access_vm(). 413 */ 414 static int access_remote_tags(struct task_struct *tsk, unsigned long addr, 415 struct iovec *kiov, unsigned int gup_flags) 416 { 417 struct mm_struct *mm; 418 int ret; 419 420 mm = get_task_mm(tsk); 421 if (!mm) 422 return -EPERM; 423 424 if (!tsk->ptrace || (current != tsk->parent) || 425 ((get_dumpable(mm) != SUID_DUMP_USER) && 426 !ptracer_capable(tsk, mm->user_ns))) { 427 mmput(mm); 428 return -EPERM; 429 } 430 431 ret = __access_remote_tags(mm, addr, kiov, gup_flags); 432 mmput(mm); 433 434 return ret; 435 } 436 437 int mte_ptrace_copy_tags(struct task_struct *child, long request, 438 unsigned long addr, unsigned long data) 439 { 440 int ret; 441 struct iovec kiov; 442 struct iovec __user *uiov = (void __user *)data; 443 unsigned int gup_flags = FOLL_FORCE; 444 445 if (!system_supports_mte()) 446 return -EIO; 447 448 if (get_user(kiov.iov_base, &uiov->iov_base) || 449 get_user(kiov.iov_len, &uiov->iov_len)) 450 return -EFAULT; 451 452 if (request == PTRACE_POKEMTETAGS) 453 gup_flags |= FOLL_WRITE; 454 455 /* align addr to the MTE tag granule */ 456 addr &= MTE_GRANULE_MASK; 457 458 ret = access_remote_tags(child, addr, &kiov, gup_flags); 459 if (!ret) 460 ret = put_user(kiov.iov_len, &uiov->iov_len); 461 462 return ret; 463 } 464