1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Hypervisor stub 4 * 5 * Copyright (C) 2012 ARM Ltd. 6 * Author: Marc Zyngier <marc.zyngier@arm.com> 7 */ 8 9#include <linux/init.h> 10#include <linux/linkage.h> 11 12#include <asm/assembler.h> 13#include <asm/el2_setup.h> 14#include <asm/kvm_arm.h> 15#include <asm/kvm_asm.h> 16#include <asm/ptrace.h> 17#include <asm/virt.h> 18 19 .text 20 .pushsection .hyp.text, "ax" 21 22 .align 11 23 24SYM_CODE_START(__hyp_stub_vectors) 25 ventry el2_sync_invalid // Synchronous EL2t 26 ventry el2_irq_invalid // IRQ EL2t 27 ventry el2_fiq_invalid // FIQ EL2t 28 ventry el2_error_invalid // Error EL2t 29 30 ventry elx_sync // Synchronous EL2h 31 ventry el2_irq_invalid // IRQ EL2h 32 ventry el2_fiq_invalid // FIQ EL2h 33 ventry el2_error_invalid // Error EL2h 34 35 ventry elx_sync // Synchronous 64-bit EL1 36 ventry el1_irq_invalid // IRQ 64-bit EL1 37 ventry el1_fiq_invalid // FIQ 64-bit EL1 38 ventry el1_error_invalid // Error 64-bit EL1 39 40 ventry el1_sync_invalid // Synchronous 32-bit EL1 41 ventry el1_irq_invalid // IRQ 32-bit EL1 42 ventry el1_fiq_invalid // FIQ 32-bit EL1 43 ventry el1_error_invalid // Error 32-bit EL1 44SYM_CODE_END(__hyp_stub_vectors) 45 46 .align 11 47 48SYM_CODE_START_LOCAL(elx_sync) 49 cmp x0, #HVC_SET_VECTORS 50 b.ne 1f 51 msr vbar_el2, x1 52 b 9f 53 541: cmp x0, #HVC_FINALISE_EL2 55 b.eq __finalise_el2 56 572: cmp x0, #HVC_SOFT_RESTART 58 b.ne 3f 59 mov x0, x2 60 mov x2, x4 61 mov x4, x1 62 mov x1, x3 63 br x4 // no return 64 653: cmp x0, #HVC_RESET_VECTORS 66 beq 9f // Nothing to reset! 67 68 /* Someone called kvm_call_hyp() against the hyp-stub... */ 69 mov_q x0, HVC_STUB_ERR 70 eret 71 729: mov x0, xzr 73 eret 74SYM_CODE_END(elx_sync) 75 76SYM_CODE_START_LOCAL(__finalise_el2) 77 finalise_el2_state 78 79 // nVHE? No way! Give me the real thing! 80 // Sanity check: MMU *must* be off 81 mrs x1, sctlr_el2 82 tbnz x1, #0, 1f 83 84 // Needs to be VHE capable, obviously 85 check_override id_aa64mmfr1 ID_AA64MMFR1_EL1_VH_SHIFT 2f 1f x1 x2 86 871: mov_q x0, HVC_STUB_ERR 88 eret 892: 90 // Engage the VHE magic! 91 mov_q x0, HCR_HOST_VHE_FLAGS 92 msr hcr_el2, x0 93 isb 94 95 // Use the EL1 allocated stack, per-cpu offset 96 mrs x0, sp_el1 97 mov sp, x0 98 mrs x0, tpidr_el1 99 msr tpidr_el2, x0 100 101 // FP configuration, vectors 102 mrs_s x0, SYS_CPACR_EL12 103 msr cpacr_el1, x0 104 mrs_s x0, SYS_VBAR_EL12 105 msr vbar_el1, x0 106 107 // Use EL2 translations for SPE & TRBE and disable access from EL1 108 mrs x0, mdcr_el2 109 bic x0, x0, #(MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT) 110 bic x0, x0, #(MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT) 111 msr mdcr_el2, x0 112 113 // Transfer the MM state from EL1 to EL2 114 mrs_s x0, SYS_TCR_EL12 115 msr tcr_el1, x0 116 mrs_s x0, SYS_TTBR0_EL12 117 msr ttbr0_el1, x0 118 mrs_s x0, SYS_TTBR1_EL12 119 msr ttbr1_el1, x0 120 mrs_s x0, SYS_MAIR_EL12 121 msr mair_el1, x0 122 isb 123 124 // Hack the exception return to stay at EL2 125 mrs x0, spsr_el1 126 and x0, x0, #~PSR_MODE_MASK 127 mov x1, #PSR_MODE_EL2h 128 orr x0, x0, x1 129 msr spsr_el1, x0 130 131 b enter_vhe 132SYM_CODE_END(__finalise_el2) 133 134 // At the point where we reach enter_vhe(), we run with 135 // the MMU off (which is enforced by __finalise_el2()). 136 // We thus need to be in the idmap, or everything will 137 // explode when enabling the MMU. 138 139 .pushsection .idmap.text, "ax" 140 141SYM_CODE_START_LOCAL(enter_vhe) 142 // Invalidate TLBs before enabling the MMU 143 tlbi vmalle1 144 dsb nsh 145 isb 146 147 // Enable the EL2 S1 MMU, as set up from EL1 148 mrs_s x0, SYS_SCTLR_EL12 149 set_sctlr_el1 x0 150 151 // Disable the EL1 S1 MMU for a good measure 152 mov_q x0, INIT_SCTLR_EL1_MMU_OFF 153 msr_s SYS_SCTLR_EL12, x0 154 155 mov x0, xzr 156 157 eret 158SYM_CODE_END(enter_vhe) 159 160 .popsection 161 162.macro invalid_vector label 163SYM_CODE_START_LOCAL(\label) 164 b \label 165SYM_CODE_END(\label) 166.endm 167 168 invalid_vector el2_sync_invalid 169 invalid_vector el2_irq_invalid 170 invalid_vector el2_fiq_invalid 171 invalid_vector el2_error_invalid 172 invalid_vector el1_sync_invalid 173 invalid_vector el1_irq_invalid 174 invalid_vector el1_fiq_invalid 175 invalid_vector el1_error_invalid 176 177 .popsection 178 179/* 180 * __hyp_set_vectors: Call this after boot to set the initial hypervisor 181 * vectors as part of hypervisor installation. On an SMP system, this should 182 * be called on each CPU. 183 * 184 * x0 must be the physical address of the new vector table, and must be 185 * 2KB aligned. 186 * 187 * Before calling this, you must check that the stub hypervisor is installed 188 * everywhere, by waiting for any secondary CPUs to be brought up and then 189 * checking that is_hyp_mode_available() is true. 190 * 191 * If not, there is a pre-existing hypervisor, some CPUs failed to boot, or 192 * something else went wrong... in such cases, trying to install a new 193 * hypervisor is unlikely to work as desired. 194 * 195 * When you call into your shiny new hypervisor, sp_el2 will contain junk, 196 * so you will need to set that to something sensible at the new hypervisor's 197 * initialisation entry point. 198 */ 199 200SYM_FUNC_START(__hyp_set_vectors) 201 mov x1, x0 202 mov x0, #HVC_SET_VECTORS 203 hvc #0 204 ret 205SYM_FUNC_END(__hyp_set_vectors) 206 207SYM_FUNC_START(__hyp_reset_vectors) 208 mov x0, #HVC_RESET_VECTORS 209 hvc #0 210 ret 211SYM_FUNC_END(__hyp_reset_vectors) 212 213/* 214 * Entry point to finalise EL2 and switch to VHE if deemed capable 215 * 216 * w0: boot mode, as returned by init_kernel_el() 217 */ 218SYM_FUNC_START(finalise_el2) 219 // Need to have booted at EL2 220 cmp w0, #BOOT_CPU_MODE_EL2 221 b.ne 1f 222 223 // and still be at EL1 224 mrs x0, CurrentEL 225 cmp x0, #CurrentEL_EL1 226 b.ne 1f 227 228 mov x0, #HVC_FINALISE_EL2 229 hvc #0 2301: 231 ret 232SYM_FUNC_END(finalise_el2) 233