1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * FP/SIMD context switching and fault handling 4 * 5 * Copyright (C) 2012 ARM Ltd. 6 * Author: Catalin Marinas <catalin.marinas@arm.com> 7 */ 8 9 #include <linux/bitmap.h> 10 #include <linux/bitops.h> 11 #include <linux/bottom_half.h> 12 #include <linux/bug.h> 13 #include <linux/cache.h> 14 #include <linux/compat.h> 15 #include <linux/compiler.h> 16 #include <linux/cpu.h> 17 #include <linux/cpu_pm.h> 18 #include <linux/kernel.h> 19 #include <linux/linkage.h> 20 #include <linux/irqflags.h> 21 #include <linux/init.h> 22 #include <linux/percpu.h> 23 #include <linux/prctl.h> 24 #include <linux/preempt.h> 25 #include <linux/ptrace.h> 26 #include <linux/sched/signal.h> 27 #include <linux/sched/task_stack.h> 28 #include <linux/signal.h> 29 #include <linux/slab.h> 30 #include <linux/stddef.h> 31 #include <linux/sysctl.h> 32 #include <linux/swab.h> 33 34 #include <asm/esr.h> 35 #include <asm/exception.h> 36 #include <asm/fpsimd.h> 37 #include <asm/cpufeature.h> 38 #include <asm/cputype.h> 39 #include <asm/neon.h> 40 #include <asm/processor.h> 41 #include <asm/simd.h> 42 #include <asm/sigcontext.h> 43 #include <asm/sysreg.h> 44 #include <asm/traps.h> 45 #include <asm/virt.h> 46 47 #define FPEXC_IOF (1 << 0) 48 #define FPEXC_DZF (1 << 1) 49 #define FPEXC_OFF (1 << 2) 50 #define FPEXC_UFF (1 << 3) 51 #define FPEXC_IXF (1 << 4) 52 #define FPEXC_IDF (1 << 7) 53 54 /* 55 * (Note: in this discussion, statements about FPSIMD apply equally to SVE.) 56 * 57 * In order to reduce the number of times the FPSIMD state is needlessly saved 58 * and restored, we need to keep track of two things: 59 * (a) for each task, we need to remember which CPU was the last one to have 60 * the task's FPSIMD state loaded into its FPSIMD registers; 61 * (b) for each CPU, we need to remember which task's userland FPSIMD state has 62 * been loaded into its FPSIMD registers most recently, or whether it has 63 * been used to perform kernel mode NEON in the meantime. 64 * 65 * For (a), we add a fpsimd_cpu field to thread_struct, which gets updated to 66 * the id of the current CPU every time the state is loaded onto a CPU. For (b), 67 * we add the per-cpu variable 'fpsimd_last_state' (below), which contains the 68 * address of the userland FPSIMD state of the task that was loaded onto the CPU 69 * the most recently, or NULL if kernel mode NEON has been performed after that. 70 * 71 * With this in place, we no longer have to restore the next FPSIMD state right 72 * when switching between tasks. Instead, we can defer this check to userland 73 * resume, at which time we verify whether the CPU's fpsimd_last_state and the 74 * task's fpsimd_cpu are still mutually in sync. If this is the case, we 75 * can omit the FPSIMD restore. 76 * 77 * As an optimization, we use the thread_info flag TIF_FOREIGN_FPSTATE to 78 * indicate whether or not the userland FPSIMD state of the current task is 79 * present in the registers. The flag is set unless the FPSIMD registers of this 80 * CPU currently contain the most recent userland FPSIMD state of the current 81 * task. 82 * 83 * In order to allow softirq handlers to use FPSIMD, kernel_neon_begin() may 84 * save the task's FPSIMD context back to task_struct from softirq context. 85 * To prevent this from racing with the manipulation of the task's FPSIMD state 86 * from task context and thereby corrupting the state, it is necessary to 87 * protect any manipulation of a task's fpsimd_state or TIF_FOREIGN_FPSTATE 88 * flag with {, __}get_cpu_fpsimd_context(). This will still allow softirqs to 89 * run but prevent them to use FPSIMD. 90 * 91 * For a certain task, the sequence may look something like this: 92 * - the task gets scheduled in; if both the task's fpsimd_cpu field 93 * contains the id of the current CPU, and the CPU's fpsimd_last_state per-cpu 94 * variable points to the task's fpsimd_state, the TIF_FOREIGN_FPSTATE flag is 95 * cleared, otherwise it is set; 96 * 97 * - the task returns to userland; if TIF_FOREIGN_FPSTATE is set, the task's 98 * userland FPSIMD state is copied from memory to the registers, the task's 99 * fpsimd_cpu field is set to the id of the current CPU, the current 100 * CPU's fpsimd_last_state pointer is set to this task's fpsimd_state and the 101 * TIF_FOREIGN_FPSTATE flag is cleared; 102 * 103 * - the task executes an ordinary syscall; upon return to userland, the 104 * TIF_FOREIGN_FPSTATE flag will still be cleared, so no FPSIMD state is 105 * restored; 106 * 107 * - the task executes a syscall which executes some NEON instructions; this is 108 * preceded by a call to kernel_neon_begin(), which copies the task's FPSIMD 109 * register contents to memory, clears the fpsimd_last_state per-cpu variable 110 * and sets the TIF_FOREIGN_FPSTATE flag; 111 * 112 * - the task gets preempted after kernel_neon_end() is called; as we have not 113 * returned from the 2nd syscall yet, TIF_FOREIGN_FPSTATE is still set so 114 * whatever is in the FPSIMD registers is not saved to memory, but discarded. 115 */ 116 struct fpsimd_last_state_struct { 117 struct user_fpsimd_state *st; 118 void *sve_state; 119 unsigned int sve_vl; 120 }; 121 122 static DEFINE_PER_CPU(struct fpsimd_last_state_struct, fpsimd_last_state); 123 124 /* Default VL for tasks that don't set it explicitly: */ 125 static int __sve_default_vl = -1; 126 127 static int get_sve_default_vl(void) 128 { 129 return READ_ONCE(__sve_default_vl); 130 } 131 132 #ifdef CONFIG_ARM64_SVE 133 134 static void set_sve_default_vl(int val) 135 { 136 WRITE_ONCE(__sve_default_vl, val); 137 } 138 139 /* Maximum supported vector length across all CPUs (initially poisoned) */ 140 int __ro_after_init sve_max_vl = SVE_VL_MIN; 141 int __ro_after_init sve_max_virtualisable_vl = SVE_VL_MIN; 142 143 /* 144 * Set of available vector lengths, 145 * where length vq encoded as bit __vq_to_bit(vq): 146 */ 147 __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX); 148 /* Set of vector lengths present on at least one cpu: */ 149 static __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX); 150 151 static void __percpu *efi_sve_state; 152 153 #else /* ! CONFIG_ARM64_SVE */ 154 155 /* Dummy declaration for code that will be optimised out: */ 156 extern __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX); 157 extern __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX); 158 extern void __percpu *efi_sve_state; 159 160 #endif /* ! CONFIG_ARM64_SVE */ 161 162 DEFINE_PER_CPU(bool, fpsimd_context_busy); 163 EXPORT_PER_CPU_SYMBOL(fpsimd_context_busy); 164 165 static void __get_cpu_fpsimd_context(void) 166 { 167 bool busy = __this_cpu_xchg(fpsimd_context_busy, true); 168 169 WARN_ON(busy); 170 } 171 172 /* 173 * Claim ownership of the CPU FPSIMD context for use by the calling context. 174 * 175 * The caller may freely manipulate the FPSIMD context metadata until 176 * put_cpu_fpsimd_context() is called. 177 * 178 * The double-underscore version must only be called if you know the task 179 * can't be preempted. 180 */ 181 static void get_cpu_fpsimd_context(void) 182 { 183 preempt_disable(); 184 __get_cpu_fpsimd_context(); 185 } 186 187 static void __put_cpu_fpsimd_context(void) 188 { 189 bool busy = __this_cpu_xchg(fpsimd_context_busy, false); 190 191 WARN_ON(!busy); /* No matching get_cpu_fpsimd_context()? */ 192 } 193 194 /* 195 * Release the CPU FPSIMD context. 196 * 197 * Must be called from a context in which get_cpu_fpsimd_context() was 198 * previously called, with no call to put_cpu_fpsimd_context() in the 199 * meantime. 200 */ 201 static void put_cpu_fpsimd_context(void) 202 { 203 __put_cpu_fpsimd_context(); 204 preempt_enable(); 205 } 206 207 static bool have_cpu_fpsimd_context(void) 208 { 209 return !preemptible() && __this_cpu_read(fpsimd_context_busy); 210 } 211 212 /* 213 * Call __sve_free() directly only if you know task can't be scheduled 214 * or preempted. 215 */ 216 static void __sve_free(struct task_struct *task) 217 { 218 kfree(task->thread.sve_state); 219 task->thread.sve_state = NULL; 220 } 221 222 static void sve_free(struct task_struct *task) 223 { 224 WARN_ON(test_tsk_thread_flag(task, TIF_SVE)); 225 226 __sve_free(task); 227 } 228 229 /* 230 * TIF_SVE controls whether a task can use SVE without trapping while 231 * in userspace, and also the way a task's FPSIMD/SVE state is stored 232 * in thread_struct. 233 * 234 * The kernel uses this flag to track whether a user task is actively 235 * using SVE, and therefore whether full SVE register state needs to 236 * be tracked. If not, the cheaper FPSIMD context handling code can 237 * be used instead of the more costly SVE equivalents. 238 * 239 * * TIF_SVE set: 240 * 241 * The task can execute SVE instructions while in userspace without 242 * trapping to the kernel. 243 * 244 * When stored, Z0-Z31 (incorporating Vn in bits[127:0] or the 245 * corresponding Zn), P0-P15 and FFR are encoded in in 246 * task->thread.sve_state, formatted appropriately for vector 247 * length task->thread.sve_vl. 248 * 249 * task->thread.sve_state must point to a valid buffer at least 250 * sve_state_size(task) bytes in size. 251 * 252 * During any syscall, the kernel may optionally clear TIF_SVE and 253 * discard the vector state except for the FPSIMD subset. 254 * 255 * * TIF_SVE clear: 256 * 257 * An attempt by the user task to execute an SVE instruction causes 258 * do_sve_acc() to be called, which does some preparation and then 259 * sets TIF_SVE. 260 * 261 * When stored, FPSIMD registers V0-V31 are encoded in 262 * task->thread.uw.fpsimd_state; bits [max : 128] for each of Z0-Z31 are 263 * logically zero but not stored anywhere; P0-P15 and FFR are not 264 * stored and have unspecified values from userspace's point of 265 * view. For hygiene purposes, the kernel zeroes them on next use, 266 * but userspace is discouraged from relying on this. 267 * 268 * task->thread.sve_state does not need to be non-NULL, valid or any 269 * particular size: it must not be dereferenced. 270 * 271 * * FPSR and FPCR are always stored in task->thread.uw.fpsimd_state 272 * irrespective of whether TIF_SVE is clear or set, since these are 273 * not vector length dependent. 274 */ 275 276 /* 277 * Update current's FPSIMD/SVE registers from thread_struct. 278 * 279 * This function should be called only when the FPSIMD/SVE state in 280 * thread_struct is known to be up to date, when preparing to enter 281 * userspace. 282 */ 283 static void task_fpsimd_load(void) 284 { 285 WARN_ON(!system_supports_fpsimd()); 286 WARN_ON(!have_cpu_fpsimd_context()); 287 288 if (system_supports_sve() && test_thread_flag(TIF_SVE)) 289 sve_load_state(sve_pffr(¤t->thread), 290 ¤t->thread.uw.fpsimd_state.fpsr, 291 sve_vq_from_vl(current->thread.sve_vl) - 1); 292 else 293 fpsimd_load_state(¤t->thread.uw.fpsimd_state); 294 } 295 296 /* 297 * Ensure FPSIMD/SVE storage in memory for the loaded context is up to 298 * date with respect to the CPU registers. 299 */ 300 static void fpsimd_save(void) 301 { 302 struct fpsimd_last_state_struct const *last = 303 this_cpu_ptr(&fpsimd_last_state); 304 /* set by fpsimd_bind_task_to_cpu() or fpsimd_bind_state_to_cpu() */ 305 306 WARN_ON(!system_supports_fpsimd()); 307 WARN_ON(!have_cpu_fpsimd_context()); 308 309 if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) { 310 if (system_supports_sve() && test_thread_flag(TIF_SVE)) { 311 if (WARN_ON(sve_get_vl() != last->sve_vl)) { 312 /* 313 * Can't save the user regs, so current would 314 * re-enter user with corrupt state. 315 * There's no way to recover, so kill it: 316 */ 317 force_signal_inject(SIGKILL, SI_KERNEL, 0, 0); 318 return; 319 } 320 321 sve_save_state((char *)last->sve_state + 322 sve_ffr_offset(last->sve_vl), 323 &last->st->fpsr); 324 } else 325 fpsimd_save_state(last->st); 326 } 327 } 328 329 /* 330 * All vector length selection from userspace comes through here. 331 * We're on a slow path, so some sanity-checks are included. 332 * If things go wrong there's a bug somewhere, but try to fall back to a 333 * safe choice. 334 */ 335 static unsigned int find_supported_vector_length(unsigned int vl) 336 { 337 int bit; 338 int max_vl = sve_max_vl; 339 340 if (WARN_ON(!sve_vl_valid(vl))) 341 vl = SVE_VL_MIN; 342 343 if (WARN_ON(!sve_vl_valid(max_vl))) 344 max_vl = SVE_VL_MIN; 345 346 if (vl > max_vl) 347 vl = max_vl; 348 349 bit = find_next_bit(sve_vq_map, SVE_VQ_MAX, 350 __vq_to_bit(sve_vq_from_vl(vl))); 351 return sve_vl_from_vq(__bit_to_vq(bit)); 352 } 353 354 #if defined(CONFIG_ARM64_SVE) && defined(CONFIG_SYSCTL) 355 356 static int sve_proc_do_default_vl(struct ctl_table *table, int write, 357 void *buffer, size_t *lenp, loff_t *ppos) 358 { 359 int ret; 360 int vl = get_sve_default_vl(); 361 struct ctl_table tmp_table = { 362 .data = &vl, 363 .maxlen = sizeof(vl), 364 }; 365 366 ret = proc_dointvec(&tmp_table, write, buffer, lenp, ppos); 367 if (ret || !write) 368 return ret; 369 370 /* Writing -1 has the special meaning "set to max": */ 371 if (vl == -1) 372 vl = sve_max_vl; 373 374 if (!sve_vl_valid(vl)) 375 return -EINVAL; 376 377 set_sve_default_vl(find_supported_vector_length(vl)); 378 return 0; 379 } 380 381 static struct ctl_table sve_default_vl_table[] = { 382 { 383 .procname = "sve_default_vector_length", 384 .mode = 0644, 385 .proc_handler = sve_proc_do_default_vl, 386 }, 387 { } 388 }; 389 390 static int __init sve_sysctl_init(void) 391 { 392 if (system_supports_sve()) 393 if (!register_sysctl("abi", sve_default_vl_table)) 394 return -EINVAL; 395 396 return 0; 397 } 398 399 #else /* ! (CONFIG_ARM64_SVE && CONFIG_SYSCTL) */ 400 static int __init sve_sysctl_init(void) { return 0; } 401 #endif /* ! (CONFIG_ARM64_SVE && CONFIG_SYSCTL) */ 402 403 #define ZREG(sve_state, vq, n) ((char *)(sve_state) + \ 404 (SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET)) 405 406 #ifdef CONFIG_CPU_BIG_ENDIAN 407 static __uint128_t arm64_cpu_to_le128(__uint128_t x) 408 { 409 u64 a = swab64(x); 410 u64 b = swab64(x >> 64); 411 412 return ((__uint128_t)a << 64) | b; 413 } 414 #else 415 static __uint128_t arm64_cpu_to_le128(__uint128_t x) 416 { 417 return x; 418 } 419 #endif 420 421 #define arm64_le128_to_cpu(x) arm64_cpu_to_le128(x) 422 423 static void __fpsimd_to_sve(void *sst, struct user_fpsimd_state const *fst, 424 unsigned int vq) 425 { 426 unsigned int i; 427 __uint128_t *p; 428 429 for (i = 0; i < SVE_NUM_ZREGS; ++i) { 430 p = (__uint128_t *)ZREG(sst, vq, i); 431 *p = arm64_cpu_to_le128(fst->vregs[i]); 432 } 433 } 434 435 /* 436 * Transfer the FPSIMD state in task->thread.uw.fpsimd_state to 437 * task->thread.sve_state. 438 * 439 * Task can be a non-runnable task, or current. In the latter case, 440 * the caller must have ownership of the cpu FPSIMD context before calling 441 * this function. 442 * task->thread.sve_state must point to at least sve_state_size(task) 443 * bytes of allocated kernel memory. 444 * task->thread.uw.fpsimd_state must be up to date before calling this 445 * function. 446 */ 447 static void fpsimd_to_sve(struct task_struct *task) 448 { 449 unsigned int vq; 450 void *sst = task->thread.sve_state; 451 struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; 452 453 if (!system_supports_sve()) 454 return; 455 456 vq = sve_vq_from_vl(task->thread.sve_vl); 457 __fpsimd_to_sve(sst, fst, vq); 458 } 459 460 /* 461 * Transfer the SVE state in task->thread.sve_state to 462 * task->thread.uw.fpsimd_state. 463 * 464 * Task can be a non-runnable task, or current. In the latter case, 465 * the caller must have ownership of the cpu FPSIMD context before calling 466 * this function. 467 * task->thread.sve_state must point to at least sve_state_size(task) 468 * bytes of allocated kernel memory. 469 * task->thread.sve_state must be up to date before calling this function. 470 */ 471 static void sve_to_fpsimd(struct task_struct *task) 472 { 473 unsigned int vq; 474 void const *sst = task->thread.sve_state; 475 struct user_fpsimd_state *fst = &task->thread.uw.fpsimd_state; 476 unsigned int i; 477 __uint128_t const *p; 478 479 if (!system_supports_sve()) 480 return; 481 482 vq = sve_vq_from_vl(task->thread.sve_vl); 483 for (i = 0; i < SVE_NUM_ZREGS; ++i) { 484 p = (__uint128_t const *)ZREG(sst, vq, i); 485 fst->vregs[i] = arm64_le128_to_cpu(*p); 486 } 487 } 488 489 #ifdef CONFIG_ARM64_SVE 490 491 /* 492 * Return how many bytes of memory are required to store the full SVE 493 * state for task, given task's currently configured vector length. 494 */ 495 size_t sve_state_size(struct task_struct const *task) 496 { 497 return SVE_SIG_REGS_SIZE(sve_vq_from_vl(task->thread.sve_vl)); 498 } 499 500 /* 501 * Ensure that task->thread.sve_state is allocated and sufficiently large. 502 * 503 * This function should be used only in preparation for replacing 504 * task->thread.sve_state with new data. The memory is always zeroed 505 * here to prevent stale data from showing through: this is done in 506 * the interest of testability and predictability: except in the 507 * do_sve_acc() case, there is no ABI requirement to hide stale data 508 * written previously be task. 509 */ 510 void sve_alloc(struct task_struct *task) 511 { 512 if (task->thread.sve_state) { 513 memset(task->thread.sve_state, 0, sve_state_size(current)); 514 return; 515 } 516 517 /* This is a small allocation (maximum ~8KB) and Should Not Fail. */ 518 task->thread.sve_state = 519 kzalloc(sve_state_size(task), GFP_KERNEL); 520 521 /* 522 * If future SVE revisions can have larger vectors though, 523 * this may cease to be true: 524 */ 525 BUG_ON(!task->thread.sve_state); 526 } 527 528 529 /* 530 * Ensure that task->thread.sve_state is up to date with respect to 531 * the user task, irrespective of when SVE is in use or not. 532 * 533 * This should only be called by ptrace. task must be non-runnable. 534 * task->thread.sve_state must point to at least sve_state_size(task) 535 * bytes of allocated kernel memory. 536 */ 537 void fpsimd_sync_to_sve(struct task_struct *task) 538 { 539 if (!test_tsk_thread_flag(task, TIF_SVE)) 540 fpsimd_to_sve(task); 541 } 542 543 /* 544 * Ensure that task->thread.uw.fpsimd_state is up to date with respect to 545 * the user task, irrespective of whether SVE is in use or not. 546 * 547 * This should only be called by ptrace. task must be non-runnable. 548 * task->thread.sve_state must point to at least sve_state_size(task) 549 * bytes of allocated kernel memory. 550 */ 551 void sve_sync_to_fpsimd(struct task_struct *task) 552 { 553 if (test_tsk_thread_flag(task, TIF_SVE)) 554 sve_to_fpsimd(task); 555 } 556 557 /* 558 * Ensure that task->thread.sve_state is up to date with respect to 559 * the task->thread.uw.fpsimd_state. 560 * 561 * This should only be called by ptrace to merge new FPSIMD register 562 * values into a task for which SVE is currently active. 563 * task must be non-runnable. 564 * task->thread.sve_state must point to at least sve_state_size(task) 565 * bytes of allocated kernel memory. 566 * task->thread.uw.fpsimd_state must already have been initialised with 567 * the new FPSIMD register values to be merged in. 568 */ 569 void sve_sync_from_fpsimd_zeropad(struct task_struct *task) 570 { 571 unsigned int vq; 572 void *sst = task->thread.sve_state; 573 struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; 574 575 if (!test_tsk_thread_flag(task, TIF_SVE)) 576 return; 577 578 vq = sve_vq_from_vl(task->thread.sve_vl); 579 580 memset(sst, 0, SVE_SIG_REGS_SIZE(vq)); 581 __fpsimd_to_sve(sst, fst, vq); 582 } 583 584 int sve_set_vector_length(struct task_struct *task, 585 unsigned long vl, unsigned long flags) 586 { 587 if (flags & ~(unsigned long)(PR_SVE_VL_INHERIT | 588 PR_SVE_SET_VL_ONEXEC)) 589 return -EINVAL; 590 591 if (!sve_vl_valid(vl)) 592 return -EINVAL; 593 594 /* 595 * Clamp to the maximum vector length that VL-agnostic SVE code can 596 * work with. A flag may be assigned in the future to allow setting 597 * of larger vector lengths without confusing older software. 598 */ 599 if (vl > SVE_VL_ARCH_MAX) 600 vl = SVE_VL_ARCH_MAX; 601 602 vl = find_supported_vector_length(vl); 603 604 if (flags & (PR_SVE_VL_INHERIT | 605 PR_SVE_SET_VL_ONEXEC)) 606 task->thread.sve_vl_onexec = vl; 607 else 608 /* Reset VL to system default on next exec: */ 609 task->thread.sve_vl_onexec = 0; 610 611 /* Only actually set the VL if not deferred: */ 612 if (flags & PR_SVE_SET_VL_ONEXEC) 613 goto out; 614 615 if (vl == task->thread.sve_vl) 616 goto out; 617 618 /* 619 * To ensure the FPSIMD bits of the SVE vector registers are preserved, 620 * write any live register state back to task_struct, and convert to a 621 * non-SVE thread. 622 */ 623 if (task == current) { 624 get_cpu_fpsimd_context(); 625 626 fpsimd_save(); 627 } 628 629 fpsimd_flush_task_state(task); 630 if (test_and_clear_tsk_thread_flag(task, TIF_SVE)) 631 sve_to_fpsimd(task); 632 633 if (task == current) 634 put_cpu_fpsimd_context(); 635 636 /* 637 * Force reallocation of task SVE state to the correct size 638 * on next use: 639 */ 640 sve_free(task); 641 642 task->thread.sve_vl = vl; 643 644 out: 645 update_tsk_thread_flag(task, TIF_SVE_VL_INHERIT, 646 flags & PR_SVE_VL_INHERIT); 647 648 return 0; 649 } 650 651 /* 652 * Encode the current vector length and flags for return. 653 * This is only required for prctl(): ptrace has separate fields 654 * 655 * flags are as for sve_set_vector_length(). 656 */ 657 static int sve_prctl_status(unsigned long flags) 658 { 659 int ret; 660 661 if (flags & PR_SVE_SET_VL_ONEXEC) 662 ret = current->thread.sve_vl_onexec; 663 else 664 ret = current->thread.sve_vl; 665 666 if (test_thread_flag(TIF_SVE_VL_INHERIT)) 667 ret |= PR_SVE_VL_INHERIT; 668 669 return ret; 670 } 671 672 /* PR_SVE_SET_VL */ 673 int sve_set_current_vl(unsigned long arg) 674 { 675 unsigned long vl, flags; 676 int ret; 677 678 vl = arg & PR_SVE_VL_LEN_MASK; 679 flags = arg & ~vl; 680 681 if (!system_supports_sve() || is_compat_task()) 682 return -EINVAL; 683 684 ret = sve_set_vector_length(current, vl, flags); 685 if (ret) 686 return ret; 687 688 return sve_prctl_status(flags); 689 } 690 691 /* PR_SVE_GET_VL */ 692 int sve_get_current_vl(void) 693 { 694 if (!system_supports_sve() || is_compat_task()) 695 return -EINVAL; 696 697 return sve_prctl_status(0); 698 } 699 700 static void sve_probe_vqs(DECLARE_BITMAP(map, SVE_VQ_MAX)) 701 { 702 unsigned int vq, vl; 703 unsigned long zcr; 704 705 bitmap_zero(map, SVE_VQ_MAX); 706 707 zcr = ZCR_ELx_LEN_MASK; 708 zcr = read_sysreg_s(SYS_ZCR_EL1) & ~zcr; 709 710 for (vq = SVE_VQ_MAX; vq >= SVE_VQ_MIN; --vq) { 711 write_sysreg_s(zcr | (vq - 1), SYS_ZCR_EL1); /* self-syncing */ 712 vl = sve_get_vl(); 713 vq = sve_vq_from_vl(vl); /* skip intervening lengths */ 714 set_bit(__vq_to_bit(vq), map); 715 } 716 } 717 718 /* 719 * Initialise the set of known supported VQs for the boot CPU. 720 * This is called during kernel boot, before secondary CPUs are brought up. 721 */ 722 void __init sve_init_vq_map(void) 723 { 724 sve_probe_vqs(sve_vq_map); 725 bitmap_copy(sve_vq_partial_map, sve_vq_map, SVE_VQ_MAX); 726 } 727 728 /* 729 * If we haven't committed to the set of supported VQs yet, filter out 730 * those not supported by the current CPU. 731 * This function is called during the bring-up of early secondary CPUs only. 732 */ 733 void sve_update_vq_map(void) 734 { 735 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 736 737 sve_probe_vqs(tmp_map); 738 bitmap_and(sve_vq_map, sve_vq_map, tmp_map, SVE_VQ_MAX); 739 bitmap_or(sve_vq_partial_map, sve_vq_partial_map, tmp_map, SVE_VQ_MAX); 740 } 741 742 /* 743 * Check whether the current CPU supports all VQs in the committed set. 744 * This function is called during the bring-up of late secondary CPUs only. 745 */ 746 int sve_verify_vq_map(void) 747 { 748 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 749 unsigned long b; 750 751 sve_probe_vqs(tmp_map); 752 753 bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); 754 if (bitmap_intersects(tmp_map, sve_vq_map, SVE_VQ_MAX)) { 755 pr_warn("SVE: cpu%d: Required vector length(s) missing\n", 756 smp_processor_id()); 757 return -EINVAL; 758 } 759 760 if (!IS_ENABLED(CONFIG_KVM) || !is_hyp_mode_available()) 761 return 0; 762 763 /* 764 * For KVM, it is necessary to ensure that this CPU doesn't 765 * support any vector length that guests may have probed as 766 * unsupported. 767 */ 768 769 /* Recover the set of supported VQs: */ 770 bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); 771 /* Find VQs supported that are not globally supported: */ 772 bitmap_andnot(tmp_map, tmp_map, sve_vq_map, SVE_VQ_MAX); 773 774 /* Find the lowest such VQ, if any: */ 775 b = find_last_bit(tmp_map, SVE_VQ_MAX); 776 if (b >= SVE_VQ_MAX) 777 return 0; /* no mismatches */ 778 779 /* 780 * Mismatches above sve_max_virtualisable_vl are fine, since 781 * no guest is allowed to configure ZCR_EL2.LEN to exceed this: 782 */ 783 if (sve_vl_from_vq(__bit_to_vq(b)) <= sve_max_virtualisable_vl) { 784 pr_warn("SVE: cpu%d: Unsupported vector length(s) present\n", 785 smp_processor_id()); 786 return -EINVAL; 787 } 788 789 return 0; 790 } 791 792 static void __init sve_efi_setup(void) 793 { 794 if (!IS_ENABLED(CONFIG_EFI)) 795 return; 796 797 /* 798 * alloc_percpu() warns and prints a backtrace if this goes wrong. 799 * This is evidence of a crippled system and we are returning void, 800 * so no attempt is made to handle this situation here. 801 */ 802 if (!sve_vl_valid(sve_max_vl)) 803 goto fail; 804 805 efi_sve_state = __alloc_percpu( 806 SVE_SIG_REGS_SIZE(sve_vq_from_vl(sve_max_vl)), SVE_VQ_BYTES); 807 if (!efi_sve_state) 808 goto fail; 809 810 return; 811 812 fail: 813 panic("Cannot allocate percpu memory for EFI SVE save/restore"); 814 } 815 816 /* 817 * Enable SVE for EL1. 818 * Intended for use by the cpufeatures code during CPU boot. 819 */ 820 void sve_kernel_enable(const struct arm64_cpu_capabilities *__always_unused p) 821 { 822 write_sysreg(read_sysreg(CPACR_EL1) | CPACR_EL1_ZEN_EL1EN, CPACR_EL1); 823 isb(); 824 } 825 826 /* 827 * Read the pseudo-ZCR used by cpufeatures to identify the supported SVE 828 * vector length. 829 * 830 * Use only if SVE is present. 831 * This function clobbers the SVE vector length. 832 */ 833 u64 read_zcr_features(void) 834 { 835 u64 zcr; 836 unsigned int vq_max; 837 838 /* 839 * Set the maximum possible VL, and write zeroes to all other 840 * bits to see if they stick. 841 */ 842 sve_kernel_enable(NULL); 843 write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL1); 844 845 zcr = read_sysreg_s(SYS_ZCR_EL1); 846 zcr &= ~(u64)ZCR_ELx_LEN_MASK; /* find sticky 1s outside LEN field */ 847 vq_max = sve_vq_from_vl(sve_get_vl()); 848 zcr |= vq_max - 1; /* set LEN field to maximum effective value */ 849 850 return zcr; 851 } 852 853 void __init sve_setup(void) 854 { 855 u64 zcr; 856 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 857 unsigned long b; 858 859 if (!system_supports_sve()) 860 return; 861 862 /* 863 * The SVE architecture mandates support for 128-bit vectors, 864 * so sve_vq_map must have at least SVE_VQ_MIN set. 865 * If something went wrong, at least try to patch it up: 866 */ 867 if (WARN_ON(!test_bit(__vq_to_bit(SVE_VQ_MIN), sve_vq_map))) 868 set_bit(__vq_to_bit(SVE_VQ_MIN), sve_vq_map); 869 870 zcr = read_sanitised_ftr_reg(SYS_ZCR_EL1); 871 sve_max_vl = sve_vl_from_vq((zcr & ZCR_ELx_LEN_MASK) + 1); 872 873 /* 874 * Sanity-check that the max VL we determined through CPU features 875 * corresponds properly to sve_vq_map. If not, do our best: 876 */ 877 if (WARN_ON(sve_max_vl != find_supported_vector_length(sve_max_vl))) 878 sve_max_vl = find_supported_vector_length(sve_max_vl); 879 880 /* 881 * For the default VL, pick the maximum supported value <= 64. 882 * VL == 64 is guaranteed not to grow the signal frame. 883 */ 884 set_sve_default_vl(find_supported_vector_length(64)); 885 886 bitmap_andnot(tmp_map, sve_vq_partial_map, sve_vq_map, 887 SVE_VQ_MAX); 888 889 b = find_last_bit(tmp_map, SVE_VQ_MAX); 890 if (b >= SVE_VQ_MAX) 891 /* No non-virtualisable VLs found */ 892 sve_max_virtualisable_vl = SVE_VQ_MAX; 893 else if (WARN_ON(b == SVE_VQ_MAX - 1)) 894 /* No virtualisable VLs? This is architecturally forbidden. */ 895 sve_max_virtualisable_vl = SVE_VQ_MIN; 896 else /* b + 1 < SVE_VQ_MAX */ 897 sve_max_virtualisable_vl = sve_vl_from_vq(__bit_to_vq(b + 1)); 898 899 if (sve_max_virtualisable_vl > sve_max_vl) 900 sve_max_virtualisable_vl = sve_max_vl; 901 902 pr_info("SVE: maximum available vector length %u bytes per vector\n", 903 sve_max_vl); 904 pr_info("SVE: default vector length %u bytes per vector\n", 905 get_sve_default_vl()); 906 907 /* KVM decides whether to support mismatched systems. Just warn here: */ 908 if (sve_max_virtualisable_vl < sve_max_vl) 909 pr_warn("SVE: unvirtualisable vector lengths present\n"); 910 911 sve_efi_setup(); 912 } 913 914 /* 915 * Called from the put_task_struct() path, which cannot get here 916 * unless dead_task is really dead and not schedulable. 917 */ 918 void fpsimd_release_task(struct task_struct *dead_task) 919 { 920 __sve_free(dead_task); 921 } 922 923 #endif /* CONFIG_ARM64_SVE */ 924 925 /* 926 * Trapped SVE access 927 * 928 * Storage is allocated for the full SVE state, the current FPSIMD 929 * register contents are migrated across, and TIF_SVE is set so that 930 * the SVE access trap will be disabled the next time this task 931 * reaches ret_to_user. 932 * 933 * TIF_SVE should be clear on entry: otherwise, fpsimd_restore_current_state() 934 * would have disabled the SVE access trap for userspace during 935 * ret_to_user, making an SVE access trap impossible in that case. 936 */ 937 void do_sve_acc(unsigned int esr, struct pt_regs *regs) 938 { 939 /* Even if we chose not to use SVE, the hardware could still trap: */ 940 if (unlikely(!system_supports_sve()) || WARN_ON(is_compat_task())) { 941 force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0); 942 return; 943 } 944 945 sve_alloc(current); 946 947 get_cpu_fpsimd_context(); 948 949 fpsimd_save(); 950 951 /* Force ret_to_user to reload the registers: */ 952 fpsimd_flush_task_state(current); 953 954 fpsimd_to_sve(current); 955 if (test_and_set_thread_flag(TIF_SVE)) 956 WARN_ON(1); /* SVE access shouldn't have trapped */ 957 958 put_cpu_fpsimd_context(); 959 } 960 961 /* 962 * Trapped FP/ASIMD access. 963 */ 964 void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs) 965 { 966 /* TODO: implement lazy context saving/restoring */ 967 WARN_ON(1); 968 } 969 970 /* 971 * Raise a SIGFPE for the current process. 972 */ 973 void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs) 974 { 975 unsigned int si_code = FPE_FLTUNK; 976 977 if (esr & ESR_ELx_FP_EXC_TFV) { 978 if (esr & FPEXC_IOF) 979 si_code = FPE_FLTINV; 980 else if (esr & FPEXC_DZF) 981 si_code = FPE_FLTDIV; 982 else if (esr & FPEXC_OFF) 983 si_code = FPE_FLTOVF; 984 else if (esr & FPEXC_UFF) 985 si_code = FPE_FLTUND; 986 else if (esr & FPEXC_IXF) 987 si_code = FPE_FLTRES; 988 } 989 990 send_sig_fault(SIGFPE, si_code, 991 (void __user *)instruction_pointer(regs), 992 current); 993 } 994 995 void fpsimd_thread_switch(struct task_struct *next) 996 { 997 bool wrong_task, wrong_cpu; 998 999 if (!system_supports_fpsimd()) 1000 return; 1001 1002 __get_cpu_fpsimd_context(); 1003 1004 /* Save unsaved fpsimd state, if any: */ 1005 fpsimd_save(); 1006 1007 /* 1008 * Fix up TIF_FOREIGN_FPSTATE to correctly describe next's 1009 * state. For kernel threads, FPSIMD registers are never loaded 1010 * and wrong_task and wrong_cpu will always be true. 1011 */ 1012 wrong_task = __this_cpu_read(fpsimd_last_state.st) != 1013 &next->thread.uw.fpsimd_state; 1014 wrong_cpu = next->thread.fpsimd_cpu != smp_processor_id(); 1015 1016 update_tsk_thread_flag(next, TIF_FOREIGN_FPSTATE, 1017 wrong_task || wrong_cpu); 1018 1019 __put_cpu_fpsimd_context(); 1020 } 1021 1022 void fpsimd_flush_thread(void) 1023 { 1024 int vl, supported_vl; 1025 1026 if (!system_supports_fpsimd()) 1027 return; 1028 1029 get_cpu_fpsimd_context(); 1030 1031 fpsimd_flush_task_state(current); 1032 memset(¤t->thread.uw.fpsimd_state, 0, 1033 sizeof(current->thread.uw.fpsimd_state)); 1034 1035 if (system_supports_sve()) { 1036 clear_thread_flag(TIF_SVE); 1037 sve_free(current); 1038 1039 /* 1040 * Reset the task vector length as required. 1041 * This is where we ensure that all user tasks have a valid 1042 * vector length configured: no kernel task can become a user 1043 * task without an exec and hence a call to this function. 1044 * By the time the first call to this function is made, all 1045 * early hardware probing is complete, so __sve_default_vl 1046 * should be valid. 1047 * If a bug causes this to go wrong, we make some noise and 1048 * try to fudge thread.sve_vl to a safe value here. 1049 */ 1050 vl = current->thread.sve_vl_onexec ? 1051 current->thread.sve_vl_onexec : get_sve_default_vl(); 1052 1053 if (WARN_ON(!sve_vl_valid(vl))) 1054 vl = SVE_VL_MIN; 1055 1056 supported_vl = find_supported_vector_length(vl); 1057 if (WARN_ON(supported_vl != vl)) 1058 vl = supported_vl; 1059 1060 current->thread.sve_vl = vl; 1061 1062 /* 1063 * If the task is not set to inherit, ensure that the vector 1064 * length will be reset by a subsequent exec: 1065 */ 1066 if (!test_thread_flag(TIF_SVE_VL_INHERIT)) 1067 current->thread.sve_vl_onexec = 0; 1068 } 1069 1070 put_cpu_fpsimd_context(); 1071 } 1072 1073 /* 1074 * Save the userland FPSIMD state of 'current' to memory, but only if the state 1075 * currently held in the registers does in fact belong to 'current' 1076 */ 1077 void fpsimd_preserve_current_state(void) 1078 { 1079 if (!system_supports_fpsimd()) 1080 return; 1081 1082 get_cpu_fpsimd_context(); 1083 fpsimd_save(); 1084 put_cpu_fpsimd_context(); 1085 } 1086 1087 /* 1088 * Like fpsimd_preserve_current_state(), but ensure that 1089 * current->thread.uw.fpsimd_state is updated so that it can be copied to 1090 * the signal frame. 1091 */ 1092 void fpsimd_signal_preserve_current_state(void) 1093 { 1094 fpsimd_preserve_current_state(); 1095 if (system_supports_sve() && test_thread_flag(TIF_SVE)) 1096 sve_to_fpsimd(current); 1097 } 1098 1099 /* 1100 * Associate current's FPSIMD context with this cpu 1101 * The caller must have ownership of the cpu FPSIMD context before calling 1102 * this function. 1103 */ 1104 void fpsimd_bind_task_to_cpu(void) 1105 { 1106 struct fpsimd_last_state_struct *last = 1107 this_cpu_ptr(&fpsimd_last_state); 1108 1109 WARN_ON(!system_supports_fpsimd()); 1110 last->st = ¤t->thread.uw.fpsimd_state; 1111 last->sve_state = current->thread.sve_state; 1112 last->sve_vl = current->thread.sve_vl; 1113 current->thread.fpsimd_cpu = smp_processor_id(); 1114 1115 if (system_supports_sve()) { 1116 /* Toggle SVE trapping for userspace if needed */ 1117 if (test_thread_flag(TIF_SVE)) 1118 sve_user_enable(); 1119 else 1120 sve_user_disable(); 1121 1122 /* Serialised by exception return to user */ 1123 } 1124 } 1125 1126 void fpsimd_bind_state_to_cpu(struct user_fpsimd_state *st, void *sve_state, 1127 unsigned int sve_vl) 1128 { 1129 struct fpsimd_last_state_struct *last = 1130 this_cpu_ptr(&fpsimd_last_state); 1131 1132 WARN_ON(!system_supports_fpsimd()); 1133 WARN_ON(!in_softirq() && !irqs_disabled()); 1134 1135 last->st = st; 1136 last->sve_state = sve_state; 1137 last->sve_vl = sve_vl; 1138 } 1139 1140 /* 1141 * Load the userland FPSIMD state of 'current' from memory, but only if the 1142 * FPSIMD state already held in the registers is /not/ the most recent FPSIMD 1143 * state of 'current' 1144 */ 1145 void fpsimd_restore_current_state(void) 1146 { 1147 /* 1148 * For the tasks that were created before we detected the absence of 1149 * FP/SIMD, the TIF_FOREIGN_FPSTATE could be set via fpsimd_thread_switch(), 1150 * e.g, init. This could be then inherited by the children processes. 1151 * If we later detect that the system doesn't support FP/SIMD, 1152 * we must clear the flag for all the tasks to indicate that the 1153 * FPSTATE is clean (as we can't have one) to avoid looping for ever in 1154 * do_notify_resume(). 1155 */ 1156 if (!system_supports_fpsimd()) { 1157 clear_thread_flag(TIF_FOREIGN_FPSTATE); 1158 return; 1159 } 1160 1161 get_cpu_fpsimd_context(); 1162 1163 if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) { 1164 task_fpsimd_load(); 1165 fpsimd_bind_task_to_cpu(); 1166 } 1167 1168 put_cpu_fpsimd_context(); 1169 } 1170 1171 /* 1172 * Load an updated userland FPSIMD state for 'current' from memory and set the 1173 * flag that indicates that the FPSIMD register contents are the most recent 1174 * FPSIMD state of 'current' 1175 */ 1176 void fpsimd_update_current_state(struct user_fpsimd_state const *state) 1177 { 1178 if (WARN_ON(!system_supports_fpsimd())) 1179 return; 1180 1181 get_cpu_fpsimd_context(); 1182 1183 current->thread.uw.fpsimd_state = *state; 1184 if (system_supports_sve() && test_thread_flag(TIF_SVE)) 1185 fpsimd_to_sve(current); 1186 1187 task_fpsimd_load(); 1188 fpsimd_bind_task_to_cpu(); 1189 1190 clear_thread_flag(TIF_FOREIGN_FPSTATE); 1191 1192 put_cpu_fpsimd_context(); 1193 } 1194 1195 /* 1196 * Invalidate live CPU copies of task t's FPSIMD state 1197 * 1198 * This function may be called with preemption enabled. The barrier() 1199 * ensures that the assignment to fpsimd_cpu is visible to any 1200 * preemption/softirq that could race with set_tsk_thread_flag(), so 1201 * that TIF_FOREIGN_FPSTATE cannot be spuriously re-cleared. 1202 * 1203 * The final barrier ensures that TIF_FOREIGN_FPSTATE is seen set by any 1204 * subsequent code. 1205 */ 1206 void fpsimd_flush_task_state(struct task_struct *t) 1207 { 1208 t->thread.fpsimd_cpu = NR_CPUS; 1209 /* 1210 * If we don't support fpsimd, bail out after we have 1211 * reset the fpsimd_cpu for this task and clear the 1212 * FPSTATE. 1213 */ 1214 if (!system_supports_fpsimd()) 1215 return; 1216 barrier(); 1217 set_tsk_thread_flag(t, TIF_FOREIGN_FPSTATE); 1218 1219 barrier(); 1220 } 1221 1222 /* 1223 * Invalidate any task's FPSIMD state that is present on this cpu. 1224 * The FPSIMD context should be acquired with get_cpu_fpsimd_context() 1225 * before calling this function. 1226 */ 1227 static void fpsimd_flush_cpu_state(void) 1228 { 1229 WARN_ON(!system_supports_fpsimd()); 1230 __this_cpu_write(fpsimd_last_state.st, NULL); 1231 set_thread_flag(TIF_FOREIGN_FPSTATE); 1232 } 1233 1234 /* 1235 * Save the FPSIMD state to memory and invalidate cpu view. 1236 * This function must be called with preemption disabled. 1237 */ 1238 void fpsimd_save_and_flush_cpu_state(void) 1239 { 1240 if (!system_supports_fpsimd()) 1241 return; 1242 WARN_ON(preemptible()); 1243 __get_cpu_fpsimd_context(); 1244 fpsimd_save(); 1245 fpsimd_flush_cpu_state(); 1246 __put_cpu_fpsimd_context(); 1247 } 1248 1249 #ifdef CONFIG_KERNEL_MODE_NEON 1250 1251 /* 1252 * Kernel-side NEON support functions 1253 */ 1254 1255 /* 1256 * kernel_neon_begin(): obtain the CPU FPSIMD registers for use by the calling 1257 * context 1258 * 1259 * Must not be called unless may_use_simd() returns true. 1260 * Task context in the FPSIMD registers is saved back to memory as necessary. 1261 * 1262 * A matching call to kernel_neon_end() must be made before returning from the 1263 * calling context. 1264 * 1265 * The caller may freely use the FPSIMD registers until kernel_neon_end() is 1266 * called. 1267 */ 1268 void kernel_neon_begin(void) 1269 { 1270 if (WARN_ON(!system_supports_fpsimd())) 1271 return; 1272 1273 BUG_ON(!may_use_simd()); 1274 1275 get_cpu_fpsimd_context(); 1276 1277 /* Save unsaved fpsimd state, if any: */ 1278 fpsimd_save(); 1279 1280 /* Invalidate any task state remaining in the fpsimd regs: */ 1281 fpsimd_flush_cpu_state(); 1282 } 1283 EXPORT_SYMBOL(kernel_neon_begin); 1284 1285 /* 1286 * kernel_neon_end(): give the CPU FPSIMD registers back to the current task 1287 * 1288 * Must be called from a context in which kernel_neon_begin() was previously 1289 * called, with no call to kernel_neon_end() in the meantime. 1290 * 1291 * The caller must not use the FPSIMD registers after this function is called, 1292 * unless kernel_neon_begin() is called again in the meantime. 1293 */ 1294 void kernel_neon_end(void) 1295 { 1296 if (!system_supports_fpsimd()) 1297 return; 1298 1299 put_cpu_fpsimd_context(); 1300 } 1301 EXPORT_SYMBOL(kernel_neon_end); 1302 1303 #ifdef CONFIG_EFI 1304 1305 static DEFINE_PER_CPU(struct user_fpsimd_state, efi_fpsimd_state); 1306 static DEFINE_PER_CPU(bool, efi_fpsimd_state_used); 1307 static DEFINE_PER_CPU(bool, efi_sve_state_used); 1308 1309 /* 1310 * EFI runtime services support functions 1311 * 1312 * The ABI for EFI runtime services allows EFI to use FPSIMD during the call. 1313 * This means that for EFI (and only for EFI), we have to assume that FPSIMD 1314 * is always used rather than being an optional accelerator. 1315 * 1316 * These functions provide the necessary support for ensuring FPSIMD 1317 * save/restore in the contexts from which EFI is used. 1318 * 1319 * Do not use them for any other purpose -- if tempted to do so, you are 1320 * either doing something wrong or you need to propose some refactoring. 1321 */ 1322 1323 /* 1324 * __efi_fpsimd_begin(): prepare FPSIMD for making an EFI runtime services call 1325 */ 1326 void __efi_fpsimd_begin(void) 1327 { 1328 if (!system_supports_fpsimd()) 1329 return; 1330 1331 WARN_ON(preemptible()); 1332 1333 if (may_use_simd()) { 1334 kernel_neon_begin(); 1335 } else { 1336 /* 1337 * If !efi_sve_state, SVE can't be in use yet and doesn't need 1338 * preserving: 1339 */ 1340 if (system_supports_sve() && likely(efi_sve_state)) { 1341 char *sve_state = this_cpu_ptr(efi_sve_state); 1342 1343 __this_cpu_write(efi_sve_state_used, true); 1344 1345 sve_save_state(sve_state + sve_ffr_offset(sve_max_vl), 1346 &this_cpu_ptr(&efi_fpsimd_state)->fpsr); 1347 } else { 1348 fpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state)); 1349 } 1350 1351 __this_cpu_write(efi_fpsimd_state_used, true); 1352 } 1353 } 1354 1355 /* 1356 * __efi_fpsimd_end(): clean up FPSIMD after an EFI runtime services call 1357 */ 1358 void __efi_fpsimd_end(void) 1359 { 1360 if (!system_supports_fpsimd()) 1361 return; 1362 1363 if (!__this_cpu_xchg(efi_fpsimd_state_used, false)) { 1364 kernel_neon_end(); 1365 } else { 1366 if (system_supports_sve() && 1367 likely(__this_cpu_read(efi_sve_state_used))) { 1368 char const *sve_state = this_cpu_ptr(efi_sve_state); 1369 1370 sve_load_state(sve_state + sve_ffr_offset(sve_max_vl), 1371 &this_cpu_ptr(&efi_fpsimd_state)->fpsr, 1372 sve_vq_from_vl(sve_get_vl()) - 1); 1373 1374 __this_cpu_write(efi_sve_state_used, false); 1375 } else { 1376 fpsimd_load_state(this_cpu_ptr(&efi_fpsimd_state)); 1377 } 1378 } 1379 } 1380 1381 #endif /* CONFIG_EFI */ 1382 1383 #endif /* CONFIG_KERNEL_MODE_NEON */ 1384 1385 #ifdef CONFIG_CPU_PM 1386 static int fpsimd_cpu_pm_notifier(struct notifier_block *self, 1387 unsigned long cmd, void *v) 1388 { 1389 switch (cmd) { 1390 case CPU_PM_ENTER: 1391 fpsimd_save_and_flush_cpu_state(); 1392 break; 1393 case CPU_PM_EXIT: 1394 break; 1395 case CPU_PM_ENTER_FAILED: 1396 default: 1397 return NOTIFY_DONE; 1398 } 1399 return NOTIFY_OK; 1400 } 1401 1402 static struct notifier_block fpsimd_cpu_pm_notifier_block = { 1403 .notifier_call = fpsimd_cpu_pm_notifier, 1404 }; 1405 1406 static void __init fpsimd_pm_init(void) 1407 { 1408 cpu_pm_register_notifier(&fpsimd_cpu_pm_notifier_block); 1409 } 1410 1411 #else 1412 static inline void fpsimd_pm_init(void) { } 1413 #endif /* CONFIG_CPU_PM */ 1414 1415 #ifdef CONFIG_HOTPLUG_CPU 1416 static int fpsimd_cpu_dead(unsigned int cpu) 1417 { 1418 per_cpu(fpsimd_last_state.st, cpu) = NULL; 1419 return 0; 1420 } 1421 1422 static inline void fpsimd_hotplug_init(void) 1423 { 1424 cpuhp_setup_state_nocalls(CPUHP_ARM64_FPSIMD_DEAD, "arm64/fpsimd:dead", 1425 NULL, fpsimd_cpu_dead); 1426 } 1427 1428 #else 1429 static inline void fpsimd_hotplug_init(void) { } 1430 #endif 1431 1432 /* 1433 * FP/SIMD support code initialisation. 1434 */ 1435 static int __init fpsimd_init(void) 1436 { 1437 if (cpu_have_named_feature(FP)) { 1438 fpsimd_pm_init(); 1439 fpsimd_hotplug_init(); 1440 } else { 1441 pr_notice("Floating-point is not implemented\n"); 1442 } 1443 1444 if (!cpu_have_named_feature(ASIMD)) 1445 pr_notice("Advanced SIMD is not implemented\n"); 1446 1447 return sve_sysctl_init(); 1448 } 1449 core_initcall(fpsimd_init); 1450