1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * FP/SIMD context switching and fault handling 4 * 5 * Copyright (C) 2012 ARM Ltd. 6 * Author: Catalin Marinas <catalin.marinas@arm.com> 7 */ 8 9 #include <linux/bitmap.h> 10 #include <linux/bitops.h> 11 #include <linux/bottom_half.h> 12 #include <linux/bug.h> 13 #include <linux/cache.h> 14 #include <linux/compat.h> 15 #include <linux/compiler.h> 16 #include <linux/cpu.h> 17 #include <linux/cpu_pm.h> 18 #include <linux/ctype.h> 19 #include <linux/kernel.h> 20 #include <linux/linkage.h> 21 #include <linux/irqflags.h> 22 #include <linux/init.h> 23 #include <linux/percpu.h> 24 #include <linux/prctl.h> 25 #include <linux/preempt.h> 26 #include <linux/ptrace.h> 27 #include <linux/sched/signal.h> 28 #include <linux/sched/task_stack.h> 29 #include <linux/signal.h> 30 #include <linux/slab.h> 31 #include <linux/stddef.h> 32 #include <linux/sysctl.h> 33 #include <linux/swab.h> 34 35 #include <asm/esr.h> 36 #include <asm/exception.h> 37 #include <asm/fpsimd.h> 38 #include <asm/cpufeature.h> 39 #include <asm/cputype.h> 40 #include <asm/neon.h> 41 #include <asm/processor.h> 42 #include <asm/simd.h> 43 #include <asm/sigcontext.h> 44 #include <asm/sysreg.h> 45 #include <asm/traps.h> 46 #include <asm/virt.h> 47 48 #define FPEXC_IOF (1 << 0) 49 #define FPEXC_DZF (1 << 1) 50 #define FPEXC_OFF (1 << 2) 51 #define FPEXC_UFF (1 << 3) 52 #define FPEXC_IXF (1 << 4) 53 #define FPEXC_IDF (1 << 7) 54 55 /* 56 * (Note: in this discussion, statements about FPSIMD apply equally to SVE.) 57 * 58 * In order to reduce the number of times the FPSIMD state is needlessly saved 59 * and restored, we need to keep track of two things: 60 * (a) for each task, we need to remember which CPU was the last one to have 61 * the task's FPSIMD state loaded into its FPSIMD registers; 62 * (b) for each CPU, we need to remember which task's userland FPSIMD state has 63 * been loaded into its FPSIMD registers most recently, or whether it has 64 * been used to perform kernel mode NEON in the meantime. 65 * 66 * For (a), we add a fpsimd_cpu field to thread_struct, which gets updated to 67 * the id of the current CPU every time the state is loaded onto a CPU. For (b), 68 * we add the per-cpu variable 'fpsimd_last_state' (below), which contains the 69 * address of the userland FPSIMD state of the task that was loaded onto the CPU 70 * the most recently, or NULL if kernel mode NEON has been performed after that. 71 * 72 * With this in place, we no longer have to restore the next FPSIMD state right 73 * when switching between tasks. Instead, we can defer this check to userland 74 * resume, at which time we verify whether the CPU's fpsimd_last_state and the 75 * task's fpsimd_cpu are still mutually in sync. If this is the case, we 76 * can omit the FPSIMD restore. 77 * 78 * As an optimization, we use the thread_info flag TIF_FOREIGN_FPSTATE to 79 * indicate whether or not the userland FPSIMD state of the current task is 80 * present in the registers. The flag is set unless the FPSIMD registers of this 81 * CPU currently contain the most recent userland FPSIMD state of the current 82 * task. If the task is behaving as a VMM, then this is will be managed by 83 * KVM which will clear it to indicate that the vcpu FPSIMD state is currently 84 * loaded on the CPU, allowing the state to be saved if a FPSIMD-aware 85 * softirq kicks in. Upon vcpu_put(), KVM will save the vcpu FP state and 86 * flag the register state as invalid. 87 * 88 * In order to allow softirq handlers to use FPSIMD, kernel_neon_begin() may 89 * save the task's FPSIMD context back to task_struct from softirq context. 90 * To prevent this from racing with the manipulation of the task's FPSIMD state 91 * from task context and thereby corrupting the state, it is necessary to 92 * protect any manipulation of a task's fpsimd_state or TIF_FOREIGN_FPSTATE 93 * flag with {, __}get_cpu_fpsimd_context(). This will still allow softirqs to 94 * run but prevent them to use FPSIMD. 95 * 96 * For a certain task, the sequence may look something like this: 97 * - the task gets scheduled in; if both the task's fpsimd_cpu field 98 * contains the id of the current CPU, and the CPU's fpsimd_last_state per-cpu 99 * variable points to the task's fpsimd_state, the TIF_FOREIGN_FPSTATE flag is 100 * cleared, otherwise it is set; 101 * 102 * - the task returns to userland; if TIF_FOREIGN_FPSTATE is set, the task's 103 * userland FPSIMD state is copied from memory to the registers, the task's 104 * fpsimd_cpu field is set to the id of the current CPU, the current 105 * CPU's fpsimd_last_state pointer is set to this task's fpsimd_state and the 106 * TIF_FOREIGN_FPSTATE flag is cleared; 107 * 108 * - the task executes an ordinary syscall; upon return to userland, the 109 * TIF_FOREIGN_FPSTATE flag will still be cleared, so no FPSIMD state is 110 * restored; 111 * 112 * - the task executes a syscall which executes some NEON instructions; this is 113 * preceded by a call to kernel_neon_begin(), which copies the task's FPSIMD 114 * register contents to memory, clears the fpsimd_last_state per-cpu variable 115 * and sets the TIF_FOREIGN_FPSTATE flag; 116 * 117 * - the task gets preempted after kernel_neon_end() is called; as we have not 118 * returned from the 2nd syscall yet, TIF_FOREIGN_FPSTATE is still set so 119 * whatever is in the FPSIMD registers is not saved to memory, but discarded. 120 */ 121 struct fpsimd_last_state_struct { 122 struct user_fpsimd_state *st; 123 void *sve_state; 124 unsigned int sve_vl; 125 }; 126 127 static DEFINE_PER_CPU(struct fpsimd_last_state_struct, fpsimd_last_state); 128 129 __ro_after_init struct vl_info vl_info[ARM64_VEC_MAX] = { 130 #ifdef CONFIG_ARM64_SVE 131 [ARM64_VEC_SVE] = { 132 .type = ARM64_VEC_SVE, 133 .name = "SVE", 134 .min_vl = SVE_VL_MIN, 135 .max_vl = SVE_VL_MIN, 136 .max_virtualisable_vl = SVE_VL_MIN, 137 }, 138 #endif 139 }; 140 141 static unsigned int vec_vl_inherit_flag(enum vec_type type) 142 { 143 switch (type) { 144 case ARM64_VEC_SVE: 145 return TIF_SVE_VL_INHERIT; 146 default: 147 WARN_ON_ONCE(1); 148 return 0; 149 } 150 } 151 152 struct vl_config { 153 int __default_vl; /* Default VL for tasks */ 154 }; 155 156 static struct vl_config vl_config[ARM64_VEC_MAX]; 157 158 static inline int get_default_vl(enum vec_type type) 159 { 160 return READ_ONCE(vl_config[type].__default_vl); 161 } 162 163 #ifdef CONFIG_ARM64_SVE 164 165 static inline int get_sve_default_vl(void) 166 { 167 return get_default_vl(ARM64_VEC_SVE); 168 } 169 170 static inline void set_default_vl(enum vec_type type, int val) 171 { 172 WRITE_ONCE(vl_config[type].__default_vl, val); 173 } 174 175 static inline void set_sve_default_vl(int val) 176 { 177 set_default_vl(ARM64_VEC_SVE, val); 178 } 179 180 static void __percpu *efi_sve_state; 181 182 #else /* ! CONFIG_ARM64_SVE */ 183 184 /* Dummy declaration for code that will be optimised out: */ 185 extern void __percpu *efi_sve_state; 186 187 #endif /* ! CONFIG_ARM64_SVE */ 188 189 DEFINE_PER_CPU(bool, fpsimd_context_busy); 190 EXPORT_PER_CPU_SYMBOL(fpsimd_context_busy); 191 192 static void fpsimd_bind_task_to_cpu(void); 193 194 static void __get_cpu_fpsimd_context(void) 195 { 196 bool busy = __this_cpu_xchg(fpsimd_context_busy, true); 197 198 WARN_ON(busy); 199 } 200 201 /* 202 * Claim ownership of the CPU FPSIMD context for use by the calling context. 203 * 204 * The caller may freely manipulate the FPSIMD context metadata until 205 * put_cpu_fpsimd_context() is called. 206 * 207 * The double-underscore version must only be called if you know the task 208 * can't be preempted. 209 */ 210 static void get_cpu_fpsimd_context(void) 211 { 212 local_bh_disable(); 213 __get_cpu_fpsimd_context(); 214 } 215 216 static void __put_cpu_fpsimd_context(void) 217 { 218 bool busy = __this_cpu_xchg(fpsimd_context_busy, false); 219 220 WARN_ON(!busy); /* No matching get_cpu_fpsimd_context()? */ 221 } 222 223 /* 224 * Release the CPU FPSIMD context. 225 * 226 * Must be called from a context in which get_cpu_fpsimd_context() was 227 * previously called, with no call to put_cpu_fpsimd_context() in the 228 * meantime. 229 */ 230 static void put_cpu_fpsimd_context(void) 231 { 232 __put_cpu_fpsimd_context(); 233 local_bh_enable(); 234 } 235 236 static bool have_cpu_fpsimd_context(void) 237 { 238 return !preemptible() && __this_cpu_read(fpsimd_context_busy); 239 } 240 241 /* 242 * Call __sve_free() directly only if you know task can't be scheduled 243 * or preempted. 244 */ 245 static void __sve_free(struct task_struct *task) 246 { 247 kfree(task->thread.sve_state); 248 task->thread.sve_state = NULL; 249 } 250 251 static void sve_free(struct task_struct *task) 252 { 253 WARN_ON(test_tsk_thread_flag(task, TIF_SVE)); 254 255 __sve_free(task); 256 } 257 258 unsigned int task_get_vl(const struct task_struct *task, enum vec_type type) 259 { 260 return task->thread.vl[type]; 261 } 262 263 void task_set_vl(struct task_struct *task, enum vec_type type, 264 unsigned long vl) 265 { 266 task->thread.vl[type] = vl; 267 } 268 269 unsigned int task_get_vl_onexec(const struct task_struct *task, 270 enum vec_type type) 271 { 272 return task->thread.vl_onexec[type]; 273 } 274 275 void task_set_vl_onexec(struct task_struct *task, enum vec_type type, 276 unsigned long vl) 277 { 278 task->thread.vl_onexec[type] = vl; 279 } 280 281 /* 282 * TIF_SVE controls whether a task can use SVE without trapping while 283 * in userspace, and also the way a task's FPSIMD/SVE state is stored 284 * in thread_struct. 285 * 286 * The kernel uses this flag to track whether a user task is actively 287 * using SVE, and therefore whether full SVE register state needs to 288 * be tracked. If not, the cheaper FPSIMD context handling code can 289 * be used instead of the more costly SVE equivalents. 290 * 291 * * TIF_SVE set: 292 * 293 * The task can execute SVE instructions while in userspace without 294 * trapping to the kernel. 295 * 296 * When stored, Z0-Z31 (incorporating Vn in bits[127:0] or the 297 * corresponding Zn), P0-P15 and FFR are encoded in in 298 * task->thread.sve_state, formatted appropriately for vector 299 * length task->thread.sve_vl. 300 * 301 * task->thread.sve_state must point to a valid buffer at least 302 * sve_state_size(task) bytes in size. 303 * 304 * During any syscall, the kernel may optionally clear TIF_SVE and 305 * discard the vector state except for the FPSIMD subset. 306 * 307 * * TIF_SVE clear: 308 * 309 * An attempt by the user task to execute an SVE instruction causes 310 * do_sve_acc() to be called, which does some preparation and then 311 * sets TIF_SVE. 312 * 313 * When stored, FPSIMD registers V0-V31 are encoded in 314 * task->thread.uw.fpsimd_state; bits [max : 128] for each of Z0-Z31 are 315 * logically zero but not stored anywhere; P0-P15 and FFR are not 316 * stored and have unspecified values from userspace's point of 317 * view. For hygiene purposes, the kernel zeroes them on next use, 318 * but userspace is discouraged from relying on this. 319 * 320 * task->thread.sve_state does not need to be non-NULL, valid or any 321 * particular size: it must not be dereferenced. 322 * 323 * * FPSR and FPCR are always stored in task->thread.uw.fpsimd_state 324 * irrespective of whether TIF_SVE is clear or set, since these are 325 * not vector length dependent. 326 */ 327 328 /* 329 * Update current's FPSIMD/SVE registers from thread_struct. 330 * 331 * This function should be called only when the FPSIMD/SVE state in 332 * thread_struct is known to be up to date, when preparing to enter 333 * userspace. 334 */ 335 static void task_fpsimd_load(void) 336 { 337 WARN_ON(!system_supports_fpsimd()); 338 WARN_ON(!have_cpu_fpsimd_context()); 339 340 if (IS_ENABLED(CONFIG_ARM64_SVE) && test_thread_flag(TIF_SVE)) { 341 sve_set_vq(sve_vq_from_vl(task_get_sve_vl(current)) - 1); 342 sve_load_state(sve_pffr(¤t->thread), 343 ¤t->thread.uw.fpsimd_state.fpsr, true); 344 } else { 345 fpsimd_load_state(¤t->thread.uw.fpsimd_state); 346 } 347 } 348 349 /* 350 * Ensure FPSIMD/SVE storage in memory for the loaded context is up to 351 * date with respect to the CPU registers. 352 */ 353 static void fpsimd_save(void) 354 { 355 struct fpsimd_last_state_struct const *last = 356 this_cpu_ptr(&fpsimd_last_state); 357 /* set by fpsimd_bind_task_to_cpu() or fpsimd_bind_state_to_cpu() */ 358 359 WARN_ON(!system_supports_fpsimd()); 360 WARN_ON(!have_cpu_fpsimd_context()); 361 362 if (test_thread_flag(TIF_FOREIGN_FPSTATE)) 363 return; 364 365 if (IS_ENABLED(CONFIG_ARM64_SVE) && 366 test_thread_flag(TIF_SVE)) { 367 if (WARN_ON(sve_get_vl() != last->sve_vl)) { 368 /* 369 * Can't save the user regs, so current would 370 * re-enter user with corrupt state. 371 * There's no way to recover, so kill it: 372 */ 373 force_signal_inject(SIGKILL, SI_KERNEL, 0, 0); 374 return; 375 } 376 377 sve_save_state((char *)last->sve_state + 378 sve_ffr_offset(last->sve_vl), 379 &last->st->fpsr, true); 380 } else { 381 fpsimd_save_state(last->st); 382 } 383 } 384 385 /* 386 * All vector length selection from userspace comes through here. 387 * We're on a slow path, so some sanity-checks are included. 388 * If things go wrong there's a bug somewhere, but try to fall back to a 389 * safe choice. 390 */ 391 static unsigned int find_supported_vector_length(enum vec_type type, 392 unsigned int vl) 393 { 394 struct vl_info *info = &vl_info[type]; 395 int bit; 396 int max_vl = info->max_vl; 397 398 if (WARN_ON(!sve_vl_valid(vl))) 399 vl = info->min_vl; 400 401 if (WARN_ON(!sve_vl_valid(max_vl))) 402 max_vl = info->min_vl; 403 404 if (vl > max_vl) 405 vl = max_vl; 406 407 bit = find_next_bit(info->vq_map, SVE_VQ_MAX, 408 __vq_to_bit(sve_vq_from_vl(vl))); 409 return sve_vl_from_vq(__bit_to_vq(bit)); 410 } 411 412 #if defined(CONFIG_ARM64_SVE) && defined(CONFIG_SYSCTL) 413 414 static int vec_proc_do_default_vl(struct ctl_table *table, int write, 415 void *buffer, size_t *lenp, loff_t *ppos) 416 { 417 struct vl_info *info = table->extra1; 418 enum vec_type type = info->type; 419 int ret; 420 int vl = get_default_vl(type); 421 struct ctl_table tmp_table = { 422 .data = &vl, 423 .maxlen = sizeof(vl), 424 }; 425 426 ret = proc_dointvec(&tmp_table, write, buffer, lenp, ppos); 427 if (ret || !write) 428 return ret; 429 430 /* Writing -1 has the special meaning "set to max": */ 431 if (vl == -1) 432 vl = info->max_vl; 433 434 if (!sve_vl_valid(vl)) 435 return -EINVAL; 436 437 set_default_vl(type, find_supported_vector_length(type, vl)); 438 return 0; 439 } 440 441 static struct ctl_table sve_default_vl_table[] = { 442 { 443 .procname = "sve_default_vector_length", 444 .mode = 0644, 445 .proc_handler = vec_proc_do_default_vl, 446 .extra1 = &vl_info[ARM64_VEC_SVE], 447 }, 448 { } 449 }; 450 451 static int __init sve_sysctl_init(void) 452 { 453 if (system_supports_sve()) 454 if (!register_sysctl("abi", sve_default_vl_table)) 455 return -EINVAL; 456 457 return 0; 458 } 459 460 #else /* ! (CONFIG_ARM64_SVE && CONFIG_SYSCTL) */ 461 static int __init sve_sysctl_init(void) { return 0; } 462 #endif /* ! (CONFIG_ARM64_SVE && CONFIG_SYSCTL) */ 463 464 #define ZREG(sve_state, vq, n) ((char *)(sve_state) + \ 465 (SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET)) 466 467 #ifdef CONFIG_CPU_BIG_ENDIAN 468 static __uint128_t arm64_cpu_to_le128(__uint128_t x) 469 { 470 u64 a = swab64(x); 471 u64 b = swab64(x >> 64); 472 473 return ((__uint128_t)a << 64) | b; 474 } 475 #else 476 static __uint128_t arm64_cpu_to_le128(__uint128_t x) 477 { 478 return x; 479 } 480 #endif 481 482 #define arm64_le128_to_cpu(x) arm64_cpu_to_le128(x) 483 484 static void __fpsimd_to_sve(void *sst, struct user_fpsimd_state const *fst, 485 unsigned int vq) 486 { 487 unsigned int i; 488 __uint128_t *p; 489 490 for (i = 0; i < SVE_NUM_ZREGS; ++i) { 491 p = (__uint128_t *)ZREG(sst, vq, i); 492 *p = arm64_cpu_to_le128(fst->vregs[i]); 493 } 494 } 495 496 /* 497 * Transfer the FPSIMD state in task->thread.uw.fpsimd_state to 498 * task->thread.sve_state. 499 * 500 * Task can be a non-runnable task, or current. In the latter case, 501 * the caller must have ownership of the cpu FPSIMD context before calling 502 * this function. 503 * task->thread.sve_state must point to at least sve_state_size(task) 504 * bytes of allocated kernel memory. 505 * task->thread.uw.fpsimd_state must be up to date before calling this 506 * function. 507 */ 508 static void fpsimd_to_sve(struct task_struct *task) 509 { 510 unsigned int vq; 511 void *sst = task->thread.sve_state; 512 struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; 513 514 if (!system_supports_sve()) 515 return; 516 517 vq = sve_vq_from_vl(task_get_sve_vl(task)); 518 __fpsimd_to_sve(sst, fst, vq); 519 } 520 521 /* 522 * Transfer the SVE state in task->thread.sve_state to 523 * task->thread.uw.fpsimd_state. 524 * 525 * Task can be a non-runnable task, or current. In the latter case, 526 * the caller must have ownership of the cpu FPSIMD context before calling 527 * this function. 528 * task->thread.sve_state must point to at least sve_state_size(task) 529 * bytes of allocated kernel memory. 530 * task->thread.sve_state must be up to date before calling this function. 531 */ 532 static void sve_to_fpsimd(struct task_struct *task) 533 { 534 unsigned int vq; 535 void const *sst = task->thread.sve_state; 536 struct user_fpsimd_state *fst = &task->thread.uw.fpsimd_state; 537 unsigned int i; 538 __uint128_t const *p; 539 540 if (!system_supports_sve()) 541 return; 542 543 vq = sve_vq_from_vl(task_get_sve_vl(task)); 544 for (i = 0; i < SVE_NUM_ZREGS; ++i) { 545 p = (__uint128_t const *)ZREG(sst, vq, i); 546 fst->vregs[i] = arm64_le128_to_cpu(*p); 547 } 548 } 549 550 #ifdef CONFIG_ARM64_SVE 551 552 /* 553 * Return how many bytes of memory are required to store the full SVE 554 * state for task, given task's currently configured vector length. 555 */ 556 static size_t sve_state_size(struct task_struct const *task) 557 { 558 return SVE_SIG_REGS_SIZE(sve_vq_from_vl(task_get_sve_vl(task))); 559 } 560 561 /* 562 * Ensure that task->thread.sve_state is allocated and sufficiently large. 563 * 564 * This function should be used only in preparation for replacing 565 * task->thread.sve_state with new data. The memory is always zeroed 566 * here to prevent stale data from showing through: this is done in 567 * the interest of testability and predictability: except in the 568 * do_sve_acc() case, there is no ABI requirement to hide stale data 569 * written previously be task. 570 */ 571 void sve_alloc(struct task_struct *task) 572 { 573 if (task->thread.sve_state) { 574 memset(task->thread.sve_state, 0, sve_state_size(task)); 575 return; 576 } 577 578 /* This is a small allocation (maximum ~8KB) and Should Not Fail. */ 579 task->thread.sve_state = 580 kzalloc(sve_state_size(task), GFP_KERNEL); 581 } 582 583 584 /* 585 * Ensure that task->thread.sve_state is up to date with respect to 586 * the user task, irrespective of when SVE is in use or not. 587 * 588 * This should only be called by ptrace. task must be non-runnable. 589 * task->thread.sve_state must point to at least sve_state_size(task) 590 * bytes of allocated kernel memory. 591 */ 592 void fpsimd_sync_to_sve(struct task_struct *task) 593 { 594 if (!test_tsk_thread_flag(task, TIF_SVE)) 595 fpsimd_to_sve(task); 596 } 597 598 /* 599 * Ensure that task->thread.uw.fpsimd_state is up to date with respect to 600 * the user task, irrespective of whether SVE is in use or not. 601 * 602 * This should only be called by ptrace. task must be non-runnable. 603 * task->thread.sve_state must point to at least sve_state_size(task) 604 * bytes of allocated kernel memory. 605 */ 606 void sve_sync_to_fpsimd(struct task_struct *task) 607 { 608 if (test_tsk_thread_flag(task, TIF_SVE)) 609 sve_to_fpsimd(task); 610 } 611 612 /* 613 * Ensure that task->thread.sve_state is up to date with respect to 614 * the task->thread.uw.fpsimd_state. 615 * 616 * This should only be called by ptrace to merge new FPSIMD register 617 * values into a task for which SVE is currently active. 618 * task must be non-runnable. 619 * task->thread.sve_state must point to at least sve_state_size(task) 620 * bytes of allocated kernel memory. 621 * task->thread.uw.fpsimd_state must already have been initialised with 622 * the new FPSIMD register values to be merged in. 623 */ 624 void sve_sync_from_fpsimd_zeropad(struct task_struct *task) 625 { 626 unsigned int vq; 627 void *sst = task->thread.sve_state; 628 struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; 629 630 if (!test_tsk_thread_flag(task, TIF_SVE)) 631 return; 632 633 vq = sve_vq_from_vl(task_get_sve_vl(task)); 634 635 memset(sst, 0, SVE_SIG_REGS_SIZE(vq)); 636 __fpsimd_to_sve(sst, fst, vq); 637 } 638 639 int vec_set_vector_length(struct task_struct *task, enum vec_type type, 640 unsigned long vl, unsigned long flags) 641 { 642 if (flags & ~(unsigned long)(PR_SVE_VL_INHERIT | 643 PR_SVE_SET_VL_ONEXEC)) 644 return -EINVAL; 645 646 if (!sve_vl_valid(vl)) 647 return -EINVAL; 648 649 /* 650 * Clamp to the maximum vector length that VL-agnostic code 651 * can work with. A flag may be assigned in the future to 652 * allow setting of larger vector lengths without confusing 653 * older software. 654 */ 655 if (vl > VL_ARCH_MAX) 656 vl = VL_ARCH_MAX; 657 658 vl = find_supported_vector_length(type, vl); 659 660 if (flags & (PR_SVE_VL_INHERIT | 661 PR_SVE_SET_VL_ONEXEC)) 662 task_set_vl_onexec(task, type, vl); 663 else 664 /* Reset VL to system default on next exec: */ 665 task_set_vl_onexec(task, type, 0); 666 667 /* Only actually set the VL if not deferred: */ 668 if (flags & PR_SVE_SET_VL_ONEXEC) 669 goto out; 670 671 if (vl == task_get_vl(task, type)) 672 goto out; 673 674 /* 675 * To ensure the FPSIMD bits of the SVE vector registers are preserved, 676 * write any live register state back to task_struct, and convert to a 677 * regular FPSIMD thread. Since the vector length can only be changed 678 * with a syscall we can't be in streaming mode while reconfiguring. 679 */ 680 if (task == current) { 681 get_cpu_fpsimd_context(); 682 683 fpsimd_save(); 684 } 685 686 fpsimd_flush_task_state(task); 687 if (test_and_clear_tsk_thread_flag(task, TIF_SVE)) 688 sve_to_fpsimd(task); 689 690 if (task == current) 691 put_cpu_fpsimd_context(); 692 693 /* 694 * Force reallocation of task SVE state to the correct size 695 * on next use: 696 */ 697 sve_free(task); 698 699 task_set_vl(task, type, vl); 700 701 out: 702 update_tsk_thread_flag(task, vec_vl_inherit_flag(type), 703 flags & PR_SVE_VL_INHERIT); 704 705 return 0; 706 } 707 708 /* 709 * Encode the current vector length and flags for return. 710 * This is only required for prctl(): ptrace has separate fields. 711 * SVE and SME use the same bits for _ONEXEC and _INHERIT. 712 * 713 * flags are as for vec_set_vector_length(). 714 */ 715 static int vec_prctl_status(enum vec_type type, unsigned long flags) 716 { 717 int ret; 718 719 if (flags & PR_SVE_SET_VL_ONEXEC) 720 ret = task_get_vl_onexec(current, type); 721 else 722 ret = task_get_vl(current, type); 723 724 if (test_thread_flag(vec_vl_inherit_flag(type))) 725 ret |= PR_SVE_VL_INHERIT; 726 727 return ret; 728 } 729 730 /* PR_SVE_SET_VL */ 731 int sve_set_current_vl(unsigned long arg) 732 { 733 unsigned long vl, flags; 734 int ret; 735 736 vl = arg & PR_SVE_VL_LEN_MASK; 737 flags = arg & ~vl; 738 739 if (!system_supports_sve() || is_compat_task()) 740 return -EINVAL; 741 742 ret = vec_set_vector_length(current, ARM64_VEC_SVE, vl, flags); 743 if (ret) 744 return ret; 745 746 return vec_prctl_status(ARM64_VEC_SVE, flags); 747 } 748 749 /* PR_SVE_GET_VL */ 750 int sve_get_current_vl(void) 751 { 752 if (!system_supports_sve() || is_compat_task()) 753 return -EINVAL; 754 755 return vec_prctl_status(ARM64_VEC_SVE, 0); 756 } 757 758 static void vec_probe_vqs(struct vl_info *info, 759 DECLARE_BITMAP(map, SVE_VQ_MAX)) 760 { 761 unsigned int vq, vl; 762 763 bitmap_zero(map, SVE_VQ_MAX); 764 765 for (vq = SVE_VQ_MAX; vq >= SVE_VQ_MIN; --vq) { 766 write_vl(info->type, vq - 1); /* self-syncing */ 767 vl = sve_get_vl(); 768 vq = sve_vq_from_vl(vl); /* skip intervening lengths */ 769 set_bit(__vq_to_bit(vq), map); 770 } 771 } 772 773 /* 774 * Initialise the set of known supported VQs for the boot CPU. 775 * This is called during kernel boot, before secondary CPUs are brought up. 776 */ 777 void __init vec_init_vq_map(enum vec_type type) 778 { 779 struct vl_info *info = &vl_info[type]; 780 vec_probe_vqs(info, info->vq_map); 781 bitmap_copy(info->vq_partial_map, info->vq_map, SVE_VQ_MAX); 782 } 783 784 /* 785 * If we haven't committed to the set of supported VQs yet, filter out 786 * those not supported by the current CPU. 787 * This function is called during the bring-up of early secondary CPUs only. 788 */ 789 void vec_update_vq_map(enum vec_type type) 790 { 791 struct vl_info *info = &vl_info[type]; 792 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 793 794 vec_probe_vqs(info, tmp_map); 795 bitmap_and(info->vq_map, info->vq_map, tmp_map, SVE_VQ_MAX); 796 bitmap_or(info->vq_partial_map, info->vq_partial_map, tmp_map, 797 SVE_VQ_MAX); 798 } 799 800 /* 801 * Check whether the current CPU supports all VQs in the committed set. 802 * This function is called during the bring-up of late secondary CPUs only. 803 */ 804 int vec_verify_vq_map(enum vec_type type) 805 { 806 struct vl_info *info = &vl_info[type]; 807 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 808 unsigned long b; 809 810 vec_probe_vqs(info, tmp_map); 811 812 bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); 813 if (bitmap_intersects(tmp_map, info->vq_map, SVE_VQ_MAX)) { 814 pr_warn("%s: cpu%d: Required vector length(s) missing\n", 815 info->name, smp_processor_id()); 816 return -EINVAL; 817 } 818 819 if (!IS_ENABLED(CONFIG_KVM) || !is_hyp_mode_available()) 820 return 0; 821 822 /* 823 * For KVM, it is necessary to ensure that this CPU doesn't 824 * support any vector length that guests may have probed as 825 * unsupported. 826 */ 827 828 /* Recover the set of supported VQs: */ 829 bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); 830 /* Find VQs supported that are not globally supported: */ 831 bitmap_andnot(tmp_map, tmp_map, info->vq_map, SVE_VQ_MAX); 832 833 /* Find the lowest such VQ, if any: */ 834 b = find_last_bit(tmp_map, SVE_VQ_MAX); 835 if (b >= SVE_VQ_MAX) 836 return 0; /* no mismatches */ 837 838 /* 839 * Mismatches above sve_max_virtualisable_vl are fine, since 840 * no guest is allowed to configure ZCR_EL2.LEN to exceed this: 841 */ 842 if (sve_vl_from_vq(__bit_to_vq(b)) <= info->max_virtualisable_vl) { 843 pr_warn("%s: cpu%d: Unsupported vector length(s) present\n", 844 info->name, smp_processor_id()); 845 return -EINVAL; 846 } 847 848 return 0; 849 } 850 851 static void __init sve_efi_setup(void) 852 { 853 struct vl_info *info = &vl_info[ARM64_VEC_SVE]; 854 855 if (!IS_ENABLED(CONFIG_EFI)) 856 return; 857 858 /* 859 * alloc_percpu() warns and prints a backtrace if this goes wrong. 860 * This is evidence of a crippled system and we are returning void, 861 * so no attempt is made to handle this situation here. 862 */ 863 if (!sve_vl_valid(info->max_vl)) 864 goto fail; 865 866 efi_sve_state = __alloc_percpu( 867 SVE_SIG_REGS_SIZE(sve_vq_from_vl(info->max_vl)), SVE_VQ_BYTES); 868 if (!efi_sve_state) 869 goto fail; 870 871 return; 872 873 fail: 874 panic("Cannot allocate percpu memory for EFI SVE save/restore"); 875 } 876 877 /* 878 * Enable SVE for EL1. 879 * Intended for use by the cpufeatures code during CPU boot. 880 */ 881 void sve_kernel_enable(const struct arm64_cpu_capabilities *__always_unused p) 882 { 883 write_sysreg(read_sysreg(CPACR_EL1) | CPACR_EL1_ZEN_EL1EN, CPACR_EL1); 884 isb(); 885 } 886 887 /* 888 * Read the pseudo-ZCR used by cpufeatures to identify the supported SVE 889 * vector length. 890 * 891 * Use only if SVE is present. 892 * This function clobbers the SVE vector length. 893 */ 894 u64 read_zcr_features(void) 895 { 896 u64 zcr; 897 unsigned int vq_max; 898 899 /* 900 * Set the maximum possible VL, and write zeroes to all other 901 * bits to see if they stick. 902 */ 903 sve_kernel_enable(NULL); 904 write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL1); 905 906 zcr = read_sysreg_s(SYS_ZCR_EL1); 907 zcr &= ~(u64)ZCR_ELx_LEN_MASK; /* find sticky 1s outside LEN field */ 908 vq_max = sve_vq_from_vl(sve_get_vl()); 909 zcr |= vq_max - 1; /* set LEN field to maximum effective value */ 910 911 return zcr; 912 } 913 914 void __init sve_setup(void) 915 { 916 struct vl_info *info = &vl_info[ARM64_VEC_SVE]; 917 u64 zcr; 918 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 919 unsigned long b; 920 921 if (!system_supports_sve()) 922 return; 923 924 /* 925 * The SVE architecture mandates support for 128-bit vectors, 926 * so sve_vq_map must have at least SVE_VQ_MIN set. 927 * If something went wrong, at least try to patch it up: 928 */ 929 if (WARN_ON(!test_bit(__vq_to_bit(SVE_VQ_MIN), info->vq_map))) 930 set_bit(__vq_to_bit(SVE_VQ_MIN), info->vq_map); 931 932 zcr = read_sanitised_ftr_reg(SYS_ZCR_EL1); 933 info->max_vl = sve_vl_from_vq((zcr & ZCR_ELx_LEN_MASK) + 1); 934 935 /* 936 * Sanity-check that the max VL we determined through CPU features 937 * corresponds properly to sve_vq_map. If not, do our best: 938 */ 939 if (WARN_ON(info->max_vl != find_supported_vector_length(ARM64_VEC_SVE, 940 info->max_vl))) 941 info->max_vl = find_supported_vector_length(ARM64_VEC_SVE, 942 info->max_vl); 943 944 /* 945 * For the default VL, pick the maximum supported value <= 64. 946 * VL == 64 is guaranteed not to grow the signal frame. 947 */ 948 set_sve_default_vl(find_supported_vector_length(ARM64_VEC_SVE, 64)); 949 950 bitmap_andnot(tmp_map, info->vq_partial_map, info->vq_map, 951 SVE_VQ_MAX); 952 953 b = find_last_bit(tmp_map, SVE_VQ_MAX); 954 if (b >= SVE_VQ_MAX) 955 /* No non-virtualisable VLs found */ 956 info->max_virtualisable_vl = SVE_VQ_MAX; 957 else if (WARN_ON(b == SVE_VQ_MAX - 1)) 958 /* No virtualisable VLs? This is architecturally forbidden. */ 959 info->max_virtualisable_vl = SVE_VQ_MIN; 960 else /* b + 1 < SVE_VQ_MAX */ 961 info->max_virtualisable_vl = sve_vl_from_vq(__bit_to_vq(b + 1)); 962 963 if (info->max_virtualisable_vl > info->max_vl) 964 info->max_virtualisable_vl = info->max_vl; 965 966 pr_info("%s: maximum available vector length %u bytes per vector\n", 967 info->name, info->max_vl); 968 pr_info("%s: default vector length %u bytes per vector\n", 969 info->name, get_sve_default_vl()); 970 971 /* KVM decides whether to support mismatched systems. Just warn here: */ 972 if (sve_max_virtualisable_vl() < sve_max_vl()) 973 pr_warn("%s: unvirtualisable vector lengths present\n", 974 info->name); 975 976 sve_efi_setup(); 977 } 978 979 /* 980 * Called from the put_task_struct() path, which cannot get here 981 * unless dead_task is really dead and not schedulable. 982 */ 983 void fpsimd_release_task(struct task_struct *dead_task) 984 { 985 __sve_free(dead_task); 986 } 987 988 #endif /* CONFIG_ARM64_SVE */ 989 990 /* 991 * Trapped SVE access 992 * 993 * Storage is allocated for the full SVE state, the current FPSIMD 994 * register contents are migrated across, and the access trap is 995 * disabled. 996 * 997 * TIF_SVE should be clear on entry: otherwise, fpsimd_restore_current_state() 998 * would have disabled the SVE access trap for userspace during 999 * ret_to_user, making an SVE access trap impossible in that case. 1000 */ 1001 void do_sve_acc(unsigned int esr, struct pt_regs *regs) 1002 { 1003 /* Even if we chose not to use SVE, the hardware could still trap: */ 1004 if (unlikely(!system_supports_sve()) || WARN_ON(is_compat_task())) { 1005 force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0); 1006 return; 1007 } 1008 1009 sve_alloc(current); 1010 if (!current->thread.sve_state) { 1011 force_sig(SIGKILL); 1012 return; 1013 } 1014 1015 get_cpu_fpsimd_context(); 1016 1017 if (test_and_set_thread_flag(TIF_SVE)) 1018 WARN_ON(1); /* SVE access shouldn't have trapped */ 1019 1020 /* 1021 * Convert the FPSIMD state to SVE, zeroing all the state that 1022 * is not shared with FPSIMD. If (as is likely) the current 1023 * state is live in the registers then do this there and 1024 * update our metadata for the current task including 1025 * disabling the trap, otherwise update our in-memory copy. 1026 */ 1027 if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) { 1028 unsigned long vq_minus_one = 1029 sve_vq_from_vl(task_get_sve_vl(current)) - 1; 1030 sve_set_vq(vq_minus_one); 1031 sve_flush_live(true, vq_minus_one); 1032 fpsimd_bind_task_to_cpu(); 1033 } else { 1034 fpsimd_to_sve(current); 1035 } 1036 1037 put_cpu_fpsimd_context(); 1038 } 1039 1040 /* 1041 * Trapped FP/ASIMD access. 1042 */ 1043 void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs) 1044 { 1045 /* TODO: implement lazy context saving/restoring */ 1046 WARN_ON(1); 1047 } 1048 1049 /* 1050 * Raise a SIGFPE for the current process. 1051 */ 1052 void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs) 1053 { 1054 unsigned int si_code = FPE_FLTUNK; 1055 1056 if (esr & ESR_ELx_FP_EXC_TFV) { 1057 if (esr & FPEXC_IOF) 1058 si_code = FPE_FLTINV; 1059 else if (esr & FPEXC_DZF) 1060 si_code = FPE_FLTDIV; 1061 else if (esr & FPEXC_OFF) 1062 si_code = FPE_FLTOVF; 1063 else if (esr & FPEXC_UFF) 1064 si_code = FPE_FLTUND; 1065 else if (esr & FPEXC_IXF) 1066 si_code = FPE_FLTRES; 1067 } 1068 1069 send_sig_fault(SIGFPE, si_code, 1070 (void __user *)instruction_pointer(regs), 1071 current); 1072 } 1073 1074 void fpsimd_thread_switch(struct task_struct *next) 1075 { 1076 bool wrong_task, wrong_cpu; 1077 1078 if (!system_supports_fpsimd()) 1079 return; 1080 1081 __get_cpu_fpsimd_context(); 1082 1083 /* Save unsaved fpsimd state, if any: */ 1084 fpsimd_save(); 1085 1086 /* 1087 * Fix up TIF_FOREIGN_FPSTATE to correctly describe next's 1088 * state. For kernel threads, FPSIMD registers are never loaded 1089 * and wrong_task and wrong_cpu will always be true. 1090 */ 1091 wrong_task = __this_cpu_read(fpsimd_last_state.st) != 1092 &next->thread.uw.fpsimd_state; 1093 wrong_cpu = next->thread.fpsimd_cpu != smp_processor_id(); 1094 1095 update_tsk_thread_flag(next, TIF_FOREIGN_FPSTATE, 1096 wrong_task || wrong_cpu); 1097 1098 __put_cpu_fpsimd_context(); 1099 } 1100 1101 static void fpsimd_flush_thread_vl(enum vec_type type) 1102 { 1103 int vl, supported_vl; 1104 1105 /* 1106 * Reset the task vector length as required. This is where we 1107 * ensure that all user tasks have a valid vector length 1108 * configured: no kernel task can become a user task without 1109 * an exec and hence a call to this function. By the time the 1110 * first call to this function is made, all early hardware 1111 * probing is complete, so __sve_default_vl should be valid. 1112 * If a bug causes this to go wrong, we make some noise and 1113 * try to fudge thread.sve_vl to a safe value here. 1114 */ 1115 vl = task_get_vl_onexec(current, type); 1116 if (!vl) 1117 vl = get_default_vl(type); 1118 1119 if (WARN_ON(!sve_vl_valid(vl))) 1120 vl = vl_info[type].min_vl; 1121 1122 supported_vl = find_supported_vector_length(type, vl); 1123 if (WARN_ON(supported_vl != vl)) 1124 vl = supported_vl; 1125 1126 task_set_vl(current, type, vl); 1127 1128 /* 1129 * If the task is not set to inherit, ensure that the vector 1130 * length will be reset by a subsequent exec: 1131 */ 1132 if (!test_thread_flag(vec_vl_inherit_flag(type))) 1133 task_set_vl_onexec(current, type, 0); 1134 } 1135 1136 void fpsimd_flush_thread(void) 1137 { 1138 if (!system_supports_fpsimd()) 1139 return; 1140 1141 get_cpu_fpsimd_context(); 1142 1143 fpsimd_flush_task_state(current); 1144 memset(¤t->thread.uw.fpsimd_state, 0, 1145 sizeof(current->thread.uw.fpsimd_state)); 1146 1147 if (system_supports_sve()) { 1148 clear_thread_flag(TIF_SVE); 1149 sve_free(current); 1150 fpsimd_flush_thread_vl(ARM64_VEC_SVE); 1151 } 1152 1153 put_cpu_fpsimd_context(); 1154 } 1155 1156 /* 1157 * Save the userland FPSIMD state of 'current' to memory, but only if the state 1158 * currently held in the registers does in fact belong to 'current' 1159 */ 1160 void fpsimd_preserve_current_state(void) 1161 { 1162 if (!system_supports_fpsimd()) 1163 return; 1164 1165 get_cpu_fpsimd_context(); 1166 fpsimd_save(); 1167 put_cpu_fpsimd_context(); 1168 } 1169 1170 /* 1171 * Like fpsimd_preserve_current_state(), but ensure that 1172 * current->thread.uw.fpsimd_state is updated so that it can be copied to 1173 * the signal frame. 1174 */ 1175 void fpsimd_signal_preserve_current_state(void) 1176 { 1177 fpsimd_preserve_current_state(); 1178 if (test_thread_flag(TIF_SVE)) 1179 sve_to_fpsimd(current); 1180 } 1181 1182 /* 1183 * Associate current's FPSIMD context with this cpu 1184 * The caller must have ownership of the cpu FPSIMD context before calling 1185 * this function. 1186 */ 1187 static void fpsimd_bind_task_to_cpu(void) 1188 { 1189 struct fpsimd_last_state_struct *last = 1190 this_cpu_ptr(&fpsimd_last_state); 1191 1192 WARN_ON(!system_supports_fpsimd()); 1193 last->st = ¤t->thread.uw.fpsimd_state; 1194 last->sve_state = current->thread.sve_state; 1195 last->sve_vl = task_get_sve_vl(current); 1196 current->thread.fpsimd_cpu = smp_processor_id(); 1197 1198 if (system_supports_sve()) { 1199 /* Toggle SVE trapping for userspace if needed */ 1200 if (test_thread_flag(TIF_SVE)) 1201 sve_user_enable(); 1202 else 1203 sve_user_disable(); 1204 1205 /* Serialised by exception return to user */ 1206 } 1207 } 1208 1209 void fpsimd_bind_state_to_cpu(struct user_fpsimd_state *st, void *sve_state, 1210 unsigned int sve_vl) 1211 { 1212 struct fpsimd_last_state_struct *last = 1213 this_cpu_ptr(&fpsimd_last_state); 1214 1215 WARN_ON(!system_supports_fpsimd()); 1216 WARN_ON(!in_softirq() && !irqs_disabled()); 1217 1218 last->st = st; 1219 last->sve_state = sve_state; 1220 last->sve_vl = sve_vl; 1221 } 1222 1223 /* 1224 * Load the userland FPSIMD state of 'current' from memory, but only if the 1225 * FPSIMD state already held in the registers is /not/ the most recent FPSIMD 1226 * state of 'current'. This is called when we are preparing to return to 1227 * userspace to ensure that userspace sees a good register state. 1228 */ 1229 void fpsimd_restore_current_state(void) 1230 { 1231 /* 1232 * For the tasks that were created before we detected the absence of 1233 * FP/SIMD, the TIF_FOREIGN_FPSTATE could be set via fpsimd_thread_switch(), 1234 * e.g, init. This could be then inherited by the children processes. 1235 * If we later detect that the system doesn't support FP/SIMD, 1236 * we must clear the flag for all the tasks to indicate that the 1237 * FPSTATE is clean (as we can't have one) to avoid looping for ever in 1238 * do_notify_resume(). 1239 */ 1240 if (!system_supports_fpsimd()) { 1241 clear_thread_flag(TIF_FOREIGN_FPSTATE); 1242 return; 1243 } 1244 1245 get_cpu_fpsimd_context(); 1246 1247 if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) { 1248 task_fpsimd_load(); 1249 fpsimd_bind_task_to_cpu(); 1250 } 1251 1252 put_cpu_fpsimd_context(); 1253 } 1254 1255 /* 1256 * Load an updated userland FPSIMD state for 'current' from memory and set the 1257 * flag that indicates that the FPSIMD register contents are the most recent 1258 * FPSIMD state of 'current'. This is used by the signal code to restore the 1259 * register state when returning from a signal handler in FPSIMD only cases, 1260 * any SVE context will be discarded. 1261 */ 1262 void fpsimd_update_current_state(struct user_fpsimd_state const *state) 1263 { 1264 if (WARN_ON(!system_supports_fpsimd())) 1265 return; 1266 1267 get_cpu_fpsimd_context(); 1268 1269 current->thread.uw.fpsimd_state = *state; 1270 if (test_thread_flag(TIF_SVE)) 1271 fpsimd_to_sve(current); 1272 1273 task_fpsimd_load(); 1274 fpsimd_bind_task_to_cpu(); 1275 1276 clear_thread_flag(TIF_FOREIGN_FPSTATE); 1277 1278 put_cpu_fpsimd_context(); 1279 } 1280 1281 /* 1282 * Invalidate live CPU copies of task t's FPSIMD state 1283 * 1284 * This function may be called with preemption enabled. The barrier() 1285 * ensures that the assignment to fpsimd_cpu is visible to any 1286 * preemption/softirq that could race with set_tsk_thread_flag(), so 1287 * that TIF_FOREIGN_FPSTATE cannot be spuriously re-cleared. 1288 * 1289 * The final barrier ensures that TIF_FOREIGN_FPSTATE is seen set by any 1290 * subsequent code. 1291 */ 1292 void fpsimd_flush_task_state(struct task_struct *t) 1293 { 1294 t->thread.fpsimd_cpu = NR_CPUS; 1295 /* 1296 * If we don't support fpsimd, bail out after we have 1297 * reset the fpsimd_cpu for this task and clear the 1298 * FPSTATE. 1299 */ 1300 if (!system_supports_fpsimd()) 1301 return; 1302 barrier(); 1303 set_tsk_thread_flag(t, TIF_FOREIGN_FPSTATE); 1304 1305 barrier(); 1306 } 1307 1308 /* 1309 * Invalidate any task's FPSIMD state that is present on this cpu. 1310 * The FPSIMD context should be acquired with get_cpu_fpsimd_context() 1311 * before calling this function. 1312 */ 1313 static void fpsimd_flush_cpu_state(void) 1314 { 1315 WARN_ON(!system_supports_fpsimd()); 1316 __this_cpu_write(fpsimd_last_state.st, NULL); 1317 set_thread_flag(TIF_FOREIGN_FPSTATE); 1318 } 1319 1320 /* 1321 * Save the FPSIMD state to memory and invalidate cpu view. 1322 * This function must be called with preemption disabled. 1323 */ 1324 void fpsimd_save_and_flush_cpu_state(void) 1325 { 1326 if (!system_supports_fpsimd()) 1327 return; 1328 WARN_ON(preemptible()); 1329 __get_cpu_fpsimd_context(); 1330 fpsimd_save(); 1331 fpsimd_flush_cpu_state(); 1332 __put_cpu_fpsimd_context(); 1333 } 1334 1335 #ifdef CONFIG_KERNEL_MODE_NEON 1336 1337 /* 1338 * Kernel-side NEON support functions 1339 */ 1340 1341 /* 1342 * kernel_neon_begin(): obtain the CPU FPSIMD registers for use by the calling 1343 * context 1344 * 1345 * Must not be called unless may_use_simd() returns true. 1346 * Task context in the FPSIMD registers is saved back to memory as necessary. 1347 * 1348 * A matching call to kernel_neon_end() must be made before returning from the 1349 * calling context. 1350 * 1351 * The caller may freely use the FPSIMD registers until kernel_neon_end() is 1352 * called. 1353 */ 1354 void kernel_neon_begin(void) 1355 { 1356 if (WARN_ON(!system_supports_fpsimd())) 1357 return; 1358 1359 BUG_ON(!may_use_simd()); 1360 1361 get_cpu_fpsimd_context(); 1362 1363 /* Save unsaved fpsimd state, if any: */ 1364 fpsimd_save(); 1365 1366 /* Invalidate any task state remaining in the fpsimd regs: */ 1367 fpsimd_flush_cpu_state(); 1368 } 1369 EXPORT_SYMBOL(kernel_neon_begin); 1370 1371 /* 1372 * kernel_neon_end(): give the CPU FPSIMD registers back to the current task 1373 * 1374 * Must be called from a context in which kernel_neon_begin() was previously 1375 * called, with no call to kernel_neon_end() in the meantime. 1376 * 1377 * The caller must not use the FPSIMD registers after this function is called, 1378 * unless kernel_neon_begin() is called again in the meantime. 1379 */ 1380 void kernel_neon_end(void) 1381 { 1382 if (!system_supports_fpsimd()) 1383 return; 1384 1385 put_cpu_fpsimd_context(); 1386 } 1387 EXPORT_SYMBOL(kernel_neon_end); 1388 1389 #ifdef CONFIG_EFI 1390 1391 static DEFINE_PER_CPU(struct user_fpsimd_state, efi_fpsimd_state); 1392 static DEFINE_PER_CPU(bool, efi_fpsimd_state_used); 1393 static DEFINE_PER_CPU(bool, efi_sve_state_used); 1394 1395 /* 1396 * EFI runtime services support functions 1397 * 1398 * The ABI for EFI runtime services allows EFI to use FPSIMD during the call. 1399 * This means that for EFI (and only for EFI), we have to assume that FPSIMD 1400 * is always used rather than being an optional accelerator. 1401 * 1402 * These functions provide the necessary support for ensuring FPSIMD 1403 * save/restore in the contexts from which EFI is used. 1404 * 1405 * Do not use them for any other purpose -- if tempted to do so, you are 1406 * either doing something wrong or you need to propose some refactoring. 1407 */ 1408 1409 /* 1410 * __efi_fpsimd_begin(): prepare FPSIMD for making an EFI runtime services call 1411 */ 1412 void __efi_fpsimd_begin(void) 1413 { 1414 if (!system_supports_fpsimd()) 1415 return; 1416 1417 WARN_ON(preemptible()); 1418 1419 if (may_use_simd()) { 1420 kernel_neon_begin(); 1421 } else { 1422 /* 1423 * If !efi_sve_state, SVE can't be in use yet and doesn't need 1424 * preserving: 1425 */ 1426 if (system_supports_sve() && likely(efi_sve_state)) { 1427 char *sve_state = this_cpu_ptr(efi_sve_state); 1428 1429 __this_cpu_write(efi_sve_state_used, true); 1430 1431 sve_save_state(sve_state + sve_ffr_offset(sve_max_vl()), 1432 &this_cpu_ptr(&efi_fpsimd_state)->fpsr, 1433 true); 1434 } else { 1435 fpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state)); 1436 } 1437 1438 __this_cpu_write(efi_fpsimd_state_used, true); 1439 } 1440 } 1441 1442 /* 1443 * __efi_fpsimd_end(): clean up FPSIMD after an EFI runtime services call 1444 */ 1445 void __efi_fpsimd_end(void) 1446 { 1447 if (!system_supports_fpsimd()) 1448 return; 1449 1450 if (!__this_cpu_xchg(efi_fpsimd_state_used, false)) { 1451 kernel_neon_end(); 1452 } else { 1453 if (system_supports_sve() && 1454 likely(__this_cpu_read(efi_sve_state_used))) { 1455 char const *sve_state = this_cpu_ptr(efi_sve_state); 1456 1457 sve_set_vq(sve_vq_from_vl(sve_get_vl()) - 1); 1458 sve_load_state(sve_state + sve_ffr_offset(sve_max_vl()), 1459 &this_cpu_ptr(&efi_fpsimd_state)->fpsr, 1460 true); 1461 1462 __this_cpu_write(efi_sve_state_used, false); 1463 } else { 1464 fpsimd_load_state(this_cpu_ptr(&efi_fpsimd_state)); 1465 } 1466 } 1467 } 1468 1469 #endif /* CONFIG_EFI */ 1470 1471 #endif /* CONFIG_KERNEL_MODE_NEON */ 1472 1473 #ifdef CONFIG_CPU_PM 1474 static int fpsimd_cpu_pm_notifier(struct notifier_block *self, 1475 unsigned long cmd, void *v) 1476 { 1477 switch (cmd) { 1478 case CPU_PM_ENTER: 1479 fpsimd_save_and_flush_cpu_state(); 1480 break; 1481 case CPU_PM_EXIT: 1482 break; 1483 case CPU_PM_ENTER_FAILED: 1484 default: 1485 return NOTIFY_DONE; 1486 } 1487 return NOTIFY_OK; 1488 } 1489 1490 static struct notifier_block fpsimd_cpu_pm_notifier_block = { 1491 .notifier_call = fpsimd_cpu_pm_notifier, 1492 }; 1493 1494 static void __init fpsimd_pm_init(void) 1495 { 1496 cpu_pm_register_notifier(&fpsimd_cpu_pm_notifier_block); 1497 } 1498 1499 #else 1500 static inline void fpsimd_pm_init(void) { } 1501 #endif /* CONFIG_CPU_PM */ 1502 1503 #ifdef CONFIG_HOTPLUG_CPU 1504 static int fpsimd_cpu_dead(unsigned int cpu) 1505 { 1506 per_cpu(fpsimd_last_state.st, cpu) = NULL; 1507 return 0; 1508 } 1509 1510 static inline void fpsimd_hotplug_init(void) 1511 { 1512 cpuhp_setup_state_nocalls(CPUHP_ARM64_FPSIMD_DEAD, "arm64/fpsimd:dead", 1513 NULL, fpsimd_cpu_dead); 1514 } 1515 1516 #else 1517 static inline void fpsimd_hotplug_init(void) { } 1518 #endif 1519 1520 /* 1521 * FP/SIMD support code initialisation. 1522 */ 1523 static int __init fpsimd_init(void) 1524 { 1525 if (cpu_have_named_feature(FP)) { 1526 fpsimd_pm_init(); 1527 fpsimd_hotplug_init(); 1528 } else { 1529 pr_notice("Floating-point is not implemented\n"); 1530 } 1531 1532 if (!cpu_have_named_feature(ASIMD)) 1533 pr_notice("Advanced SIMD is not implemented\n"); 1534 1535 return sve_sysctl_init(); 1536 } 1537 core_initcall(fpsimd_init); 1538