1 /* 2 * FP/SIMD context switching and fault handling 3 * 4 * Copyright (C) 2012 ARM Ltd. 5 * Author: Catalin Marinas <catalin.marinas@arm.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include <linux/bitmap.h> 21 #include <linux/bitops.h> 22 #include <linux/bottom_half.h> 23 #include <linux/bug.h> 24 #include <linux/cache.h> 25 #include <linux/compat.h> 26 #include <linux/cpu.h> 27 #include <linux/cpu_pm.h> 28 #include <linux/kernel.h> 29 #include <linux/linkage.h> 30 #include <linux/irqflags.h> 31 #include <linux/init.h> 32 #include <linux/percpu.h> 33 #include <linux/prctl.h> 34 #include <linux/preempt.h> 35 #include <linux/ptrace.h> 36 #include <linux/sched/signal.h> 37 #include <linux/sched/task_stack.h> 38 #include <linux/signal.h> 39 #include <linux/slab.h> 40 #include <linux/stddef.h> 41 #include <linux/sysctl.h> 42 43 #include <asm/esr.h> 44 #include <asm/fpsimd.h> 45 #include <asm/cpufeature.h> 46 #include <asm/cputype.h> 47 #include <asm/processor.h> 48 #include <asm/simd.h> 49 #include <asm/sigcontext.h> 50 #include <asm/sysreg.h> 51 #include <asm/traps.h> 52 #include <asm/virt.h> 53 54 #define FPEXC_IOF (1 << 0) 55 #define FPEXC_DZF (1 << 1) 56 #define FPEXC_OFF (1 << 2) 57 #define FPEXC_UFF (1 << 3) 58 #define FPEXC_IXF (1 << 4) 59 #define FPEXC_IDF (1 << 7) 60 61 /* 62 * (Note: in this discussion, statements about FPSIMD apply equally to SVE.) 63 * 64 * In order to reduce the number of times the FPSIMD state is needlessly saved 65 * and restored, we need to keep track of two things: 66 * (a) for each task, we need to remember which CPU was the last one to have 67 * the task's FPSIMD state loaded into its FPSIMD registers; 68 * (b) for each CPU, we need to remember which task's userland FPSIMD state has 69 * been loaded into its FPSIMD registers most recently, or whether it has 70 * been used to perform kernel mode NEON in the meantime. 71 * 72 * For (a), we add a fpsimd_cpu field to thread_struct, which gets updated to 73 * the id of the current CPU every time the state is loaded onto a CPU. For (b), 74 * we add the per-cpu variable 'fpsimd_last_state' (below), which contains the 75 * address of the userland FPSIMD state of the task that was loaded onto the CPU 76 * the most recently, or NULL if kernel mode NEON has been performed after that. 77 * 78 * With this in place, we no longer have to restore the next FPSIMD state right 79 * when switching between tasks. Instead, we can defer this check to userland 80 * resume, at which time we verify whether the CPU's fpsimd_last_state and the 81 * task's fpsimd_cpu are still mutually in sync. If this is the case, we 82 * can omit the FPSIMD restore. 83 * 84 * As an optimization, we use the thread_info flag TIF_FOREIGN_FPSTATE to 85 * indicate whether or not the userland FPSIMD state of the current task is 86 * present in the registers. The flag is set unless the FPSIMD registers of this 87 * CPU currently contain the most recent userland FPSIMD state of the current 88 * task. 89 * 90 * In order to allow softirq handlers to use FPSIMD, kernel_neon_begin() may 91 * save the task's FPSIMD context back to task_struct from softirq context. 92 * To prevent this from racing with the manipulation of the task's FPSIMD state 93 * from task context and thereby corrupting the state, it is necessary to 94 * protect any manipulation of a task's fpsimd_state or TIF_FOREIGN_FPSTATE 95 * flag with local_bh_disable() unless softirqs are already masked. 96 * 97 * For a certain task, the sequence may look something like this: 98 * - the task gets scheduled in; if both the task's fpsimd_cpu field 99 * contains the id of the current CPU, and the CPU's fpsimd_last_state per-cpu 100 * variable points to the task's fpsimd_state, the TIF_FOREIGN_FPSTATE flag is 101 * cleared, otherwise it is set; 102 * 103 * - the task returns to userland; if TIF_FOREIGN_FPSTATE is set, the task's 104 * userland FPSIMD state is copied from memory to the registers, the task's 105 * fpsimd_cpu field is set to the id of the current CPU, the current 106 * CPU's fpsimd_last_state pointer is set to this task's fpsimd_state and the 107 * TIF_FOREIGN_FPSTATE flag is cleared; 108 * 109 * - the task executes an ordinary syscall; upon return to userland, the 110 * TIF_FOREIGN_FPSTATE flag will still be cleared, so no FPSIMD state is 111 * restored; 112 * 113 * - the task executes a syscall which executes some NEON instructions; this is 114 * preceded by a call to kernel_neon_begin(), which copies the task's FPSIMD 115 * register contents to memory, clears the fpsimd_last_state per-cpu variable 116 * and sets the TIF_FOREIGN_FPSTATE flag; 117 * 118 * - the task gets preempted after kernel_neon_end() is called; as we have not 119 * returned from the 2nd syscall yet, TIF_FOREIGN_FPSTATE is still set so 120 * whatever is in the FPSIMD registers is not saved to memory, but discarded. 121 */ 122 struct fpsimd_last_state_struct { 123 struct user_fpsimd_state *st; 124 void *sve_state; 125 unsigned int sve_vl; 126 }; 127 128 static DEFINE_PER_CPU(struct fpsimd_last_state_struct, fpsimd_last_state); 129 130 /* Default VL for tasks that don't set it explicitly: */ 131 static int sve_default_vl = -1; 132 133 #ifdef CONFIG_ARM64_SVE 134 135 /* Maximum supported vector length across all CPUs (initially poisoned) */ 136 int __ro_after_init sve_max_vl = SVE_VL_MIN; 137 int __ro_after_init sve_max_virtualisable_vl = SVE_VL_MIN; 138 139 /* 140 * Set of available vector lengths, 141 * where length vq encoded as bit __vq_to_bit(vq): 142 */ 143 __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX); 144 /* Set of vector lengths present on at least one cpu: */ 145 static __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX); 146 147 static void __percpu *efi_sve_state; 148 149 #else /* ! CONFIG_ARM64_SVE */ 150 151 /* Dummy declaration for code that will be optimised out: */ 152 extern __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX); 153 extern __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX); 154 extern void __percpu *efi_sve_state; 155 156 #endif /* ! CONFIG_ARM64_SVE */ 157 158 /* 159 * Call __sve_free() directly only if you know task can't be scheduled 160 * or preempted. 161 */ 162 static void __sve_free(struct task_struct *task) 163 { 164 kfree(task->thread.sve_state); 165 task->thread.sve_state = NULL; 166 } 167 168 static void sve_free(struct task_struct *task) 169 { 170 WARN_ON(test_tsk_thread_flag(task, TIF_SVE)); 171 172 __sve_free(task); 173 } 174 175 /* 176 * TIF_SVE controls whether a task can use SVE without trapping while 177 * in userspace, and also the way a task's FPSIMD/SVE state is stored 178 * in thread_struct. 179 * 180 * The kernel uses this flag to track whether a user task is actively 181 * using SVE, and therefore whether full SVE register state needs to 182 * be tracked. If not, the cheaper FPSIMD context handling code can 183 * be used instead of the more costly SVE equivalents. 184 * 185 * * TIF_SVE set: 186 * 187 * The task can execute SVE instructions while in userspace without 188 * trapping to the kernel. 189 * 190 * When stored, Z0-Z31 (incorporating Vn in bits[127:0] or the 191 * corresponding Zn), P0-P15 and FFR are encoded in in 192 * task->thread.sve_state, formatted appropriately for vector 193 * length task->thread.sve_vl. 194 * 195 * task->thread.sve_state must point to a valid buffer at least 196 * sve_state_size(task) bytes in size. 197 * 198 * During any syscall, the kernel may optionally clear TIF_SVE and 199 * discard the vector state except for the FPSIMD subset. 200 * 201 * * TIF_SVE clear: 202 * 203 * An attempt by the user task to execute an SVE instruction causes 204 * do_sve_acc() to be called, which does some preparation and then 205 * sets TIF_SVE. 206 * 207 * When stored, FPSIMD registers V0-V31 are encoded in 208 * task->thread.uw.fpsimd_state; bits [max : 128] for each of Z0-Z31 are 209 * logically zero but not stored anywhere; P0-P15 and FFR are not 210 * stored and have unspecified values from userspace's point of 211 * view. For hygiene purposes, the kernel zeroes them on next use, 212 * but userspace is discouraged from relying on this. 213 * 214 * task->thread.sve_state does not need to be non-NULL, valid or any 215 * particular size: it must not be dereferenced. 216 * 217 * * FPSR and FPCR are always stored in task->thread.uw.fpsimd_state 218 * irrespective of whether TIF_SVE is clear or set, since these are 219 * not vector length dependent. 220 */ 221 222 /* 223 * Update current's FPSIMD/SVE registers from thread_struct. 224 * 225 * This function should be called only when the FPSIMD/SVE state in 226 * thread_struct is known to be up to date, when preparing to enter 227 * userspace. 228 * 229 * Softirqs (and preemption) must be disabled. 230 */ 231 static void task_fpsimd_load(void) 232 { 233 WARN_ON(!in_softirq() && !irqs_disabled()); 234 235 if (system_supports_sve() && test_thread_flag(TIF_SVE)) 236 sve_load_state(sve_pffr(¤t->thread), 237 ¤t->thread.uw.fpsimd_state.fpsr, 238 sve_vq_from_vl(current->thread.sve_vl) - 1); 239 else 240 fpsimd_load_state(¤t->thread.uw.fpsimd_state); 241 } 242 243 /* 244 * Ensure FPSIMD/SVE storage in memory for the loaded context is up to 245 * date with respect to the CPU registers. 246 * 247 * Softirqs (and preemption) must be disabled. 248 */ 249 void fpsimd_save(void) 250 { 251 struct fpsimd_last_state_struct const *last = 252 this_cpu_ptr(&fpsimd_last_state); 253 /* set by fpsimd_bind_task_to_cpu() or fpsimd_bind_state_to_cpu() */ 254 255 WARN_ON(!in_softirq() && !irqs_disabled()); 256 257 if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) { 258 if (system_supports_sve() && test_thread_flag(TIF_SVE)) { 259 if (WARN_ON(sve_get_vl() != last->sve_vl)) { 260 /* 261 * Can't save the user regs, so current would 262 * re-enter user with corrupt state. 263 * There's no way to recover, so kill it: 264 */ 265 force_signal_inject(SIGKILL, SI_KERNEL, 0); 266 return; 267 } 268 269 sve_save_state((char *)last->sve_state + 270 sve_ffr_offset(last->sve_vl), 271 &last->st->fpsr); 272 } else 273 fpsimd_save_state(last->st); 274 } 275 } 276 277 /* 278 * All vector length selection from userspace comes through here. 279 * We're on a slow path, so some sanity-checks are included. 280 * If things go wrong there's a bug somewhere, but try to fall back to a 281 * safe choice. 282 */ 283 static unsigned int find_supported_vector_length(unsigned int vl) 284 { 285 int bit; 286 int max_vl = sve_max_vl; 287 288 if (WARN_ON(!sve_vl_valid(vl))) 289 vl = SVE_VL_MIN; 290 291 if (WARN_ON(!sve_vl_valid(max_vl))) 292 max_vl = SVE_VL_MIN; 293 294 if (vl > max_vl) 295 vl = max_vl; 296 297 bit = find_next_bit(sve_vq_map, SVE_VQ_MAX, 298 __vq_to_bit(sve_vq_from_vl(vl))); 299 return sve_vl_from_vq(__bit_to_vq(bit)); 300 } 301 302 #ifdef CONFIG_SYSCTL 303 304 static int sve_proc_do_default_vl(struct ctl_table *table, int write, 305 void __user *buffer, size_t *lenp, 306 loff_t *ppos) 307 { 308 int ret; 309 int vl = sve_default_vl; 310 struct ctl_table tmp_table = { 311 .data = &vl, 312 .maxlen = sizeof(vl), 313 }; 314 315 ret = proc_dointvec(&tmp_table, write, buffer, lenp, ppos); 316 if (ret || !write) 317 return ret; 318 319 /* Writing -1 has the special meaning "set to max": */ 320 if (vl == -1) 321 vl = sve_max_vl; 322 323 if (!sve_vl_valid(vl)) 324 return -EINVAL; 325 326 sve_default_vl = find_supported_vector_length(vl); 327 return 0; 328 } 329 330 static struct ctl_table sve_default_vl_table[] = { 331 { 332 .procname = "sve_default_vector_length", 333 .mode = 0644, 334 .proc_handler = sve_proc_do_default_vl, 335 }, 336 { } 337 }; 338 339 static int __init sve_sysctl_init(void) 340 { 341 if (system_supports_sve()) 342 if (!register_sysctl("abi", sve_default_vl_table)) 343 return -EINVAL; 344 345 return 0; 346 } 347 348 #else /* ! CONFIG_SYSCTL */ 349 static int __init sve_sysctl_init(void) { return 0; } 350 #endif /* ! CONFIG_SYSCTL */ 351 352 #define ZREG(sve_state, vq, n) ((char *)(sve_state) + \ 353 (SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET)) 354 355 /* 356 * Transfer the FPSIMD state in task->thread.uw.fpsimd_state to 357 * task->thread.sve_state. 358 * 359 * Task can be a non-runnable task, or current. In the latter case, 360 * softirqs (and preemption) must be disabled. 361 * task->thread.sve_state must point to at least sve_state_size(task) 362 * bytes of allocated kernel memory. 363 * task->thread.uw.fpsimd_state must be up to date before calling this 364 * function. 365 */ 366 static void fpsimd_to_sve(struct task_struct *task) 367 { 368 unsigned int vq; 369 void *sst = task->thread.sve_state; 370 struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; 371 unsigned int i; 372 373 if (!system_supports_sve()) 374 return; 375 376 vq = sve_vq_from_vl(task->thread.sve_vl); 377 for (i = 0; i < 32; ++i) 378 memcpy(ZREG(sst, vq, i), &fst->vregs[i], 379 sizeof(fst->vregs[i])); 380 } 381 382 /* 383 * Transfer the SVE state in task->thread.sve_state to 384 * task->thread.uw.fpsimd_state. 385 * 386 * Task can be a non-runnable task, or current. In the latter case, 387 * softirqs (and preemption) must be disabled. 388 * task->thread.sve_state must point to at least sve_state_size(task) 389 * bytes of allocated kernel memory. 390 * task->thread.sve_state must be up to date before calling this function. 391 */ 392 static void sve_to_fpsimd(struct task_struct *task) 393 { 394 unsigned int vq; 395 void const *sst = task->thread.sve_state; 396 struct user_fpsimd_state *fst = &task->thread.uw.fpsimd_state; 397 unsigned int i; 398 399 if (!system_supports_sve()) 400 return; 401 402 vq = sve_vq_from_vl(task->thread.sve_vl); 403 for (i = 0; i < 32; ++i) 404 memcpy(&fst->vregs[i], ZREG(sst, vq, i), 405 sizeof(fst->vregs[i])); 406 } 407 408 #ifdef CONFIG_ARM64_SVE 409 410 /* 411 * Return how many bytes of memory are required to store the full SVE 412 * state for task, given task's currently configured vector length. 413 */ 414 size_t sve_state_size(struct task_struct const *task) 415 { 416 return SVE_SIG_REGS_SIZE(sve_vq_from_vl(task->thread.sve_vl)); 417 } 418 419 /* 420 * Ensure that task->thread.sve_state is allocated and sufficiently large. 421 * 422 * This function should be used only in preparation for replacing 423 * task->thread.sve_state with new data. The memory is always zeroed 424 * here to prevent stale data from showing through: this is done in 425 * the interest of testability and predictability: except in the 426 * do_sve_acc() case, there is no ABI requirement to hide stale data 427 * written previously be task. 428 */ 429 void sve_alloc(struct task_struct *task) 430 { 431 if (task->thread.sve_state) { 432 memset(task->thread.sve_state, 0, sve_state_size(current)); 433 return; 434 } 435 436 /* This is a small allocation (maximum ~8KB) and Should Not Fail. */ 437 task->thread.sve_state = 438 kzalloc(sve_state_size(task), GFP_KERNEL); 439 440 /* 441 * If future SVE revisions can have larger vectors though, 442 * this may cease to be true: 443 */ 444 BUG_ON(!task->thread.sve_state); 445 } 446 447 448 /* 449 * Ensure that task->thread.sve_state is up to date with respect to 450 * the user task, irrespective of when SVE is in use or not. 451 * 452 * This should only be called by ptrace. task must be non-runnable. 453 * task->thread.sve_state must point to at least sve_state_size(task) 454 * bytes of allocated kernel memory. 455 */ 456 void fpsimd_sync_to_sve(struct task_struct *task) 457 { 458 if (!test_tsk_thread_flag(task, TIF_SVE)) 459 fpsimd_to_sve(task); 460 } 461 462 /* 463 * Ensure that task->thread.uw.fpsimd_state is up to date with respect to 464 * the user task, irrespective of whether SVE is in use or not. 465 * 466 * This should only be called by ptrace. task must be non-runnable. 467 * task->thread.sve_state must point to at least sve_state_size(task) 468 * bytes of allocated kernel memory. 469 */ 470 void sve_sync_to_fpsimd(struct task_struct *task) 471 { 472 if (test_tsk_thread_flag(task, TIF_SVE)) 473 sve_to_fpsimd(task); 474 } 475 476 /* 477 * Ensure that task->thread.sve_state is up to date with respect to 478 * the task->thread.uw.fpsimd_state. 479 * 480 * This should only be called by ptrace to merge new FPSIMD register 481 * values into a task for which SVE is currently active. 482 * task must be non-runnable. 483 * task->thread.sve_state must point to at least sve_state_size(task) 484 * bytes of allocated kernel memory. 485 * task->thread.uw.fpsimd_state must already have been initialised with 486 * the new FPSIMD register values to be merged in. 487 */ 488 void sve_sync_from_fpsimd_zeropad(struct task_struct *task) 489 { 490 unsigned int vq; 491 void *sst = task->thread.sve_state; 492 struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; 493 unsigned int i; 494 495 if (!test_tsk_thread_flag(task, TIF_SVE)) 496 return; 497 498 vq = sve_vq_from_vl(task->thread.sve_vl); 499 500 memset(sst, 0, SVE_SIG_REGS_SIZE(vq)); 501 502 for (i = 0; i < 32; ++i) 503 memcpy(ZREG(sst, vq, i), &fst->vregs[i], 504 sizeof(fst->vregs[i])); 505 } 506 507 int sve_set_vector_length(struct task_struct *task, 508 unsigned long vl, unsigned long flags) 509 { 510 if (flags & ~(unsigned long)(PR_SVE_VL_INHERIT | 511 PR_SVE_SET_VL_ONEXEC)) 512 return -EINVAL; 513 514 if (!sve_vl_valid(vl)) 515 return -EINVAL; 516 517 /* 518 * Clamp to the maximum vector length that VL-agnostic SVE code can 519 * work with. A flag may be assigned in the future to allow setting 520 * of larger vector lengths without confusing older software. 521 */ 522 if (vl > SVE_VL_ARCH_MAX) 523 vl = SVE_VL_ARCH_MAX; 524 525 vl = find_supported_vector_length(vl); 526 527 if (flags & (PR_SVE_VL_INHERIT | 528 PR_SVE_SET_VL_ONEXEC)) 529 task->thread.sve_vl_onexec = vl; 530 else 531 /* Reset VL to system default on next exec: */ 532 task->thread.sve_vl_onexec = 0; 533 534 /* Only actually set the VL if not deferred: */ 535 if (flags & PR_SVE_SET_VL_ONEXEC) 536 goto out; 537 538 if (vl == task->thread.sve_vl) 539 goto out; 540 541 /* 542 * To ensure the FPSIMD bits of the SVE vector registers are preserved, 543 * write any live register state back to task_struct, and convert to a 544 * non-SVE thread. 545 */ 546 if (task == current) { 547 local_bh_disable(); 548 549 fpsimd_save(); 550 } 551 552 fpsimd_flush_task_state(task); 553 if (test_and_clear_tsk_thread_flag(task, TIF_SVE)) 554 sve_to_fpsimd(task); 555 556 if (task == current) 557 local_bh_enable(); 558 559 /* 560 * Force reallocation of task SVE state to the correct size 561 * on next use: 562 */ 563 sve_free(task); 564 565 task->thread.sve_vl = vl; 566 567 out: 568 update_tsk_thread_flag(task, TIF_SVE_VL_INHERIT, 569 flags & PR_SVE_VL_INHERIT); 570 571 return 0; 572 } 573 574 /* 575 * Encode the current vector length and flags for return. 576 * This is only required for prctl(): ptrace has separate fields 577 * 578 * flags are as for sve_set_vector_length(). 579 */ 580 static int sve_prctl_status(unsigned long flags) 581 { 582 int ret; 583 584 if (flags & PR_SVE_SET_VL_ONEXEC) 585 ret = current->thread.sve_vl_onexec; 586 else 587 ret = current->thread.sve_vl; 588 589 if (test_thread_flag(TIF_SVE_VL_INHERIT)) 590 ret |= PR_SVE_VL_INHERIT; 591 592 return ret; 593 } 594 595 /* PR_SVE_SET_VL */ 596 int sve_set_current_vl(unsigned long arg) 597 { 598 unsigned long vl, flags; 599 int ret; 600 601 vl = arg & PR_SVE_VL_LEN_MASK; 602 flags = arg & ~vl; 603 604 if (!system_supports_sve()) 605 return -EINVAL; 606 607 ret = sve_set_vector_length(current, vl, flags); 608 if (ret) 609 return ret; 610 611 return sve_prctl_status(flags); 612 } 613 614 /* PR_SVE_GET_VL */ 615 int sve_get_current_vl(void) 616 { 617 if (!system_supports_sve()) 618 return -EINVAL; 619 620 return sve_prctl_status(0); 621 } 622 623 static void sve_probe_vqs(DECLARE_BITMAP(map, SVE_VQ_MAX)) 624 { 625 unsigned int vq, vl; 626 unsigned long zcr; 627 628 bitmap_zero(map, SVE_VQ_MAX); 629 630 zcr = ZCR_ELx_LEN_MASK; 631 zcr = read_sysreg_s(SYS_ZCR_EL1) & ~zcr; 632 633 for (vq = SVE_VQ_MAX; vq >= SVE_VQ_MIN; --vq) { 634 write_sysreg_s(zcr | (vq - 1), SYS_ZCR_EL1); /* self-syncing */ 635 vl = sve_get_vl(); 636 vq = sve_vq_from_vl(vl); /* skip intervening lengths */ 637 set_bit(__vq_to_bit(vq), map); 638 } 639 } 640 641 /* 642 * Initialise the set of known supported VQs for the boot CPU. 643 * This is called during kernel boot, before secondary CPUs are brought up. 644 */ 645 void __init sve_init_vq_map(void) 646 { 647 sve_probe_vqs(sve_vq_map); 648 bitmap_copy(sve_vq_partial_map, sve_vq_map, SVE_VQ_MAX); 649 } 650 651 /* 652 * If we haven't committed to the set of supported VQs yet, filter out 653 * those not supported by the current CPU. 654 * This function is called during the bring-up of early secondary CPUs only. 655 */ 656 void sve_update_vq_map(void) 657 { 658 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 659 660 sve_probe_vqs(tmp_map); 661 bitmap_and(sve_vq_map, sve_vq_map, tmp_map, SVE_VQ_MAX); 662 bitmap_or(sve_vq_partial_map, sve_vq_partial_map, tmp_map, SVE_VQ_MAX); 663 } 664 665 /* 666 * Check whether the current CPU supports all VQs in the committed set. 667 * This function is called during the bring-up of late secondary CPUs only. 668 */ 669 int sve_verify_vq_map(void) 670 { 671 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 672 unsigned long b; 673 674 sve_probe_vqs(tmp_map); 675 676 bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); 677 if (bitmap_intersects(tmp_map, sve_vq_map, SVE_VQ_MAX)) { 678 pr_warn("SVE: cpu%d: Required vector length(s) missing\n", 679 smp_processor_id()); 680 return -EINVAL; 681 } 682 683 if (!IS_ENABLED(CONFIG_KVM) || !is_hyp_mode_available()) 684 return 0; 685 686 /* 687 * For KVM, it is necessary to ensure that this CPU doesn't 688 * support any vector length that guests may have probed as 689 * unsupported. 690 */ 691 692 /* Recover the set of supported VQs: */ 693 bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); 694 /* Find VQs supported that are not globally supported: */ 695 bitmap_andnot(tmp_map, tmp_map, sve_vq_map, SVE_VQ_MAX); 696 697 /* Find the lowest such VQ, if any: */ 698 b = find_last_bit(tmp_map, SVE_VQ_MAX); 699 if (b >= SVE_VQ_MAX) 700 return 0; /* no mismatches */ 701 702 /* 703 * Mismatches above sve_max_virtualisable_vl are fine, since 704 * no guest is allowed to configure ZCR_EL2.LEN to exceed this: 705 */ 706 if (sve_vl_from_vq(__bit_to_vq(b)) <= sve_max_virtualisable_vl) { 707 pr_warn("SVE: cpu%d: Unsupported vector length(s) present\n", 708 smp_processor_id()); 709 return -EINVAL; 710 } 711 712 return 0; 713 } 714 715 static void __init sve_efi_setup(void) 716 { 717 if (!IS_ENABLED(CONFIG_EFI)) 718 return; 719 720 /* 721 * alloc_percpu() warns and prints a backtrace if this goes wrong. 722 * This is evidence of a crippled system and we are returning void, 723 * so no attempt is made to handle this situation here. 724 */ 725 if (!sve_vl_valid(sve_max_vl)) 726 goto fail; 727 728 efi_sve_state = __alloc_percpu( 729 SVE_SIG_REGS_SIZE(sve_vq_from_vl(sve_max_vl)), SVE_VQ_BYTES); 730 if (!efi_sve_state) 731 goto fail; 732 733 return; 734 735 fail: 736 panic("Cannot allocate percpu memory for EFI SVE save/restore"); 737 } 738 739 /* 740 * Enable SVE for EL1. 741 * Intended for use by the cpufeatures code during CPU boot. 742 */ 743 void sve_kernel_enable(const struct arm64_cpu_capabilities *__always_unused p) 744 { 745 write_sysreg(read_sysreg(CPACR_EL1) | CPACR_EL1_ZEN_EL1EN, CPACR_EL1); 746 isb(); 747 } 748 749 /* 750 * Read the pseudo-ZCR used by cpufeatures to identify the supported SVE 751 * vector length. 752 * 753 * Use only if SVE is present. 754 * This function clobbers the SVE vector length. 755 */ 756 u64 read_zcr_features(void) 757 { 758 u64 zcr; 759 unsigned int vq_max; 760 761 /* 762 * Set the maximum possible VL, and write zeroes to all other 763 * bits to see if they stick. 764 */ 765 sve_kernel_enable(NULL); 766 write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL1); 767 768 zcr = read_sysreg_s(SYS_ZCR_EL1); 769 zcr &= ~(u64)ZCR_ELx_LEN_MASK; /* find sticky 1s outside LEN field */ 770 vq_max = sve_vq_from_vl(sve_get_vl()); 771 zcr |= vq_max - 1; /* set LEN field to maximum effective value */ 772 773 return zcr; 774 } 775 776 void __init sve_setup(void) 777 { 778 u64 zcr; 779 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 780 unsigned long b; 781 782 if (!system_supports_sve()) 783 return; 784 785 /* 786 * The SVE architecture mandates support for 128-bit vectors, 787 * so sve_vq_map must have at least SVE_VQ_MIN set. 788 * If something went wrong, at least try to patch it up: 789 */ 790 if (WARN_ON(!test_bit(__vq_to_bit(SVE_VQ_MIN), sve_vq_map))) 791 set_bit(__vq_to_bit(SVE_VQ_MIN), sve_vq_map); 792 793 zcr = read_sanitised_ftr_reg(SYS_ZCR_EL1); 794 sve_max_vl = sve_vl_from_vq((zcr & ZCR_ELx_LEN_MASK) + 1); 795 796 /* 797 * Sanity-check that the max VL we determined through CPU features 798 * corresponds properly to sve_vq_map. If not, do our best: 799 */ 800 if (WARN_ON(sve_max_vl != find_supported_vector_length(sve_max_vl))) 801 sve_max_vl = find_supported_vector_length(sve_max_vl); 802 803 /* 804 * For the default VL, pick the maximum supported value <= 64. 805 * VL == 64 is guaranteed not to grow the signal frame. 806 */ 807 sve_default_vl = find_supported_vector_length(64); 808 809 bitmap_andnot(tmp_map, sve_vq_partial_map, sve_vq_map, 810 SVE_VQ_MAX); 811 812 b = find_last_bit(tmp_map, SVE_VQ_MAX); 813 if (b >= SVE_VQ_MAX) 814 /* No non-virtualisable VLs found */ 815 sve_max_virtualisable_vl = SVE_VQ_MAX; 816 else if (WARN_ON(b == SVE_VQ_MAX - 1)) 817 /* No virtualisable VLs? This is architecturally forbidden. */ 818 sve_max_virtualisable_vl = SVE_VQ_MIN; 819 else /* b + 1 < SVE_VQ_MAX */ 820 sve_max_virtualisable_vl = sve_vl_from_vq(__bit_to_vq(b + 1)); 821 822 if (sve_max_virtualisable_vl > sve_max_vl) 823 sve_max_virtualisable_vl = sve_max_vl; 824 825 pr_info("SVE: maximum available vector length %u bytes per vector\n", 826 sve_max_vl); 827 pr_info("SVE: default vector length %u bytes per vector\n", 828 sve_default_vl); 829 830 /* KVM decides whether to support mismatched systems. Just warn here: */ 831 if (sve_max_virtualisable_vl < sve_max_vl) 832 pr_warn("SVE: unvirtualisable vector lengths present\n"); 833 834 sve_efi_setup(); 835 } 836 837 /* 838 * Called from the put_task_struct() path, which cannot get here 839 * unless dead_task is really dead and not schedulable. 840 */ 841 void fpsimd_release_task(struct task_struct *dead_task) 842 { 843 __sve_free(dead_task); 844 } 845 846 #endif /* CONFIG_ARM64_SVE */ 847 848 /* 849 * Trapped SVE access 850 * 851 * Storage is allocated for the full SVE state, the current FPSIMD 852 * register contents are migrated across, and TIF_SVE is set so that 853 * the SVE access trap will be disabled the next time this task 854 * reaches ret_to_user. 855 * 856 * TIF_SVE should be clear on entry: otherwise, task_fpsimd_load() 857 * would have disabled the SVE access trap for userspace during 858 * ret_to_user, making an SVE access trap impossible in that case. 859 */ 860 asmlinkage void do_sve_acc(unsigned int esr, struct pt_regs *regs) 861 { 862 /* Even if we chose not to use SVE, the hardware could still trap: */ 863 if (unlikely(!system_supports_sve()) || WARN_ON(is_compat_task())) { 864 force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc); 865 return; 866 } 867 868 sve_alloc(current); 869 870 local_bh_disable(); 871 872 fpsimd_save(); 873 874 /* Force ret_to_user to reload the registers: */ 875 fpsimd_flush_task_state(current); 876 877 fpsimd_to_sve(current); 878 if (test_and_set_thread_flag(TIF_SVE)) 879 WARN_ON(1); /* SVE access shouldn't have trapped */ 880 881 local_bh_enable(); 882 } 883 884 /* 885 * Trapped FP/ASIMD access. 886 */ 887 asmlinkage void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs) 888 { 889 /* TODO: implement lazy context saving/restoring */ 890 WARN_ON(1); 891 } 892 893 /* 894 * Raise a SIGFPE for the current process. 895 */ 896 asmlinkage void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs) 897 { 898 unsigned int si_code = FPE_FLTUNK; 899 900 if (esr & ESR_ELx_FP_EXC_TFV) { 901 if (esr & FPEXC_IOF) 902 si_code = FPE_FLTINV; 903 else if (esr & FPEXC_DZF) 904 si_code = FPE_FLTDIV; 905 else if (esr & FPEXC_OFF) 906 si_code = FPE_FLTOVF; 907 else if (esr & FPEXC_UFF) 908 si_code = FPE_FLTUND; 909 else if (esr & FPEXC_IXF) 910 si_code = FPE_FLTRES; 911 } 912 913 send_sig_fault(SIGFPE, si_code, 914 (void __user *)instruction_pointer(regs), 915 current); 916 } 917 918 void fpsimd_thread_switch(struct task_struct *next) 919 { 920 bool wrong_task, wrong_cpu; 921 922 if (!system_supports_fpsimd()) 923 return; 924 925 /* Save unsaved fpsimd state, if any: */ 926 fpsimd_save(); 927 928 /* 929 * Fix up TIF_FOREIGN_FPSTATE to correctly describe next's 930 * state. For kernel threads, FPSIMD registers are never loaded 931 * and wrong_task and wrong_cpu will always be true. 932 */ 933 wrong_task = __this_cpu_read(fpsimd_last_state.st) != 934 &next->thread.uw.fpsimd_state; 935 wrong_cpu = next->thread.fpsimd_cpu != smp_processor_id(); 936 937 update_tsk_thread_flag(next, TIF_FOREIGN_FPSTATE, 938 wrong_task || wrong_cpu); 939 } 940 941 void fpsimd_flush_thread(void) 942 { 943 int vl, supported_vl; 944 945 if (!system_supports_fpsimd()) 946 return; 947 948 local_bh_disable(); 949 950 fpsimd_flush_task_state(current); 951 memset(¤t->thread.uw.fpsimd_state, 0, 952 sizeof(current->thread.uw.fpsimd_state)); 953 954 if (system_supports_sve()) { 955 clear_thread_flag(TIF_SVE); 956 sve_free(current); 957 958 /* 959 * Reset the task vector length as required. 960 * This is where we ensure that all user tasks have a valid 961 * vector length configured: no kernel task can become a user 962 * task without an exec and hence a call to this function. 963 * By the time the first call to this function is made, all 964 * early hardware probing is complete, so sve_default_vl 965 * should be valid. 966 * If a bug causes this to go wrong, we make some noise and 967 * try to fudge thread.sve_vl to a safe value here. 968 */ 969 vl = current->thread.sve_vl_onexec ? 970 current->thread.sve_vl_onexec : sve_default_vl; 971 972 if (WARN_ON(!sve_vl_valid(vl))) 973 vl = SVE_VL_MIN; 974 975 supported_vl = find_supported_vector_length(vl); 976 if (WARN_ON(supported_vl != vl)) 977 vl = supported_vl; 978 979 current->thread.sve_vl = vl; 980 981 /* 982 * If the task is not set to inherit, ensure that the vector 983 * length will be reset by a subsequent exec: 984 */ 985 if (!test_thread_flag(TIF_SVE_VL_INHERIT)) 986 current->thread.sve_vl_onexec = 0; 987 } 988 989 local_bh_enable(); 990 } 991 992 /* 993 * Save the userland FPSIMD state of 'current' to memory, but only if the state 994 * currently held in the registers does in fact belong to 'current' 995 */ 996 void fpsimd_preserve_current_state(void) 997 { 998 if (!system_supports_fpsimd()) 999 return; 1000 1001 local_bh_disable(); 1002 fpsimd_save(); 1003 local_bh_enable(); 1004 } 1005 1006 /* 1007 * Like fpsimd_preserve_current_state(), but ensure that 1008 * current->thread.uw.fpsimd_state is updated so that it can be copied to 1009 * the signal frame. 1010 */ 1011 void fpsimd_signal_preserve_current_state(void) 1012 { 1013 fpsimd_preserve_current_state(); 1014 if (system_supports_sve() && test_thread_flag(TIF_SVE)) 1015 sve_to_fpsimd(current); 1016 } 1017 1018 /* 1019 * Associate current's FPSIMD context with this cpu 1020 * Preemption must be disabled when calling this function. 1021 */ 1022 void fpsimd_bind_task_to_cpu(void) 1023 { 1024 struct fpsimd_last_state_struct *last = 1025 this_cpu_ptr(&fpsimd_last_state); 1026 1027 last->st = ¤t->thread.uw.fpsimd_state; 1028 last->sve_state = current->thread.sve_state; 1029 last->sve_vl = current->thread.sve_vl; 1030 current->thread.fpsimd_cpu = smp_processor_id(); 1031 1032 if (system_supports_sve()) { 1033 /* Toggle SVE trapping for userspace if needed */ 1034 if (test_thread_flag(TIF_SVE)) 1035 sve_user_enable(); 1036 else 1037 sve_user_disable(); 1038 1039 /* Serialised by exception return to user */ 1040 } 1041 } 1042 1043 void fpsimd_bind_state_to_cpu(struct user_fpsimd_state *st, void *sve_state, 1044 unsigned int sve_vl) 1045 { 1046 struct fpsimd_last_state_struct *last = 1047 this_cpu_ptr(&fpsimd_last_state); 1048 1049 WARN_ON(!in_softirq() && !irqs_disabled()); 1050 1051 last->st = st; 1052 last->sve_state = sve_state; 1053 last->sve_vl = sve_vl; 1054 } 1055 1056 /* 1057 * Load the userland FPSIMD state of 'current' from memory, but only if the 1058 * FPSIMD state already held in the registers is /not/ the most recent FPSIMD 1059 * state of 'current' 1060 */ 1061 void fpsimd_restore_current_state(void) 1062 { 1063 if (!system_supports_fpsimd()) 1064 return; 1065 1066 local_bh_disable(); 1067 1068 if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) { 1069 task_fpsimd_load(); 1070 fpsimd_bind_task_to_cpu(); 1071 } 1072 1073 local_bh_enable(); 1074 } 1075 1076 /* 1077 * Load an updated userland FPSIMD state for 'current' from memory and set the 1078 * flag that indicates that the FPSIMD register contents are the most recent 1079 * FPSIMD state of 'current' 1080 */ 1081 void fpsimd_update_current_state(struct user_fpsimd_state const *state) 1082 { 1083 if (!system_supports_fpsimd()) 1084 return; 1085 1086 local_bh_disable(); 1087 1088 current->thread.uw.fpsimd_state = *state; 1089 if (system_supports_sve() && test_thread_flag(TIF_SVE)) 1090 fpsimd_to_sve(current); 1091 1092 task_fpsimd_load(); 1093 fpsimd_bind_task_to_cpu(); 1094 1095 clear_thread_flag(TIF_FOREIGN_FPSTATE); 1096 1097 local_bh_enable(); 1098 } 1099 1100 /* 1101 * Invalidate live CPU copies of task t's FPSIMD state 1102 * 1103 * This function may be called with preemption enabled. The barrier() 1104 * ensures that the assignment to fpsimd_cpu is visible to any 1105 * preemption/softirq that could race with set_tsk_thread_flag(), so 1106 * that TIF_FOREIGN_FPSTATE cannot be spuriously re-cleared. 1107 * 1108 * The final barrier ensures that TIF_FOREIGN_FPSTATE is seen set by any 1109 * subsequent code. 1110 */ 1111 void fpsimd_flush_task_state(struct task_struct *t) 1112 { 1113 t->thread.fpsimd_cpu = NR_CPUS; 1114 1115 barrier(); 1116 set_tsk_thread_flag(t, TIF_FOREIGN_FPSTATE); 1117 1118 barrier(); 1119 } 1120 1121 /* 1122 * Invalidate any task's FPSIMD state that is present on this cpu. 1123 * This function must be called with softirqs disabled. 1124 */ 1125 void fpsimd_flush_cpu_state(void) 1126 { 1127 __this_cpu_write(fpsimd_last_state.st, NULL); 1128 set_thread_flag(TIF_FOREIGN_FPSTATE); 1129 } 1130 1131 #ifdef CONFIG_KERNEL_MODE_NEON 1132 1133 DEFINE_PER_CPU(bool, kernel_neon_busy); 1134 EXPORT_PER_CPU_SYMBOL(kernel_neon_busy); 1135 1136 /* 1137 * Kernel-side NEON support functions 1138 */ 1139 1140 /* 1141 * kernel_neon_begin(): obtain the CPU FPSIMD registers for use by the calling 1142 * context 1143 * 1144 * Must not be called unless may_use_simd() returns true. 1145 * Task context in the FPSIMD registers is saved back to memory as necessary. 1146 * 1147 * A matching call to kernel_neon_end() must be made before returning from the 1148 * calling context. 1149 * 1150 * The caller may freely use the FPSIMD registers until kernel_neon_end() is 1151 * called. 1152 */ 1153 void kernel_neon_begin(void) 1154 { 1155 if (WARN_ON(!system_supports_fpsimd())) 1156 return; 1157 1158 BUG_ON(!may_use_simd()); 1159 1160 local_bh_disable(); 1161 1162 __this_cpu_write(kernel_neon_busy, true); 1163 1164 /* Save unsaved fpsimd state, if any: */ 1165 fpsimd_save(); 1166 1167 /* Invalidate any task state remaining in the fpsimd regs: */ 1168 fpsimd_flush_cpu_state(); 1169 1170 preempt_disable(); 1171 1172 local_bh_enable(); 1173 } 1174 EXPORT_SYMBOL(kernel_neon_begin); 1175 1176 /* 1177 * kernel_neon_end(): give the CPU FPSIMD registers back to the current task 1178 * 1179 * Must be called from a context in which kernel_neon_begin() was previously 1180 * called, with no call to kernel_neon_end() in the meantime. 1181 * 1182 * The caller must not use the FPSIMD registers after this function is called, 1183 * unless kernel_neon_begin() is called again in the meantime. 1184 */ 1185 void kernel_neon_end(void) 1186 { 1187 bool busy; 1188 1189 if (!system_supports_fpsimd()) 1190 return; 1191 1192 busy = __this_cpu_xchg(kernel_neon_busy, false); 1193 WARN_ON(!busy); /* No matching kernel_neon_begin()? */ 1194 1195 preempt_enable(); 1196 } 1197 EXPORT_SYMBOL(kernel_neon_end); 1198 1199 #ifdef CONFIG_EFI 1200 1201 static DEFINE_PER_CPU(struct user_fpsimd_state, efi_fpsimd_state); 1202 static DEFINE_PER_CPU(bool, efi_fpsimd_state_used); 1203 static DEFINE_PER_CPU(bool, efi_sve_state_used); 1204 1205 /* 1206 * EFI runtime services support functions 1207 * 1208 * The ABI for EFI runtime services allows EFI to use FPSIMD during the call. 1209 * This means that for EFI (and only for EFI), we have to assume that FPSIMD 1210 * is always used rather than being an optional accelerator. 1211 * 1212 * These functions provide the necessary support for ensuring FPSIMD 1213 * save/restore in the contexts from which EFI is used. 1214 * 1215 * Do not use them for any other purpose -- if tempted to do so, you are 1216 * either doing something wrong or you need to propose some refactoring. 1217 */ 1218 1219 /* 1220 * __efi_fpsimd_begin(): prepare FPSIMD for making an EFI runtime services call 1221 */ 1222 void __efi_fpsimd_begin(void) 1223 { 1224 if (!system_supports_fpsimd()) 1225 return; 1226 1227 WARN_ON(preemptible()); 1228 1229 if (may_use_simd()) { 1230 kernel_neon_begin(); 1231 } else { 1232 /* 1233 * If !efi_sve_state, SVE can't be in use yet and doesn't need 1234 * preserving: 1235 */ 1236 if (system_supports_sve() && likely(efi_sve_state)) { 1237 char *sve_state = this_cpu_ptr(efi_sve_state); 1238 1239 __this_cpu_write(efi_sve_state_used, true); 1240 1241 sve_save_state(sve_state + sve_ffr_offset(sve_max_vl), 1242 &this_cpu_ptr(&efi_fpsimd_state)->fpsr); 1243 } else { 1244 fpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state)); 1245 } 1246 1247 __this_cpu_write(efi_fpsimd_state_used, true); 1248 } 1249 } 1250 1251 /* 1252 * __efi_fpsimd_end(): clean up FPSIMD after an EFI runtime services call 1253 */ 1254 void __efi_fpsimd_end(void) 1255 { 1256 if (!system_supports_fpsimd()) 1257 return; 1258 1259 if (!__this_cpu_xchg(efi_fpsimd_state_used, false)) { 1260 kernel_neon_end(); 1261 } else { 1262 if (system_supports_sve() && 1263 likely(__this_cpu_read(efi_sve_state_used))) { 1264 char const *sve_state = this_cpu_ptr(efi_sve_state); 1265 1266 sve_load_state(sve_state + sve_ffr_offset(sve_max_vl), 1267 &this_cpu_ptr(&efi_fpsimd_state)->fpsr, 1268 sve_vq_from_vl(sve_get_vl()) - 1); 1269 1270 __this_cpu_write(efi_sve_state_used, false); 1271 } else { 1272 fpsimd_load_state(this_cpu_ptr(&efi_fpsimd_state)); 1273 } 1274 } 1275 } 1276 1277 #endif /* CONFIG_EFI */ 1278 1279 #endif /* CONFIG_KERNEL_MODE_NEON */ 1280 1281 #ifdef CONFIG_CPU_PM 1282 static int fpsimd_cpu_pm_notifier(struct notifier_block *self, 1283 unsigned long cmd, void *v) 1284 { 1285 switch (cmd) { 1286 case CPU_PM_ENTER: 1287 fpsimd_save(); 1288 fpsimd_flush_cpu_state(); 1289 break; 1290 case CPU_PM_EXIT: 1291 break; 1292 case CPU_PM_ENTER_FAILED: 1293 default: 1294 return NOTIFY_DONE; 1295 } 1296 return NOTIFY_OK; 1297 } 1298 1299 static struct notifier_block fpsimd_cpu_pm_notifier_block = { 1300 .notifier_call = fpsimd_cpu_pm_notifier, 1301 }; 1302 1303 static void __init fpsimd_pm_init(void) 1304 { 1305 cpu_pm_register_notifier(&fpsimd_cpu_pm_notifier_block); 1306 } 1307 1308 #else 1309 static inline void fpsimd_pm_init(void) { } 1310 #endif /* CONFIG_CPU_PM */ 1311 1312 #ifdef CONFIG_HOTPLUG_CPU 1313 static int fpsimd_cpu_dead(unsigned int cpu) 1314 { 1315 per_cpu(fpsimd_last_state.st, cpu) = NULL; 1316 return 0; 1317 } 1318 1319 static inline void fpsimd_hotplug_init(void) 1320 { 1321 cpuhp_setup_state_nocalls(CPUHP_ARM64_FPSIMD_DEAD, "arm64/fpsimd:dead", 1322 NULL, fpsimd_cpu_dead); 1323 } 1324 1325 #else 1326 static inline void fpsimd_hotplug_init(void) { } 1327 #endif 1328 1329 /* 1330 * FP/SIMD support code initialisation. 1331 */ 1332 static int __init fpsimd_init(void) 1333 { 1334 if (cpu_have_named_feature(FP)) { 1335 fpsimd_pm_init(); 1336 fpsimd_hotplug_init(); 1337 } else { 1338 pr_notice("Floating-point is not implemented\n"); 1339 } 1340 1341 if (!cpu_have_named_feature(ASIMD)) 1342 pr_notice("Advanced SIMD is not implemented\n"); 1343 1344 return sve_sysctl_init(); 1345 } 1346 core_initcall(fpsimd_init); 1347