1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * FP/SIMD context switching and fault handling 4 * 5 * Copyright (C) 2012 ARM Ltd. 6 * Author: Catalin Marinas <catalin.marinas@arm.com> 7 */ 8 9 #include <linux/bitmap.h> 10 #include <linux/bitops.h> 11 #include <linux/bottom_half.h> 12 #include <linux/bug.h> 13 #include <linux/cache.h> 14 #include <linux/compat.h> 15 #include <linux/cpu.h> 16 #include <linux/cpu_pm.h> 17 #include <linux/kernel.h> 18 #include <linux/linkage.h> 19 #include <linux/irqflags.h> 20 #include <linux/init.h> 21 #include <linux/percpu.h> 22 #include <linux/prctl.h> 23 #include <linux/preempt.h> 24 #include <linux/ptrace.h> 25 #include <linux/sched/signal.h> 26 #include <linux/sched/task_stack.h> 27 #include <linux/signal.h> 28 #include <linux/slab.h> 29 #include <linux/stddef.h> 30 #include <linux/sysctl.h> 31 #include <linux/swab.h> 32 33 #include <asm/esr.h> 34 #include <asm/fpsimd.h> 35 #include <asm/cpufeature.h> 36 #include <asm/cputype.h> 37 #include <asm/processor.h> 38 #include <asm/simd.h> 39 #include <asm/sigcontext.h> 40 #include <asm/sysreg.h> 41 #include <asm/traps.h> 42 #include <asm/virt.h> 43 44 #define FPEXC_IOF (1 << 0) 45 #define FPEXC_DZF (1 << 1) 46 #define FPEXC_OFF (1 << 2) 47 #define FPEXC_UFF (1 << 3) 48 #define FPEXC_IXF (1 << 4) 49 #define FPEXC_IDF (1 << 7) 50 51 /* 52 * (Note: in this discussion, statements about FPSIMD apply equally to SVE.) 53 * 54 * In order to reduce the number of times the FPSIMD state is needlessly saved 55 * and restored, we need to keep track of two things: 56 * (a) for each task, we need to remember which CPU was the last one to have 57 * the task's FPSIMD state loaded into its FPSIMD registers; 58 * (b) for each CPU, we need to remember which task's userland FPSIMD state has 59 * been loaded into its FPSIMD registers most recently, or whether it has 60 * been used to perform kernel mode NEON in the meantime. 61 * 62 * For (a), we add a fpsimd_cpu field to thread_struct, which gets updated to 63 * the id of the current CPU every time the state is loaded onto a CPU. For (b), 64 * we add the per-cpu variable 'fpsimd_last_state' (below), which contains the 65 * address of the userland FPSIMD state of the task that was loaded onto the CPU 66 * the most recently, or NULL if kernel mode NEON has been performed after that. 67 * 68 * With this in place, we no longer have to restore the next FPSIMD state right 69 * when switching between tasks. Instead, we can defer this check to userland 70 * resume, at which time we verify whether the CPU's fpsimd_last_state and the 71 * task's fpsimd_cpu are still mutually in sync. If this is the case, we 72 * can omit the FPSIMD restore. 73 * 74 * As an optimization, we use the thread_info flag TIF_FOREIGN_FPSTATE to 75 * indicate whether or not the userland FPSIMD state of the current task is 76 * present in the registers. The flag is set unless the FPSIMD registers of this 77 * CPU currently contain the most recent userland FPSIMD state of the current 78 * task. 79 * 80 * In order to allow softirq handlers to use FPSIMD, kernel_neon_begin() may 81 * save the task's FPSIMD context back to task_struct from softirq context. 82 * To prevent this from racing with the manipulation of the task's FPSIMD state 83 * from task context and thereby corrupting the state, it is necessary to 84 * protect any manipulation of a task's fpsimd_state or TIF_FOREIGN_FPSTATE 85 * flag with {, __}get_cpu_fpsimd_context(). This will still allow softirqs to 86 * run but prevent them to use FPSIMD. 87 * 88 * For a certain task, the sequence may look something like this: 89 * - the task gets scheduled in; if both the task's fpsimd_cpu field 90 * contains the id of the current CPU, and the CPU's fpsimd_last_state per-cpu 91 * variable points to the task's fpsimd_state, the TIF_FOREIGN_FPSTATE flag is 92 * cleared, otherwise it is set; 93 * 94 * - the task returns to userland; if TIF_FOREIGN_FPSTATE is set, the task's 95 * userland FPSIMD state is copied from memory to the registers, the task's 96 * fpsimd_cpu field is set to the id of the current CPU, the current 97 * CPU's fpsimd_last_state pointer is set to this task's fpsimd_state and the 98 * TIF_FOREIGN_FPSTATE flag is cleared; 99 * 100 * - the task executes an ordinary syscall; upon return to userland, the 101 * TIF_FOREIGN_FPSTATE flag will still be cleared, so no FPSIMD state is 102 * restored; 103 * 104 * - the task executes a syscall which executes some NEON instructions; this is 105 * preceded by a call to kernel_neon_begin(), which copies the task's FPSIMD 106 * register contents to memory, clears the fpsimd_last_state per-cpu variable 107 * and sets the TIF_FOREIGN_FPSTATE flag; 108 * 109 * - the task gets preempted after kernel_neon_end() is called; as we have not 110 * returned from the 2nd syscall yet, TIF_FOREIGN_FPSTATE is still set so 111 * whatever is in the FPSIMD registers is not saved to memory, but discarded. 112 */ 113 struct fpsimd_last_state_struct { 114 struct user_fpsimd_state *st; 115 void *sve_state; 116 unsigned int sve_vl; 117 }; 118 119 static DEFINE_PER_CPU(struct fpsimd_last_state_struct, fpsimd_last_state); 120 121 /* Default VL for tasks that don't set it explicitly: */ 122 static int sve_default_vl = -1; 123 124 #ifdef CONFIG_ARM64_SVE 125 126 /* Maximum supported vector length across all CPUs (initially poisoned) */ 127 int __ro_after_init sve_max_vl = SVE_VL_MIN; 128 int __ro_after_init sve_max_virtualisable_vl = SVE_VL_MIN; 129 130 /* 131 * Set of available vector lengths, 132 * where length vq encoded as bit __vq_to_bit(vq): 133 */ 134 __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX); 135 /* Set of vector lengths present on at least one cpu: */ 136 static __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX); 137 138 static void __percpu *efi_sve_state; 139 140 #else /* ! CONFIG_ARM64_SVE */ 141 142 /* Dummy declaration for code that will be optimised out: */ 143 extern __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX); 144 extern __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX); 145 extern void __percpu *efi_sve_state; 146 147 #endif /* ! CONFIG_ARM64_SVE */ 148 149 DEFINE_PER_CPU(bool, fpsimd_context_busy); 150 EXPORT_PER_CPU_SYMBOL(fpsimd_context_busy); 151 152 static void __get_cpu_fpsimd_context(void) 153 { 154 bool busy = __this_cpu_xchg(fpsimd_context_busy, true); 155 156 WARN_ON(busy); 157 } 158 159 /* 160 * Claim ownership of the CPU FPSIMD context for use by the calling context. 161 * 162 * The caller may freely manipulate the FPSIMD context metadata until 163 * put_cpu_fpsimd_context() is called. 164 * 165 * The double-underscore version must only be called if you know the task 166 * can't be preempted. 167 */ 168 static void get_cpu_fpsimd_context(void) 169 { 170 preempt_disable(); 171 __get_cpu_fpsimd_context(); 172 } 173 174 static void __put_cpu_fpsimd_context(void) 175 { 176 bool busy = __this_cpu_xchg(fpsimd_context_busy, false); 177 178 WARN_ON(!busy); /* No matching get_cpu_fpsimd_context()? */ 179 } 180 181 /* 182 * Release the CPU FPSIMD context. 183 * 184 * Must be called from a context in which get_cpu_fpsimd_context() was 185 * previously called, with no call to put_cpu_fpsimd_context() in the 186 * meantime. 187 */ 188 static void put_cpu_fpsimd_context(void) 189 { 190 __put_cpu_fpsimd_context(); 191 preempt_enable(); 192 } 193 194 static bool have_cpu_fpsimd_context(void) 195 { 196 return !preemptible() && __this_cpu_read(fpsimd_context_busy); 197 } 198 199 /* 200 * Call __sve_free() directly only if you know task can't be scheduled 201 * or preempted. 202 */ 203 static void __sve_free(struct task_struct *task) 204 { 205 kfree(task->thread.sve_state); 206 task->thread.sve_state = NULL; 207 } 208 209 static void sve_free(struct task_struct *task) 210 { 211 WARN_ON(test_tsk_thread_flag(task, TIF_SVE)); 212 213 __sve_free(task); 214 } 215 216 /* 217 * TIF_SVE controls whether a task can use SVE without trapping while 218 * in userspace, and also the way a task's FPSIMD/SVE state is stored 219 * in thread_struct. 220 * 221 * The kernel uses this flag to track whether a user task is actively 222 * using SVE, and therefore whether full SVE register state needs to 223 * be tracked. If not, the cheaper FPSIMD context handling code can 224 * be used instead of the more costly SVE equivalents. 225 * 226 * * TIF_SVE set: 227 * 228 * The task can execute SVE instructions while in userspace without 229 * trapping to the kernel. 230 * 231 * When stored, Z0-Z31 (incorporating Vn in bits[127:0] or the 232 * corresponding Zn), P0-P15 and FFR are encoded in in 233 * task->thread.sve_state, formatted appropriately for vector 234 * length task->thread.sve_vl. 235 * 236 * task->thread.sve_state must point to a valid buffer at least 237 * sve_state_size(task) bytes in size. 238 * 239 * During any syscall, the kernel may optionally clear TIF_SVE and 240 * discard the vector state except for the FPSIMD subset. 241 * 242 * * TIF_SVE clear: 243 * 244 * An attempt by the user task to execute an SVE instruction causes 245 * do_sve_acc() to be called, which does some preparation and then 246 * sets TIF_SVE. 247 * 248 * When stored, FPSIMD registers V0-V31 are encoded in 249 * task->thread.uw.fpsimd_state; bits [max : 128] for each of Z0-Z31 are 250 * logically zero but not stored anywhere; P0-P15 and FFR are not 251 * stored and have unspecified values from userspace's point of 252 * view. For hygiene purposes, the kernel zeroes them on next use, 253 * but userspace is discouraged from relying on this. 254 * 255 * task->thread.sve_state does not need to be non-NULL, valid or any 256 * particular size: it must not be dereferenced. 257 * 258 * * FPSR and FPCR are always stored in task->thread.uw.fpsimd_state 259 * irrespective of whether TIF_SVE is clear or set, since these are 260 * not vector length dependent. 261 */ 262 263 /* 264 * Update current's FPSIMD/SVE registers from thread_struct. 265 * 266 * This function should be called only when the FPSIMD/SVE state in 267 * thread_struct is known to be up to date, when preparing to enter 268 * userspace. 269 */ 270 static void task_fpsimd_load(void) 271 { 272 WARN_ON(!have_cpu_fpsimd_context()); 273 274 if (system_supports_sve() && test_thread_flag(TIF_SVE)) 275 sve_load_state(sve_pffr(¤t->thread), 276 ¤t->thread.uw.fpsimd_state.fpsr, 277 sve_vq_from_vl(current->thread.sve_vl) - 1); 278 else 279 fpsimd_load_state(¤t->thread.uw.fpsimd_state); 280 } 281 282 /* 283 * Ensure FPSIMD/SVE storage in memory for the loaded context is up to 284 * date with respect to the CPU registers. 285 */ 286 static void fpsimd_save(void) 287 { 288 struct fpsimd_last_state_struct const *last = 289 this_cpu_ptr(&fpsimd_last_state); 290 /* set by fpsimd_bind_task_to_cpu() or fpsimd_bind_state_to_cpu() */ 291 292 WARN_ON(!have_cpu_fpsimd_context()); 293 294 if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) { 295 if (system_supports_sve() && test_thread_flag(TIF_SVE)) { 296 if (WARN_ON(sve_get_vl() != last->sve_vl)) { 297 /* 298 * Can't save the user regs, so current would 299 * re-enter user with corrupt state. 300 * There's no way to recover, so kill it: 301 */ 302 force_signal_inject(SIGKILL, SI_KERNEL, 0); 303 return; 304 } 305 306 sve_save_state((char *)last->sve_state + 307 sve_ffr_offset(last->sve_vl), 308 &last->st->fpsr); 309 } else 310 fpsimd_save_state(last->st); 311 } 312 } 313 314 /* 315 * All vector length selection from userspace comes through here. 316 * We're on a slow path, so some sanity-checks are included. 317 * If things go wrong there's a bug somewhere, but try to fall back to a 318 * safe choice. 319 */ 320 static unsigned int find_supported_vector_length(unsigned int vl) 321 { 322 int bit; 323 int max_vl = sve_max_vl; 324 325 if (WARN_ON(!sve_vl_valid(vl))) 326 vl = SVE_VL_MIN; 327 328 if (WARN_ON(!sve_vl_valid(max_vl))) 329 max_vl = SVE_VL_MIN; 330 331 if (vl > max_vl) 332 vl = max_vl; 333 334 bit = find_next_bit(sve_vq_map, SVE_VQ_MAX, 335 __vq_to_bit(sve_vq_from_vl(vl))); 336 return sve_vl_from_vq(__bit_to_vq(bit)); 337 } 338 339 #ifdef CONFIG_SYSCTL 340 341 static int sve_proc_do_default_vl(struct ctl_table *table, int write, 342 void __user *buffer, size_t *lenp, 343 loff_t *ppos) 344 { 345 int ret; 346 int vl = sve_default_vl; 347 struct ctl_table tmp_table = { 348 .data = &vl, 349 .maxlen = sizeof(vl), 350 }; 351 352 ret = proc_dointvec(&tmp_table, write, buffer, lenp, ppos); 353 if (ret || !write) 354 return ret; 355 356 /* Writing -1 has the special meaning "set to max": */ 357 if (vl == -1) 358 vl = sve_max_vl; 359 360 if (!sve_vl_valid(vl)) 361 return -EINVAL; 362 363 sve_default_vl = find_supported_vector_length(vl); 364 return 0; 365 } 366 367 static struct ctl_table sve_default_vl_table[] = { 368 { 369 .procname = "sve_default_vector_length", 370 .mode = 0644, 371 .proc_handler = sve_proc_do_default_vl, 372 }, 373 { } 374 }; 375 376 static int __init sve_sysctl_init(void) 377 { 378 if (system_supports_sve()) 379 if (!register_sysctl("abi", sve_default_vl_table)) 380 return -EINVAL; 381 382 return 0; 383 } 384 385 #else /* ! CONFIG_SYSCTL */ 386 static int __init sve_sysctl_init(void) { return 0; } 387 #endif /* ! CONFIG_SYSCTL */ 388 389 #define ZREG(sve_state, vq, n) ((char *)(sve_state) + \ 390 (SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET)) 391 392 #ifdef CONFIG_CPU_BIG_ENDIAN 393 static __uint128_t arm64_cpu_to_le128(__uint128_t x) 394 { 395 u64 a = swab64(x); 396 u64 b = swab64(x >> 64); 397 398 return ((__uint128_t)a << 64) | b; 399 } 400 #else 401 static __uint128_t arm64_cpu_to_le128(__uint128_t x) 402 { 403 return x; 404 } 405 #endif 406 407 #define arm64_le128_to_cpu(x) arm64_cpu_to_le128(x) 408 409 static void __fpsimd_to_sve(void *sst, struct user_fpsimd_state const *fst, 410 unsigned int vq) 411 { 412 unsigned int i; 413 __uint128_t *p; 414 415 for (i = 0; i < SVE_NUM_ZREGS; ++i) { 416 p = (__uint128_t *)ZREG(sst, vq, i); 417 *p = arm64_cpu_to_le128(fst->vregs[i]); 418 } 419 } 420 421 /* 422 * Transfer the FPSIMD state in task->thread.uw.fpsimd_state to 423 * task->thread.sve_state. 424 * 425 * Task can be a non-runnable task, or current. In the latter case, 426 * the caller must have ownership of the cpu FPSIMD context before calling 427 * this function. 428 * task->thread.sve_state must point to at least sve_state_size(task) 429 * bytes of allocated kernel memory. 430 * task->thread.uw.fpsimd_state must be up to date before calling this 431 * function. 432 */ 433 static void fpsimd_to_sve(struct task_struct *task) 434 { 435 unsigned int vq; 436 void *sst = task->thread.sve_state; 437 struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; 438 439 if (!system_supports_sve()) 440 return; 441 442 vq = sve_vq_from_vl(task->thread.sve_vl); 443 __fpsimd_to_sve(sst, fst, vq); 444 } 445 446 /* 447 * Transfer the SVE state in task->thread.sve_state to 448 * task->thread.uw.fpsimd_state. 449 * 450 * Task can be a non-runnable task, or current. In the latter case, 451 * the caller must have ownership of the cpu FPSIMD context before calling 452 * this function. 453 * task->thread.sve_state must point to at least sve_state_size(task) 454 * bytes of allocated kernel memory. 455 * task->thread.sve_state must be up to date before calling this function. 456 */ 457 static void sve_to_fpsimd(struct task_struct *task) 458 { 459 unsigned int vq; 460 void const *sst = task->thread.sve_state; 461 struct user_fpsimd_state *fst = &task->thread.uw.fpsimd_state; 462 unsigned int i; 463 __uint128_t const *p; 464 465 if (!system_supports_sve()) 466 return; 467 468 vq = sve_vq_from_vl(task->thread.sve_vl); 469 for (i = 0; i < SVE_NUM_ZREGS; ++i) { 470 p = (__uint128_t const *)ZREG(sst, vq, i); 471 fst->vregs[i] = arm64_le128_to_cpu(*p); 472 } 473 } 474 475 #ifdef CONFIG_ARM64_SVE 476 477 /* 478 * Return how many bytes of memory are required to store the full SVE 479 * state for task, given task's currently configured vector length. 480 */ 481 size_t sve_state_size(struct task_struct const *task) 482 { 483 return SVE_SIG_REGS_SIZE(sve_vq_from_vl(task->thread.sve_vl)); 484 } 485 486 /* 487 * Ensure that task->thread.sve_state is allocated and sufficiently large. 488 * 489 * This function should be used only in preparation for replacing 490 * task->thread.sve_state with new data. The memory is always zeroed 491 * here to prevent stale data from showing through: this is done in 492 * the interest of testability and predictability: except in the 493 * do_sve_acc() case, there is no ABI requirement to hide stale data 494 * written previously be task. 495 */ 496 void sve_alloc(struct task_struct *task) 497 { 498 if (task->thread.sve_state) { 499 memset(task->thread.sve_state, 0, sve_state_size(current)); 500 return; 501 } 502 503 /* This is a small allocation (maximum ~8KB) and Should Not Fail. */ 504 task->thread.sve_state = 505 kzalloc(sve_state_size(task), GFP_KERNEL); 506 507 /* 508 * If future SVE revisions can have larger vectors though, 509 * this may cease to be true: 510 */ 511 BUG_ON(!task->thread.sve_state); 512 } 513 514 515 /* 516 * Ensure that task->thread.sve_state is up to date with respect to 517 * the user task, irrespective of when SVE is in use or not. 518 * 519 * This should only be called by ptrace. task must be non-runnable. 520 * task->thread.sve_state must point to at least sve_state_size(task) 521 * bytes of allocated kernel memory. 522 */ 523 void fpsimd_sync_to_sve(struct task_struct *task) 524 { 525 if (!test_tsk_thread_flag(task, TIF_SVE)) 526 fpsimd_to_sve(task); 527 } 528 529 /* 530 * Ensure that task->thread.uw.fpsimd_state is up to date with respect to 531 * the user task, irrespective of whether SVE is in use or not. 532 * 533 * This should only be called by ptrace. task must be non-runnable. 534 * task->thread.sve_state must point to at least sve_state_size(task) 535 * bytes of allocated kernel memory. 536 */ 537 void sve_sync_to_fpsimd(struct task_struct *task) 538 { 539 if (test_tsk_thread_flag(task, TIF_SVE)) 540 sve_to_fpsimd(task); 541 } 542 543 /* 544 * Ensure that task->thread.sve_state is up to date with respect to 545 * the task->thread.uw.fpsimd_state. 546 * 547 * This should only be called by ptrace to merge new FPSIMD register 548 * values into a task for which SVE is currently active. 549 * task must be non-runnable. 550 * task->thread.sve_state must point to at least sve_state_size(task) 551 * bytes of allocated kernel memory. 552 * task->thread.uw.fpsimd_state must already have been initialised with 553 * the new FPSIMD register values to be merged in. 554 */ 555 void sve_sync_from_fpsimd_zeropad(struct task_struct *task) 556 { 557 unsigned int vq; 558 void *sst = task->thread.sve_state; 559 struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; 560 561 if (!test_tsk_thread_flag(task, TIF_SVE)) 562 return; 563 564 vq = sve_vq_from_vl(task->thread.sve_vl); 565 566 memset(sst, 0, SVE_SIG_REGS_SIZE(vq)); 567 __fpsimd_to_sve(sst, fst, vq); 568 } 569 570 int sve_set_vector_length(struct task_struct *task, 571 unsigned long vl, unsigned long flags) 572 { 573 if (flags & ~(unsigned long)(PR_SVE_VL_INHERIT | 574 PR_SVE_SET_VL_ONEXEC)) 575 return -EINVAL; 576 577 if (!sve_vl_valid(vl)) 578 return -EINVAL; 579 580 /* 581 * Clamp to the maximum vector length that VL-agnostic SVE code can 582 * work with. A flag may be assigned in the future to allow setting 583 * of larger vector lengths without confusing older software. 584 */ 585 if (vl > SVE_VL_ARCH_MAX) 586 vl = SVE_VL_ARCH_MAX; 587 588 vl = find_supported_vector_length(vl); 589 590 if (flags & (PR_SVE_VL_INHERIT | 591 PR_SVE_SET_VL_ONEXEC)) 592 task->thread.sve_vl_onexec = vl; 593 else 594 /* Reset VL to system default on next exec: */ 595 task->thread.sve_vl_onexec = 0; 596 597 /* Only actually set the VL if not deferred: */ 598 if (flags & PR_SVE_SET_VL_ONEXEC) 599 goto out; 600 601 if (vl == task->thread.sve_vl) 602 goto out; 603 604 /* 605 * To ensure the FPSIMD bits of the SVE vector registers are preserved, 606 * write any live register state back to task_struct, and convert to a 607 * non-SVE thread. 608 */ 609 if (task == current) { 610 get_cpu_fpsimd_context(); 611 612 fpsimd_save(); 613 } 614 615 fpsimd_flush_task_state(task); 616 if (test_and_clear_tsk_thread_flag(task, TIF_SVE)) 617 sve_to_fpsimd(task); 618 619 if (task == current) 620 put_cpu_fpsimd_context(); 621 622 /* 623 * Force reallocation of task SVE state to the correct size 624 * on next use: 625 */ 626 sve_free(task); 627 628 task->thread.sve_vl = vl; 629 630 out: 631 update_tsk_thread_flag(task, TIF_SVE_VL_INHERIT, 632 flags & PR_SVE_VL_INHERIT); 633 634 return 0; 635 } 636 637 /* 638 * Encode the current vector length and flags for return. 639 * This is only required for prctl(): ptrace has separate fields 640 * 641 * flags are as for sve_set_vector_length(). 642 */ 643 static int sve_prctl_status(unsigned long flags) 644 { 645 int ret; 646 647 if (flags & PR_SVE_SET_VL_ONEXEC) 648 ret = current->thread.sve_vl_onexec; 649 else 650 ret = current->thread.sve_vl; 651 652 if (test_thread_flag(TIF_SVE_VL_INHERIT)) 653 ret |= PR_SVE_VL_INHERIT; 654 655 return ret; 656 } 657 658 /* PR_SVE_SET_VL */ 659 int sve_set_current_vl(unsigned long arg) 660 { 661 unsigned long vl, flags; 662 int ret; 663 664 vl = arg & PR_SVE_VL_LEN_MASK; 665 flags = arg & ~vl; 666 667 if (!system_supports_sve()) 668 return -EINVAL; 669 670 ret = sve_set_vector_length(current, vl, flags); 671 if (ret) 672 return ret; 673 674 return sve_prctl_status(flags); 675 } 676 677 /* PR_SVE_GET_VL */ 678 int sve_get_current_vl(void) 679 { 680 if (!system_supports_sve()) 681 return -EINVAL; 682 683 return sve_prctl_status(0); 684 } 685 686 static void sve_probe_vqs(DECLARE_BITMAP(map, SVE_VQ_MAX)) 687 { 688 unsigned int vq, vl; 689 unsigned long zcr; 690 691 bitmap_zero(map, SVE_VQ_MAX); 692 693 zcr = ZCR_ELx_LEN_MASK; 694 zcr = read_sysreg_s(SYS_ZCR_EL1) & ~zcr; 695 696 for (vq = SVE_VQ_MAX; vq >= SVE_VQ_MIN; --vq) { 697 write_sysreg_s(zcr | (vq - 1), SYS_ZCR_EL1); /* self-syncing */ 698 vl = sve_get_vl(); 699 vq = sve_vq_from_vl(vl); /* skip intervening lengths */ 700 set_bit(__vq_to_bit(vq), map); 701 } 702 } 703 704 /* 705 * Initialise the set of known supported VQs for the boot CPU. 706 * This is called during kernel boot, before secondary CPUs are brought up. 707 */ 708 void __init sve_init_vq_map(void) 709 { 710 sve_probe_vqs(sve_vq_map); 711 bitmap_copy(sve_vq_partial_map, sve_vq_map, SVE_VQ_MAX); 712 } 713 714 /* 715 * If we haven't committed to the set of supported VQs yet, filter out 716 * those not supported by the current CPU. 717 * This function is called during the bring-up of early secondary CPUs only. 718 */ 719 void sve_update_vq_map(void) 720 { 721 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 722 723 sve_probe_vqs(tmp_map); 724 bitmap_and(sve_vq_map, sve_vq_map, tmp_map, SVE_VQ_MAX); 725 bitmap_or(sve_vq_partial_map, sve_vq_partial_map, tmp_map, SVE_VQ_MAX); 726 } 727 728 /* 729 * Check whether the current CPU supports all VQs in the committed set. 730 * This function is called during the bring-up of late secondary CPUs only. 731 */ 732 int sve_verify_vq_map(void) 733 { 734 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 735 unsigned long b; 736 737 sve_probe_vqs(tmp_map); 738 739 bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); 740 if (bitmap_intersects(tmp_map, sve_vq_map, SVE_VQ_MAX)) { 741 pr_warn("SVE: cpu%d: Required vector length(s) missing\n", 742 smp_processor_id()); 743 return -EINVAL; 744 } 745 746 if (!IS_ENABLED(CONFIG_KVM) || !is_hyp_mode_available()) 747 return 0; 748 749 /* 750 * For KVM, it is necessary to ensure that this CPU doesn't 751 * support any vector length that guests may have probed as 752 * unsupported. 753 */ 754 755 /* Recover the set of supported VQs: */ 756 bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); 757 /* Find VQs supported that are not globally supported: */ 758 bitmap_andnot(tmp_map, tmp_map, sve_vq_map, SVE_VQ_MAX); 759 760 /* Find the lowest such VQ, if any: */ 761 b = find_last_bit(tmp_map, SVE_VQ_MAX); 762 if (b >= SVE_VQ_MAX) 763 return 0; /* no mismatches */ 764 765 /* 766 * Mismatches above sve_max_virtualisable_vl are fine, since 767 * no guest is allowed to configure ZCR_EL2.LEN to exceed this: 768 */ 769 if (sve_vl_from_vq(__bit_to_vq(b)) <= sve_max_virtualisable_vl) { 770 pr_warn("SVE: cpu%d: Unsupported vector length(s) present\n", 771 smp_processor_id()); 772 return -EINVAL; 773 } 774 775 return 0; 776 } 777 778 static void __init sve_efi_setup(void) 779 { 780 if (!IS_ENABLED(CONFIG_EFI)) 781 return; 782 783 /* 784 * alloc_percpu() warns and prints a backtrace if this goes wrong. 785 * This is evidence of a crippled system and we are returning void, 786 * so no attempt is made to handle this situation here. 787 */ 788 if (!sve_vl_valid(sve_max_vl)) 789 goto fail; 790 791 efi_sve_state = __alloc_percpu( 792 SVE_SIG_REGS_SIZE(sve_vq_from_vl(sve_max_vl)), SVE_VQ_BYTES); 793 if (!efi_sve_state) 794 goto fail; 795 796 return; 797 798 fail: 799 panic("Cannot allocate percpu memory for EFI SVE save/restore"); 800 } 801 802 /* 803 * Enable SVE for EL1. 804 * Intended for use by the cpufeatures code during CPU boot. 805 */ 806 void sve_kernel_enable(const struct arm64_cpu_capabilities *__always_unused p) 807 { 808 write_sysreg(read_sysreg(CPACR_EL1) | CPACR_EL1_ZEN_EL1EN, CPACR_EL1); 809 isb(); 810 } 811 812 /* 813 * Read the pseudo-ZCR used by cpufeatures to identify the supported SVE 814 * vector length. 815 * 816 * Use only if SVE is present. 817 * This function clobbers the SVE vector length. 818 */ 819 u64 read_zcr_features(void) 820 { 821 u64 zcr; 822 unsigned int vq_max; 823 824 /* 825 * Set the maximum possible VL, and write zeroes to all other 826 * bits to see if they stick. 827 */ 828 sve_kernel_enable(NULL); 829 write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL1); 830 831 zcr = read_sysreg_s(SYS_ZCR_EL1); 832 zcr &= ~(u64)ZCR_ELx_LEN_MASK; /* find sticky 1s outside LEN field */ 833 vq_max = sve_vq_from_vl(sve_get_vl()); 834 zcr |= vq_max - 1; /* set LEN field to maximum effective value */ 835 836 return zcr; 837 } 838 839 void __init sve_setup(void) 840 { 841 u64 zcr; 842 DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); 843 unsigned long b; 844 845 if (!system_supports_sve()) 846 return; 847 848 /* 849 * The SVE architecture mandates support for 128-bit vectors, 850 * so sve_vq_map must have at least SVE_VQ_MIN set. 851 * If something went wrong, at least try to patch it up: 852 */ 853 if (WARN_ON(!test_bit(__vq_to_bit(SVE_VQ_MIN), sve_vq_map))) 854 set_bit(__vq_to_bit(SVE_VQ_MIN), sve_vq_map); 855 856 zcr = read_sanitised_ftr_reg(SYS_ZCR_EL1); 857 sve_max_vl = sve_vl_from_vq((zcr & ZCR_ELx_LEN_MASK) + 1); 858 859 /* 860 * Sanity-check that the max VL we determined through CPU features 861 * corresponds properly to sve_vq_map. If not, do our best: 862 */ 863 if (WARN_ON(sve_max_vl != find_supported_vector_length(sve_max_vl))) 864 sve_max_vl = find_supported_vector_length(sve_max_vl); 865 866 /* 867 * For the default VL, pick the maximum supported value <= 64. 868 * VL == 64 is guaranteed not to grow the signal frame. 869 */ 870 sve_default_vl = find_supported_vector_length(64); 871 872 bitmap_andnot(tmp_map, sve_vq_partial_map, sve_vq_map, 873 SVE_VQ_MAX); 874 875 b = find_last_bit(tmp_map, SVE_VQ_MAX); 876 if (b >= SVE_VQ_MAX) 877 /* No non-virtualisable VLs found */ 878 sve_max_virtualisable_vl = SVE_VQ_MAX; 879 else if (WARN_ON(b == SVE_VQ_MAX - 1)) 880 /* No virtualisable VLs? This is architecturally forbidden. */ 881 sve_max_virtualisable_vl = SVE_VQ_MIN; 882 else /* b + 1 < SVE_VQ_MAX */ 883 sve_max_virtualisable_vl = sve_vl_from_vq(__bit_to_vq(b + 1)); 884 885 if (sve_max_virtualisable_vl > sve_max_vl) 886 sve_max_virtualisable_vl = sve_max_vl; 887 888 pr_info("SVE: maximum available vector length %u bytes per vector\n", 889 sve_max_vl); 890 pr_info("SVE: default vector length %u bytes per vector\n", 891 sve_default_vl); 892 893 /* KVM decides whether to support mismatched systems. Just warn here: */ 894 if (sve_max_virtualisable_vl < sve_max_vl) 895 pr_warn("SVE: unvirtualisable vector lengths present\n"); 896 897 sve_efi_setup(); 898 } 899 900 /* 901 * Called from the put_task_struct() path, which cannot get here 902 * unless dead_task is really dead and not schedulable. 903 */ 904 void fpsimd_release_task(struct task_struct *dead_task) 905 { 906 __sve_free(dead_task); 907 } 908 909 #endif /* CONFIG_ARM64_SVE */ 910 911 /* 912 * Trapped SVE access 913 * 914 * Storage is allocated for the full SVE state, the current FPSIMD 915 * register contents are migrated across, and TIF_SVE is set so that 916 * the SVE access trap will be disabled the next time this task 917 * reaches ret_to_user. 918 * 919 * TIF_SVE should be clear on entry: otherwise, task_fpsimd_load() 920 * would have disabled the SVE access trap for userspace during 921 * ret_to_user, making an SVE access trap impossible in that case. 922 */ 923 asmlinkage void do_sve_acc(unsigned int esr, struct pt_regs *regs) 924 { 925 /* Even if we chose not to use SVE, the hardware could still trap: */ 926 if (unlikely(!system_supports_sve()) || WARN_ON(is_compat_task())) { 927 force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc); 928 return; 929 } 930 931 sve_alloc(current); 932 933 get_cpu_fpsimd_context(); 934 935 fpsimd_save(); 936 937 /* Force ret_to_user to reload the registers: */ 938 fpsimd_flush_task_state(current); 939 940 fpsimd_to_sve(current); 941 if (test_and_set_thread_flag(TIF_SVE)) 942 WARN_ON(1); /* SVE access shouldn't have trapped */ 943 944 put_cpu_fpsimd_context(); 945 } 946 947 /* 948 * Trapped FP/ASIMD access. 949 */ 950 asmlinkage void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs) 951 { 952 /* TODO: implement lazy context saving/restoring */ 953 WARN_ON(1); 954 } 955 956 /* 957 * Raise a SIGFPE for the current process. 958 */ 959 asmlinkage void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs) 960 { 961 unsigned int si_code = FPE_FLTUNK; 962 963 if (esr & ESR_ELx_FP_EXC_TFV) { 964 if (esr & FPEXC_IOF) 965 si_code = FPE_FLTINV; 966 else if (esr & FPEXC_DZF) 967 si_code = FPE_FLTDIV; 968 else if (esr & FPEXC_OFF) 969 si_code = FPE_FLTOVF; 970 else if (esr & FPEXC_UFF) 971 si_code = FPE_FLTUND; 972 else if (esr & FPEXC_IXF) 973 si_code = FPE_FLTRES; 974 } 975 976 send_sig_fault(SIGFPE, si_code, 977 (void __user *)instruction_pointer(regs), 978 current); 979 } 980 981 void fpsimd_thread_switch(struct task_struct *next) 982 { 983 bool wrong_task, wrong_cpu; 984 985 if (!system_supports_fpsimd()) 986 return; 987 988 __get_cpu_fpsimd_context(); 989 990 /* Save unsaved fpsimd state, if any: */ 991 fpsimd_save(); 992 993 /* 994 * Fix up TIF_FOREIGN_FPSTATE to correctly describe next's 995 * state. For kernel threads, FPSIMD registers are never loaded 996 * and wrong_task and wrong_cpu will always be true. 997 */ 998 wrong_task = __this_cpu_read(fpsimd_last_state.st) != 999 &next->thread.uw.fpsimd_state; 1000 wrong_cpu = next->thread.fpsimd_cpu != smp_processor_id(); 1001 1002 update_tsk_thread_flag(next, TIF_FOREIGN_FPSTATE, 1003 wrong_task || wrong_cpu); 1004 1005 __put_cpu_fpsimd_context(); 1006 } 1007 1008 void fpsimd_flush_thread(void) 1009 { 1010 int vl, supported_vl; 1011 1012 if (!system_supports_fpsimd()) 1013 return; 1014 1015 get_cpu_fpsimd_context(); 1016 1017 fpsimd_flush_task_state(current); 1018 memset(¤t->thread.uw.fpsimd_state, 0, 1019 sizeof(current->thread.uw.fpsimd_state)); 1020 1021 if (system_supports_sve()) { 1022 clear_thread_flag(TIF_SVE); 1023 sve_free(current); 1024 1025 /* 1026 * Reset the task vector length as required. 1027 * This is where we ensure that all user tasks have a valid 1028 * vector length configured: no kernel task can become a user 1029 * task without an exec and hence a call to this function. 1030 * By the time the first call to this function is made, all 1031 * early hardware probing is complete, so sve_default_vl 1032 * should be valid. 1033 * If a bug causes this to go wrong, we make some noise and 1034 * try to fudge thread.sve_vl to a safe value here. 1035 */ 1036 vl = current->thread.sve_vl_onexec ? 1037 current->thread.sve_vl_onexec : sve_default_vl; 1038 1039 if (WARN_ON(!sve_vl_valid(vl))) 1040 vl = SVE_VL_MIN; 1041 1042 supported_vl = find_supported_vector_length(vl); 1043 if (WARN_ON(supported_vl != vl)) 1044 vl = supported_vl; 1045 1046 current->thread.sve_vl = vl; 1047 1048 /* 1049 * If the task is not set to inherit, ensure that the vector 1050 * length will be reset by a subsequent exec: 1051 */ 1052 if (!test_thread_flag(TIF_SVE_VL_INHERIT)) 1053 current->thread.sve_vl_onexec = 0; 1054 } 1055 1056 put_cpu_fpsimd_context(); 1057 } 1058 1059 /* 1060 * Save the userland FPSIMD state of 'current' to memory, but only if the state 1061 * currently held in the registers does in fact belong to 'current' 1062 */ 1063 void fpsimd_preserve_current_state(void) 1064 { 1065 if (!system_supports_fpsimd()) 1066 return; 1067 1068 get_cpu_fpsimd_context(); 1069 fpsimd_save(); 1070 put_cpu_fpsimd_context(); 1071 } 1072 1073 /* 1074 * Like fpsimd_preserve_current_state(), but ensure that 1075 * current->thread.uw.fpsimd_state is updated so that it can be copied to 1076 * the signal frame. 1077 */ 1078 void fpsimd_signal_preserve_current_state(void) 1079 { 1080 fpsimd_preserve_current_state(); 1081 if (system_supports_sve() && test_thread_flag(TIF_SVE)) 1082 sve_to_fpsimd(current); 1083 } 1084 1085 /* 1086 * Associate current's FPSIMD context with this cpu 1087 * The caller must have ownership of the cpu FPSIMD context before calling 1088 * this function. 1089 */ 1090 void fpsimd_bind_task_to_cpu(void) 1091 { 1092 struct fpsimd_last_state_struct *last = 1093 this_cpu_ptr(&fpsimd_last_state); 1094 1095 last->st = ¤t->thread.uw.fpsimd_state; 1096 last->sve_state = current->thread.sve_state; 1097 last->sve_vl = current->thread.sve_vl; 1098 current->thread.fpsimd_cpu = smp_processor_id(); 1099 1100 if (system_supports_sve()) { 1101 /* Toggle SVE trapping for userspace if needed */ 1102 if (test_thread_flag(TIF_SVE)) 1103 sve_user_enable(); 1104 else 1105 sve_user_disable(); 1106 1107 /* Serialised by exception return to user */ 1108 } 1109 } 1110 1111 void fpsimd_bind_state_to_cpu(struct user_fpsimd_state *st, void *sve_state, 1112 unsigned int sve_vl) 1113 { 1114 struct fpsimd_last_state_struct *last = 1115 this_cpu_ptr(&fpsimd_last_state); 1116 1117 WARN_ON(!in_softirq() && !irqs_disabled()); 1118 1119 last->st = st; 1120 last->sve_state = sve_state; 1121 last->sve_vl = sve_vl; 1122 } 1123 1124 /* 1125 * Load the userland FPSIMD state of 'current' from memory, but only if the 1126 * FPSIMD state already held in the registers is /not/ the most recent FPSIMD 1127 * state of 'current' 1128 */ 1129 void fpsimd_restore_current_state(void) 1130 { 1131 if (!system_supports_fpsimd()) 1132 return; 1133 1134 get_cpu_fpsimd_context(); 1135 1136 if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) { 1137 task_fpsimd_load(); 1138 fpsimd_bind_task_to_cpu(); 1139 } 1140 1141 put_cpu_fpsimd_context(); 1142 } 1143 1144 /* 1145 * Load an updated userland FPSIMD state for 'current' from memory and set the 1146 * flag that indicates that the FPSIMD register contents are the most recent 1147 * FPSIMD state of 'current' 1148 */ 1149 void fpsimd_update_current_state(struct user_fpsimd_state const *state) 1150 { 1151 if (!system_supports_fpsimd()) 1152 return; 1153 1154 get_cpu_fpsimd_context(); 1155 1156 current->thread.uw.fpsimd_state = *state; 1157 if (system_supports_sve() && test_thread_flag(TIF_SVE)) 1158 fpsimd_to_sve(current); 1159 1160 task_fpsimd_load(); 1161 fpsimd_bind_task_to_cpu(); 1162 1163 clear_thread_flag(TIF_FOREIGN_FPSTATE); 1164 1165 put_cpu_fpsimd_context(); 1166 } 1167 1168 /* 1169 * Invalidate live CPU copies of task t's FPSIMD state 1170 * 1171 * This function may be called with preemption enabled. The barrier() 1172 * ensures that the assignment to fpsimd_cpu is visible to any 1173 * preemption/softirq that could race with set_tsk_thread_flag(), so 1174 * that TIF_FOREIGN_FPSTATE cannot be spuriously re-cleared. 1175 * 1176 * The final barrier ensures that TIF_FOREIGN_FPSTATE is seen set by any 1177 * subsequent code. 1178 */ 1179 void fpsimd_flush_task_state(struct task_struct *t) 1180 { 1181 t->thread.fpsimd_cpu = NR_CPUS; 1182 1183 barrier(); 1184 set_tsk_thread_flag(t, TIF_FOREIGN_FPSTATE); 1185 1186 barrier(); 1187 } 1188 1189 /* 1190 * Invalidate any task's FPSIMD state that is present on this cpu. 1191 * The FPSIMD context should be acquired with get_cpu_fpsimd_context() 1192 * before calling this function. 1193 */ 1194 static void fpsimd_flush_cpu_state(void) 1195 { 1196 __this_cpu_write(fpsimd_last_state.st, NULL); 1197 set_thread_flag(TIF_FOREIGN_FPSTATE); 1198 } 1199 1200 /* 1201 * Save the FPSIMD state to memory and invalidate cpu view. 1202 * This function must be called with preemption disabled. 1203 */ 1204 void fpsimd_save_and_flush_cpu_state(void) 1205 { 1206 WARN_ON(preemptible()); 1207 __get_cpu_fpsimd_context(); 1208 fpsimd_save(); 1209 fpsimd_flush_cpu_state(); 1210 __put_cpu_fpsimd_context(); 1211 } 1212 1213 #ifdef CONFIG_KERNEL_MODE_NEON 1214 1215 /* 1216 * Kernel-side NEON support functions 1217 */ 1218 1219 /* 1220 * kernel_neon_begin(): obtain the CPU FPSIMD registers for use by the calling 1221 * context 1222 * 1223 * Must not be called unless may_use_simd() returns true. 1224 * Task context in the FPSIMD registers is saved back to memory as necessary. 1225 * 1226 * A matching call to kernel_neon_end() must be made before returning from the 1227 * calling context. 1228 * 1229 * The caller may freely use the FPSIMD registers until kernel_neon_end() is 1230 * called. 1231 */ 1232 void kernel_neon_begin(void) 1233 { 1234 if (WARN_ON(!system_supports_fpsimd())) 1235 return; 1236 1237 BUG_ON(!may_use_simd()); 1238 1239 get_cpu_fpsimd_context(); 1240 1241 /* Save unsaved fpsimd state, if any: */ 1242 fpsimd_save(); 1243 1244 /* Invalidate any task state remaining in the fpsimd regs: */ 1245 fpsimd_flush_cpu_state(); 1246 } 1247 EXPORT_SYMBOL(kernel_neon_begin); 1248 1249 /* 1250 * kernel_neon_end(): give the CPU FPSIMD registers back to the current task 1251 * 1252 * Must be called from a context in which kernel_neon_begin() was previously 1253 * called, with no call to kernel_neon_end() in the meantime. 1254 * 1255 * The caller must not use the FPSIMD registers after this function is called, 1256 * unless kernel_neon_begin() is called again in the meantime. 1257 */ 1258 void kernel_neon_end(void) 1259 { 1260 if (!system_supports_fpsimd()) 1261 return; 1262 1263 put_cpu_fpsimd_context(); 1264 } 1265 EXPORT_SYMBOL(kernel_neon_end); 1266 1267 #ifdef CONFIG_EFI 1268 1269 static DEFINE_PER_CPU(struct user_fpsimd_state, efi_fpsimd_state); 1270 static DEFINE_PER_CPU(bool, efi_fpsimd_state_used); 1271 static DEFINE_PER_CPU(bool, efi_sve_state_used); 1272 1273 /* 1274 * EFI runtime services support functions 1275 * 1276 * The ABI for EFI runtime services allows EFI to use FPSIMD during the call. 1277 * This means that for EFI (and only for EFI), we have to assume that FPSIMD 1278 * is always used rather than being an optional accelerator. 1279 * 1280 * These functions provide the necessary support for ensuring FPSIMD 1281 * save/restore in the contexts from which EFI is used. 1282 * 1283 * Do not use them for any other purpose -- if tempted to do so, you are 1284 * either doing something wrong or you need to propose some refactoring. 1285 */ 1286 1287 /* 1288 * __efi_fpsimd_begin(): prepare FPSIMD for making an EFI runtime services call 1289 */ 1290 void __efi_fpsimd_begin(void) 1291 { 1292 if (!system_supports_fpsimd()) 1293 return; 1294 1295 WARN_ON(preemptible()); 1296 1297 if (may_use_simd()) { 1298 kernel_neon_begin(); 1299 } else { 1300 /* 1301 * If !efi_sve_state, SVE can't be in use yet and doesn't need 1302 * preserving: 1303 */ 1304 if (system_supports_sve() && likely(efi_sve_state)) { 1305 char *sve_state = this_cpu_ptr(efi_sve_state); 1306 1307 __this_cpu_write(efi_sve_state_used, true); 1308 1309 sve_save_state(sve_state + sve_ffr_offset(sve_max_vl), 1310 &this_cpu_ptr(&efi_fpsimd_state)->fpsr); 1311 } else { 1312 fpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state)); 1313 } 1314 1315 __this_cpu_write(efi_fpsimd_state_used, true); 1316 } 1317 } 1318 1319 /* 1320 * __efi_fpsimd_end(): clean up FPSIMD after an EFI runtime services call 1321 */ 1322 void __efi_fpsimd_end(void) 1323 { 1324 if (!system_supports_fpsimd()) 1325 return; 1326 1327 if (!__this_cpu_xchg(efi_fpsimd_state_used, false)) { 1328 kernel_neon_end(); 1329 } else { 1330 if (system_supports_sve() && 1331 likely(__this_cpu_read(efi_sve_state_used))) { 1332 char const *sve_state = this_cpu_ptr(efi_sve_state); 1333 1334 sve_load_state(sve_state + sve_ffr_offset(sve_max_vl), 1335 &this_cpu_ptr(&efi_fpsimd_state)->fpsr, 1336 sve_vq_from_vl(sve_get_vl()) - 1); 1337 1338 __this_cpu_write(efi_sve_state_used, false); 1339 } else { 1340 fpsimd_load_state(this_cpu_ptr(&efi_fpsimd_state)); 1341 } 1342 } 1343 } 1344 1345 #endif /* CONFIG_EFI */ 1346 1347 #endif /* CONFIG_KERNEL_MODE_NEON */ 1348 1349 #ifdef CONFIG_CPU_PM 1350 static int fpsimd_cpu_pm_notifier(struct notifier_block *self, 1351 unsigned long cmd, void *v) 1352 { 1353 switch (cmd) { 1354 case CPU_PM_ENTER: 1355 fpsimd_save_and_flush_cpu_state(); 1356 break; 1357 case CPU_PM_EXIT: 1358 break; 1359 case CPU_PM_ENTER_FAILED: 1360 default: 1361 return NOTIFY_DONE; 1362 } 1363 return NOTIFY_OK; 1364 } 1365 1366 static struct notifier_block fpsimd_cpu_pm_notifier_block = { 1367 .notifier_call = fpsimd_cpu_pm_notifier, 1368 }; 1369 1370 static void __init fpsimd_pm_init(void) 1371 { 1372 cpu_pm_register_notifier(&fpsimd_cpu_pm_notifier_block); 1373 } 1374 1375 #else 1376 static inline void fpsimd_pm_init(void) { } 1377 #endif /* CONFIG_CPU_PM */ 1378 1379 #ifdef CONFIG_HOTPLUG_CPU 1380 static int fpsimd_cpu_dead(unsigned int cpu) 1381 { 1382 per_cpu(fpsimd_last_state.st, cpu) = NULL; 1383 return 0; 1384 } 1385 1386 static inline void fpsimd_hotplug_init(void) 1387 { 1388 cpuhp_setup_state_nocalls(CPUHP_ARM64_FPSIMD_DEAD, "arm64/fpsimd:dead", 1389 NULL, fpsimd_cpu_dead); 1390 } 1391 1392 #else 1393 static inline void fpsimd_hotplug_init(void) { } 1394 #endif 1395 1396 /* 1397 * FP/SIMD support code initialisation. 1398 */ 1399 static int __init fpsimd_init(void) 1400 { 1401 if (cpu_have_named_feature(FP)) { 1402 fpsimd_pm_init(); 1403 fpsimd_hotplug_init(); 1404 } else { 1405 pr_notice("Floating-point is not implemented\n"); 1406 } 1407 1408 if (!cpu_have_named_feature(ASIMD)) 1409 pr_notice("Advanced SIMD is not implemented\n"); 1410 1411 return sve_sysctl_init(); 1412 } 1413 core_initcall(fpsimd_init); 1414