1 /*
2  * ARMv8 single-step debug support and mdscr context switching.
3  *
4  * Copyright (C) 2012 ARM Limited
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  * Author: Will Deacon <will.deacon@arm.com>
19  */
20 
21 #include <linux/cpu.h>
22 #include <linux/debugfs.h>
23 #include <linux/hardirq.h>
24 #include <linux/init.h>
25 #include <linux/ptrace.h>
26 #include <linux/stat.h>
27 #include <linux/uaccess.h>
28 
29 #include <asm/debug-monitors.h>
30 #include <asm/cputype.h>
31 #include <asm/system_misc.h>
32 
33 /* Low-level stepping controls. */
34 #define DBG_MDSCR_SS		(1 << 0)
35 #define DBG_SPSR_SS		(1 << 21)
36 
37 /* MDSCR_EL1 enabling bits */
38 #define DBG_MDSCR_KDE		(1 << 13)
39 #define DBG_MDSCR_MDE		(1 << 15)
40 #define DBG_MDSCR_MASK		~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
41 
42 /* Determine debug architecture. */
43 u8 debug_monitors_arch(void)
44 {
45 	return read_cpuid(ID_AA64DFR0_EL1) & 0xf;
46 }
47 
48 /*
49  * MDSCR access routines.
50  */
51 static void mdscr_write(u32 mdscr)
52 {
53 	unsigned long flags;
54 	local_dbg_save(flags);
55 	asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
56 	local_dbg_restore(flags);
57 }
58 
59 static u32 mdscr_read(void)
60 {
61 	u32 mdscr;
62 	asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
63 	return mdscr;
64 }
65 
66 /*
67  * Allow root to disable self-hosted debug from userspace.
68  * This is useful if you want to connect an external JTAG debugger.
69  */
70 static u32 debug_enabled = 1;
71 
72 static int create_debug_debugfs_entry(void)
73 {
74 	debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
75 	return 0;
76 }
77 fs_initcall(create_debug_debugfs_entry);
78 
79 static int __init early_debug_disable(char *buf)
80 {
81 	debug_enabled = 0;
82 	return 0;
83 }
84 
85 early_param("nodebugmon", early_debug_disable);
86 
87 /*
88  * Keep track of debug users on each core.
89  * The ref counts are per-cpu so we use a local_t type.
90  */
91 static DEFINE_PER_CPU(int, mde_ref_count);
92 static DEFINE_PER_CPU(int, kde_ref_count);
93 
94 void enable_debug_monitors(enum debug_el el)
95 {
96 	u32 mdscr, enable = 0;
97 
98 	WARN_ON(preemptible());
99 
100 	if (this_cpu_inc_return(mde_ref_count) == 1)
101 		enable = DBG_MDSCR_MDE;
102 
103 	if (el == DBG_ACTIVE_EL1 &&
104 	    this_cpu_inc_return(kde_ref_count) == 1)
105 		enable |= DBG_MDSCR_KDE;
106 
107 	if (enable && debug_enabled) {
108 		mdscr = mdscr_read();
109 		mdscr |= enable;
110 		mdscr_write(mdscr);
111 	}
112 }
113 
114 void disable_debug_monitors(enum debug_el el)
115 {
116 	u32 mdscr, disable = 0;
117 
118 	WARN_ON(preemptible());
119 
120 	if (this_cpu_dec_return(mde_ref_count) == 0)
121 		disable = ~DBG_MDSCR_MDE;
122 
123 	if (el == DBG_ACTIVE_EL1 &&
124 	    this_cpu_dec_return(kde_ref_count) == 0)
125 		disable &= ~DBG_MDSCR_KDE;
126 
127 	if (disable) {
128 		mdscr = mdscr_read();
129 		mdscr &= disable;
130 		mdscr_write(mdscr);
131 	}
132 }
133 
134 /*
135  * OS lock clearing.
136  */
137 static void clear_os_lock(void *unused)
138 {
139 	asm volatile("msr oslar_el1, %0" : : "r" (0));
140 	isb();
141 	local_dbg_enable();
142 }
143 
144 static int os_lock_notify(struct notifier_block *self,
145 				    unsigned long action, void *data)
146 {
147 	int cpu = (unsigned long)data;
148 	if (action == CPU_ONLINE)
149 		smp_call_function_single(cpu, clear_os_lock, NULL, 1);
150 	return NOTIFY_OK;
151 }
152 
153 static struct notifier_block os_lock_nb = {
154 	.notifier_call = os_lock_notify,
155 };
156 
157 static int debug_monitors_init(void)
158 {
159 	/* Clear the OS lock. */
160 	smp_call_function(clear_os_lock, NULL, 1);
161 	clear_os_lock(NULL);
162 
163 	/* Register hotplug handler. */
164 	register_cpu_notifier(&os_lock_nb);
165 	return 0;
166 }
167 postcore_initcall(debug_monitors_init);
168 
169 /*
170  * Single step API and exception handling.
171  */
172 static void set_regs_spsr_ss(struct pt_regs *regs)
173 {
174 	unsigned long spsr;
175 
176 	spsr = regs->pstate;
177 	spsr &= ~DBG_SPSR_SS;
178 	spsr |= DBG_SPSR_SS;
179 	regs->pstate = spsr;
180 }
181 
182 static void clear_regs_spsr_ss(struct pt_regs *regs)
183 {
184 	unsigned long spsr;
185 
186 	spsr = regs->pstate;
187 	spsr &= ~DBG_SPSR_SS;
188 	regs->pstate = spsr;
189 }
190 
191 /* EL1 Single Step Handler hooks */
192 static LIST_HEAD(step_hook);
193 DEFINE_RWLOCK(step_hook_lock);
194 
195 void register_step_hook(struct step_hook *hook)
196 {
197 	write_lock(&step_hook_lock);
198 	list_add(&hook->node, &step_hook);
199 	write_unlock(&step_hook_lock);
200 }
201 
202 void unregister_step_hook(struct step_hook *hook)
203 {
204 	write_lock(&step_hook_lock);
205 	list_del(&hook->node);
206 	write_unlock(&step_hook_lock);
207 }
208 
209 /*
210  * Call registered single step handers
211  * There is no Syndrome info to check for determining the handler.
212  * So we call all the registered handlers, until the right handler is
213  * found which returns zero.
214  */
215 static int call_step_hook(struct pt_regs *regs, unsigned int esr)
216 {
217 	struct step_hook *hook;
218 	int retval = DBG_HOOK_ERROR;
219 
220 	read_lock(&step_hook_lock);
221 
222 	list_for_each_entry(hook, &step_hook, node)	{
223 		retval = hook->fn(regs, esr);
224 		if (retval == DBG_HOOK_HANDLED)
225 			break;
226 	}
227 
228 	read_unlock(&step_hook_lock);
229 
230 	return retval;
231 }
232 
233 static int single_step_handler(unsigned long addr, unsigned int esr,
234 			       struct pt_regs *regs)
235 {
236 	siginfo_t info;
237 
238 	/*
239 	 * If we are stepping a pending breakpoint, call the hw_breakpoint
240 	 * handler first.
241 	 */
242 	if (!reinstall_suspended_bps(regs))
243 		return 0;
244 
245 	if (user_mode(regs)) {
246 		info.si_signo = SIGTRAP;
247 		info.si_errno = 0;
248 		info.si_code  = TRAP_HWBKPT;
249 		info.si_addr  = (void __user *)instruction_pointer(regs);
250 		force_sig_info(SIGTRAP, &info, current);
251 
252 		/*
253 		 * ptrace will disable single step unless explicitly
254 		 * asked to re-enable it. For other clients, it makes
255 		 * sense to leave it enabled (i.e. rewind the controls
256 		 * to the active-not-pending state).
257 		 */
258 		user_rewind_single_step(current);
259 	} else {
260 		if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
261 			return 0;
262 
263 		pr_warning("Unexpected kernel single-step exception at EL1\n");
264 		/*
265 		 * Re-enable stepping since we know that we will be
266 		 * returning to regs.
267 		 */
268 		set_regs_spsr_ss(regs);
269 	}
270 
271 	return 0;
272 }
273 
274 /*
275  * Breakpoint handler is re-entrant as another breakpoint can
276  * hit within breakpoint handler, especically in kprobes.
277  * Use reader/writer locks instead of plain spinlock.
278  */
279 static LIST_HEAD(break_hook);
280 DEFINE_RWLOCK(break_hook_lock);
281 
282 void register_break_hook(struct break_hook *hook)
283 {
284 	write_lock(&break_hook_lock);
285 	list_add(&hook->node, &break_hook);
286 	write_unlock(&break_hook_lock);
287 }
288 
289 void unregister_break_hook(struct break_hook *hook)
290 {
291 	write_lock(&break_hook_lock);
292 	list_del(&hook->node);
293 	write_unlock(&break_hook_lock);
294 }
295 
296 static int call_break_hook(struct pt_regs *regs, unsigned int esr)
297 {
298 	struct break_hook *hook;
299 	int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;
300 
301 	read_lock(&break_hook_lock);
302 	list_for_each_entry(hook, &break_hook, node)
303 		if ((esr & hook->esr_mask) == hook->esr_val)
304 			fn = hook->fn;
305 	read_unlock(&break_hook_lock);
306 
307 	return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
308 }
309 
310 static int brk_handler(unsigned long addr, unsigned int esr,
311 		       struct pt_regs *regs)
312 {
313 	siginfo_t info;
314 
315 	if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED)
316 		return 0;
317 
318 	pr_warn("unexpected brk exception at %lx, esr=0x%x\n",
319 			(long)instruction_pointer(regs), esr);
320 
321 	if (!user_mode(regs))
322 		return -EFAULT;
323 
324 	info = (siginfo_t) {
325 		.si_signo = SIGTRAP,
326 		.si_errno = 0,
327 		.si_code  = TRAP_BRKPT,
328 		.si_addr  = (void __user *)instruction_pointer(regs),
329 	};
330 
331 	force_sig_info(SIGTRAP, &info, current);
332 	return 0;
333 }
334 
335 int aarch32_break_handler(struct pt_regs *regs)
336 {
337 	siginfo_t info;
338 	u32 arm_instr;
339 	u16 thumb_instr;
340 	bool bp = false;
341 	void __user *pc = (void __user *)instruction_pointer(regs);
342 
343 	if (!compat_user_mode(regs))
344 		return -EFAULT;
345 
346 	if (compat_thumb_mode(regs)) {
347 		/* get 16-bit Thumb instruction */
348 		get_user(thumb_instr, (u16 __user *)pc);
349 		thumb_instr = le16_to_cpu(thumb_instr);
350 		if (thumb_instr == AARCH32_BREAK_THUMB2_LO) {
351 			/* get second half of 32-bit Thumb-2 instruction */
352 			get_user(thumb_instr, (u16 __user *)(pc + 2));
353 			thumb_instr = le16_to_cpu(thumb_instr);
354 			bp = thumb_instr == AARCH32_BREAK_THUMB2_HI;
355 		} else {
356 			bp = thumb_instr == AARCH32_BREAK_THUMB;
357 		}
358 	} else {
359 		/* 32-bit ARM instruction */
360 		get_user(arm_instr, (u32 __user *)pc);
361 		arm_instr = le32_to_cpu(arm_instr);
362 		bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM;
363 	}
364 
365 	if (!bp)
366 		return -EFAULT;
367 
368 	info = (siginfo_t) {
369 		.si_signo = SIGTRAP,
370 		.si_errno = 0,
371 		.si_code  = TRAP_BRKPT,
372 		.si_addr  = pc,
373 	};
374 
375 	force_sig_info(SIGTRAP, &info, current);
376 	return 0;
377 }
378 
379 static int __init debug_traps_init(void)
380 {
381 	hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
382 			      TRAP_HWBKPT, "single-step handler");
383 	hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
384 			      TRAP_BRKPT, "ptrace BRK handler");
385 	return 0;
386 }
387 arch_initcall(debug_traps_init);
388 
389 /* Re-enable single step for syscall restarting. */
390 void user_rewind_single_step(struct task_struct *task)
391 {
392 	/*
393 	 * If single step is active for this thread, then set SPSR.SS
394 	 * to 1 to avoid returning to the active-pending state.
395 	 */
396 	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
397 		set_regs_spsr_ss(task_pt_regs(task));
398 }
399 
400 void user_fastforward_single_step(struct task_struct *task)
401 {
402 	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
403 		clear_regs_spsr_ss(task_pt_regs(task));
404 }
405 
406 /* Kernel API */
407 void kernel_enable_single_step(struct pt_regs *regs)
408 {
409 	WARN_ON(!irqs_disabled());
410 	set_regs_spsr_ss(regs);
411 	mdscr_write(mdscr_read() | DBG_MDSCR_SS);
412 	enable_debug_monitors(DBG_ACTIVE_EL1);
413 }
414 
415 void kernel_disable_single_step(void)
416 {
417 	WARN_ON(!irqs_disabled());
418 	mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
419 	disable_debug_monitors(DBG_ACTIVE_EL1);
420 }
421 
422 int kernel_active_single_step(void)
423 {
424 	WARN_ON(!irqs_disabled());
425 	return mdscr_read() & DBG_MDSCR_SS;
426 }
427 
428 /* ptrace API */
429 void user_enable_single_step(struct task_struct *task)
430 {
431 	set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
432 	set_regs_spsr_ss(task_pt_regs(task));
433 }
434 
435 void user_disable_single_step(struct task_struct *task)
436 {
437 	clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
438 }
439