1 /*
2  * ARMv8 single-step debug support and mdscr context switching.
3  *
4  * Copyright (C) 2012 ARM Limited
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  * Author: Will Deacon <will.deacon@arm.com>
19  */
20 
21 #include <linux/cpu.h>
22 #include <linux/debugfs.h>
23 #include <linux/hardirq.h>
24 #include <linux/init.h>
25 #include <linux/ptrace.h>
26 #include <linux/stat.h>
27 #include <linux/uaccess.h>
28 
29 #include <asm/debug-monitors.h>
30 #include <asm/cputype.h>
31 #include <asm/system_misc.h>
32 
33 /* Low-level stepping controls. */
34 #define DBG_MDSCR_SS		(1 << 0)
35 #define DBG_SPSR_SS		(1 << 21)
36 
37 /* MDSCR_EL1 enabling bits */
38 #define DBG_MDSCR_KDE		(1 << 13)
39 #define DBG_MDSCR_MDE		(1 << 15)
40 #define DBG_MDSCR_MASK		~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
41 
42 /* Determine debug architecture. */
43 u8 debug_monitors_arch(void)
44 {
45 	return read_cpuid(ID_AA64DFR0_EL1) & 0xf;
46 }
47 
48 /*
49  * MDSCR access routines.
50  */
51 static void mdscr_write(u32 mdscr)
52 {
53 	unsigned long flags;
54 	local_dbg_save(flags);
55 	asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
56 	local_dbg_restore(flags);
57 }
58 
59 static u32 mdscr_read(void)
60 {
61 	u32 mdscr;
62 	asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
63 	return mdscr;
64 }
65 
66 /*
67  * Allow root to disable self-hosted debug from userspace.
68  * This is useful if you want to connect an external JTAG debugger.
69  */
70 static u32 debug_enabled = 1;
71 
72 static int create_debug_debugfs_entry(void)
73 {
74 	debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
75 	return 0;
76 }
77 fs_initcall(create_debug_debugfs_entry);
78 
79 static int __init early_debug_disable(char *buf)
80 {
81 	debug_enabled = 0;
82 	return 0;
83 }
84 
85 early_param("nodebugmon", early_debug_disable);
86 
87 /*
88  * Keep track of debug users on each core.
89  * The ref counts are per-cpu so we use a local_t type.
90  */
91 static DEFINE_PER_CPU(int, mde_ref_count);
92 static DEFINE_PER_CPU(int, kde_ref_count);
93 
94 void enable_debug_monitors(enum debug_el el)
95 {
96 	u32 mdscr, enable = 0;
97 
98 	WARN_ON(preemptible());
99 
100 	if (this_cpu_inc_return(mde_ref_count) == 1)
101 		enable = DBG_MDSCR_MDE;
102 
103 	if (el == DBG_ACTIVE_EL1 &&
104 	    this_cpu_inc_return(kde_ref_count) == 1)
105 		enable |= DBG_MDSCR_KDE;
106 
107 	if (enable && debug_enabled) {
108 		mdscr = mdscr_read();
109 		mdscr |= enable;
110 		mdscr_write(mdscr);
111 	}
112 }
113 
114 void disable_debug_monitors(enum debug_el el)
115 {
116 	u32 mdscr, disable = 0;
117 
118 	WARN_ON(preemptible());
119 
120 	if (this_cpu_dec_return(mde_ref_count) == 0)
121 		disable = ~DBG_MDSCR_MDE;
122 
123 	if (el == DBG_ACTIVE_EL1 &&
124 	    this_cpu_dec_return(kde_ref_count) == 0)
125 		disable &= ~DBG_MDSCR_KDE;
126 
127 	if (disable) {
128 		mdscr = mdscr_read();
129 		mdscr &= disable;
130 		mdscr_write(mdscr);
131 	}
132 }
133 
134 /*
135  * OS lock clearing.
136  */
137 static void clear_os_lock(void *unused)
138 {
139 	asm volatile("msr oslar_el1, %0" : : "r" (0));
140 	isb();
141 }
142 
143 static int os_lock_notify(struct notifier_block *self,
144 				    unsigned long action, void *data)
145 {
146 	int cpu = (unsigned long)data;
147 	if (action == CPU_ONLINE)
148 		smp_call_function_single(cpu, clear_os_lock, NULL, 1);
149 	return NOTIFY_OK;
150 }
151 
152 static struct notifier_block os_lock_nb = {
153 	.notifier_call = os_lock_notify,
154 };
155 
156 static int debug_monitors_init(void)
157 {
158 	/* Clear the OS lock. */
159 	smp_call_function(clear_os_lock, NULL, 1);
160 	clear_os_lock(NULL);
161 
162 	/* Register hotplug handler. */
163 	register_cpu_notifier(&os_lock_nb);
164 	return 0;
165 }
166 postcore_initcall(debug_monitors_init);
167 
168 /*
169  * Single step API and exception handling.
170  */
171 static void set_regs_spsr_ss(struct pt_regs *regs)
172 {
173 	unsigned long spsr;
174 
175 	spsr = regs->pstate;
176 	spsr &= ~DBG_SPSR_SS;
177 	spsr |= DBG_SPSR_SS;
178 	regs->pstate = spsr;
179 }
180 
181 static void clear_regs_spsr_ss(struct pt_regs *regs)
182 {
183 	unsigned long spsr;
184 
185 	spsr = regs->pstate;
186 	spsr &= ~DBG_SPSR_SS;
187 	regs->pstate = spsr;
188 }
189 
190 /* EL1 Single Step Handler hooks */
191 static LIST_HEAD(step_hook);
192 DEFINE_RWLOCK(step_hook_lock);
193 
194 void register_step_hook(struct step_hook *hook)
195 {
196 	write_lock(&step_hook_lock);
197 	list_add(&hook->node, &step_hook);
198 	write_unlock(&step_hook_lock);
199 }
200 
201 void unregister_step_hook(struct step_hook *hook)
202 {
203 	write_lock(&step_hook_lock);
204 	list_del(&hook->node);
205 	write_unlock(&step_hook_lock);
206 }
207 
208 /*
209  * Call registered single step handers
210  * There is no Syndrome info to check for determining the handler.
211  * So we call all the registered handlers, until the right handler is
212  * found which returns zero.
213  */
214 static int call_step_hook(struct pt_regs *regs, unsigned int esr)
215 {
216 	struct step_hook *hook;
217 	int retval = DBG_HOOK_ERROR;
218 
219 	read_lock(&step_hook_lock);
220 
221 	list_for_each_entry(hook, &step_hook, node)	{
222 		retval = hook->fn(regs, esr);
223 		if (retval == DBG_HOOK_HANDLED)
224 			break;
225 	}
226 
227 	read_unlock(&step_hook_lock);
228 
229 	return retval;
230 }
231 
232 static int single_step_handler(unsigned long addr, unsigned int esr,
233 			       struct pt_regs *regs)
234 {
235 	siginfo_t info;
236 
237 	/*
238 	 * If we are stepping a pending breakpoint, call the hw_breakpoint
239 	 * handler first.
240 	 */
241 	if (!reinstall_suspended_bps(regs))
242 		return 0;
243 
244 	if (user_mode(regs)) {
245 		info.si_signo = SIGTRAP;
246 		info.si_errno = 0;
247 		info.si_code  = TRAP_HWBKPT;
248 		info.si_addr  = (void __user *)instruction_pointer(regs);
249 		force_sig_info(SIGTRAP, &info, current);
250 
251 		/*
252 		 * ptrace will disable single step unless explicitly
253 		 * asked to re-enable it. For other clients, it makes
254 		 * sense to leave it enabled (i.e. rewind the controls
255 		 * to the active-not-pending state).
256 		 */
257 		user_rewind_single_step(current);
258 	} else {
259 		if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
260 			return 0;
261 
262 		pr_warning("Unexpected kernel single-step exception at EL1\n");
263 		/*
264 		 * Re-enable stepping since we know that we will be
265 		 * returning to regs.
266 		 */
267 		set_regs_spsr_ss(regs);
268 	}
269 
270 	return 0;
271 }
272 
273 /*
274  * Breakpoint handler is re-entrant as another breakpoint can
275  * hit within breakpoint handler, especically in kprobes.
276  * Use reader/writer locks instead of plain spinlock.
277  */
278 static LIST_HEAD(break_hook);
279 DEFINE_RWLOCK(break_hook_lock);
280 
281 void register_break_hook(struct break_hook *hook)
282 {
283 	write_lock(&break_hook_lock);
284 	list_add(&hook->node, &break_hook);
285 	write_unlock(&break_hook_lock);
286 }
287 
288 void unregister_break_hook(struct break_hook *hook)
289 {
290 	write_lock(&break_hook_lock);
291 	list_del(&hook->node);
292 	write_unlock(&break_hook_lock);
293 }
294 
295 static int call_break_hook(struct pt_regs *regs, unsigned int esr)
296 {
297 	struct break_hook *hook;
298 	int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;
299 
300 	read_lock(&break_hook_lock);
301 	list_for_each_entry(hook, &break_hook, node)
302 		if ((esr & hook->esr_mask) == hook->esr_val)
303 			fn = hook->fn;
304 	read_unlock(&break_hook_lock);
305 
306 	return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
307 }
308 
309 static int brk_handler(unsigned long addr, unsigned int esr,
310 		       struct pt_regs *regs)
311 {
312 	siginfo_t info;
313 
314 	if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED)
315 		return 0;
316 
317 	pr_warn("unexpected brk exception at %lx, esr=0x%x\n",
318 			(long)instruction_pointer(regs), esr);
319 
320 	if (!user_mode(regs))
321 		return -EFAULT;
322 
323 	info = (siginfo_t) {
324 		.si_signo = SIGTRAP,
325 		.si_errno = 0,
326 		.si_code  = TRAP_BRKPT,
327 		.si_addr  = (void __user *)instruction_pointer(regs),
328 	};
329 
330 	force_sig_info(SIGTRAP, &info, current);
331 	return 0;
332 }
333 
334 int aarch32_break_handler(struct pt_regs *regs)
335 {
336 	siginfo_t info;
337 	u32 arm_instr;
338 	u16 thumb_instr;
339 	bool bp = false;
340 	void __user *pc = (void __user *)instruction_pointer(regs);
341 
342 	if (!compat_user_mode(regs))
343 		return -EFAULT;
344 
345 	if (compat_thumb_mode(regs)) {
346 		/* get 16-bit Thumb instruction */
347 		get_user(thumb_instr, (u16 __user *)pc);
348 		thumb_instr = le16_to_cpu(thumb_instr);
349 		if (thumb_instr == AARCH32_BREAK_THUMB2_LO) {
350 			/* get second half of 32-bit Thumb-2 instruction */
351 			get_user(thumb_instr, (u16 __user *)(pc + 2));
352 			thumb_instr = le16_to_cpu(thumb_instr);
353 			bp = thumb_instr == AARCH32_BREAK_THUMB2_HI;
354 		} else {
355 			bp = thumb_instr == AARCH32_BREAK_THUMB;
356 		}
357 	} else {
358 		/* 32-bit ARM instruction */
359 		get_user(arm_instr, (u32 __user *)pc);
360 		arm_instr = le32_to_cpu(arm_instr);
361 		bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM;
362 	}
363 
364 	if (!bp)
365 		return -EFAULT;
366 
367 	info = (siginfo_t) {
368 		.si_signo = SIGTRAP,
369 		.si_errno = 0,
370 		.si_code  = TRAP_BRKPT,
371 		.si_addr  = pc,
372 	};
373 
374 	force_sig_info(SIGTRAP, &info, current);
375 	return 0;
376 }
377 
378 static int __init debug_traps_init(void)
379 {
380 	hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
381 			      TRAP_HWBKPT, "single-step handler");
382 	hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
383 			      TRAP_BRKPT, "ptrace BRK handler");
384 	return 0;
385 }
386 arch_initcall(debug_traps_init);
387 
388 /* Re-enable single step for syscall restarting. */
389 void user_rewind_single_step(struct task_struct *task)
390 {
391 	/*
392 	 * If single step is active for this thread, then set SPSR.SS
393 	 * to 1 to avoid returning to the active-pending state.
394 	 */
395 	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
396 		set_regs_spsr_ss(task_pt_regs(task));
397 }
398 
399 void user_fastforward_single_step(struct task_struct *task)
400 {
401 	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
402 		clear_regs_spsr_ss(task_pt_regs(task));
403 }
404 
405 /* Kernel API */
406 void kernel_enable_single_step(struct pt_regs *regs)
407 {
408 	WARN_ON(!irqs_disabled());
409 	set_regs_spsr_ss(regs);
410 	mdscr_write(mdscr_read() | DBG_MDSCR_SS);
411 	enable_debug_monitors(DBG_ACTIVE_EL1);
412 }
413 
414 void kernel_disable_single_step(void)
415 {
416 	WARN_ON(!irqs_disabled());
417 	mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
418 	disable_debug_monitors(DBG_ACTIVE_EL1);
419 }
420 
421 int kernel_active_single_step(void)
422 {
423 	WARN_ON(!irqs_disabled());
424 	return mdscr_read() & DBG_MDSCR_SS;
425 }
426 
427 /* ptrace API */
428 void user_enable_single_step(struct task_struct *task)
429 {
430 	set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
431 	set_regs_spsr_ss(task_pt_regs(task));
432 }
433 
434 void user_disable_single_step(struct task_struct *task)
435 {
436 	clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
437 }
438