xref: /openbmc/linux/arch/arm64/kernel/cpu-reset.S (revision ae47ee5f)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * CPU reset routines
4 *
5 * Copyright (C) 2001 Deep Blue Solutions Ltd.
6 * Copyright (C) 2012 ARM Ltd.
7 * Copyright (C) 2015 Huawei Futurewei Technologies.
8 */
9
10#include <linux/linkage.h>
11#include <asm/assembler.h>
12#include <asm/sysreg.h>
13#include <asm/virt.h>
14
15.text
16.pushsection    .idmap.text, "awx"
17
18/*
19 * __cpu_soft_restart(el2_switch, entry, arg0, arg1, arg2) - Helper for
20 * cpu_soft_restart.
21 *
22 * @el2_switch: Flag to indicate a switch to EL2 is needed.
23 * @entry: Location to jump to for soft reset.
24 * arg0: First argument passed to @entry. (relocation list)
25 * arg1: Second argument passed to @entry.(physical kernel entry)
26 * arg2: Third argument passed to @entry. (physical dtb address)
27 *
28 * Put the CPU into the same state as it would be if it had been reset, and
29 * branch to what would be the reset vector. It must be executed with the
30 * flat identity mapping.
31 */
32SYM_CODE_START(__cpu_soft_restart)
33	mov_q	x12, INIT_SCTLR_EL1_MMU_OFF
34	pre_disable_mmu_workaround
35	/*
36	 * either disable EL1&0 translation regime or disable EL2&0 translation
37	 * regime if HCR_EL2.E2H == 1
38	 */
39	msr	sctlr_el1, x12
40	isb
41
42	cbz	x0, 1f				// el2_switch?
43	mov	x0, #HVC_SOFT_RESTART
44	hvc	#0				// no return
45
461:	mov	x8, x1				// entry
47	mov	x0, x2				// arg0
48	mov	x1, x3				// arg1
49	mov	x2, x4				// arg2
50	br	x8
51SYM_CODE_END(__cpu_soft_restart)
52
53.popsection
54