1 /* 2 * Based on arch/arm/kernel/asm-offsets.c 3 * 4 * Copyright (C) 1995-2003 Russell King 5 * 2001-2002 Keith Owens 6 * Copyright (C) 2012 ARM Ltd. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program. If not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include <linux/sched.h> 22 #include <linux/mm.h> 23 #include <linux/dma-mapping.h> 24 #include <linux/kvm_host.h> 25 #include <linux/suspend.h> 26 #include <asm/thread_info.h> 27 #include <asm/memory.h> 28 #include <asm/smp_plat.h> 29 #include <asm/suspend.h> 30 #include <asm/vdso_datapage.h> 31 #include <linux/kbuild.h> 32 #include <linux/arm-smccc.h> 33 34 int main(void) 35 { 36 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm)); 37 BLANK(); 38 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); 39 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); 40 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); 41 DEFINE(TI_TASK, offsetof(struct thread_info, task)); 42 DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); 43 BLANK(); 44 DEFINE(THREAD_CPU_CONTEXT, offsetof(struct task_struct, thread.cpu_context)); 45 BLANK(); 46 DEFINE(S_X0, offsetof(struct pt_regs, regs[0])); 47 DEFINE(S_X1, offsetof(struct pt_regs, regs[1])); 48 DEFINE(S_X2, offsetof(struct pt_regs, regs[2])); 49 DEFINE(S_X3, offsetof(struct pt_regs, regs[3])); 50 DEFINE(S_X4, offsetof(struct pt_regs, regs[4])); 51 DEFINE(S_X5, offsetof(struct pt_regs, regs[5])); 52 DEFINE(S_X6, offsetof(struct pt_regs, regs[6])); 53 DEFINE(S_X7, offsetof(struct pt_regs, regs[7])); 54 DEFINE(S_LR, offsetof(struct pt_regs, regs[30])); 55 DEFINE(S_SP, offsetof(struct pt_regs, sp)); 56 #ifdef CONFIG_COMPAT 57 DEFINE(S_COMPAT_SP, offsetof(struct pt_regs, compat_sp)); 58 #endif 59 DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate)); 60 DEFINE(S_PC, offsetof(struct pt_regs, pc)); 61 DEFINE(S_ORIG_X0, offsetof(struct pt_regs, orig_x0)); 62 DEFINE(S_SYSCALLNO, offsetof(struct pt_regs, syscallno)); 63 DEFINE(S_ORIG_ADDR_LIMIT, offsetof(struct pt_regs, orig_addr_limit)); 64 DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs)); 65 BLANK(); 66 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter)); 67 BLANK(); 68 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm)); 69 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags)); 70 BLANK(); 71 DEFINE(VM_EXEC, VM_EXEC); 72 BLANK(); 73 DEFINE(PAGE_SZ, PAGE_SIZE); 74 BLANK(); 75 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL); 76 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE); 77 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE); 78 BLANK(); 79 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME); 80 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC); 81 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC); 82 DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE); 83 DEFINE(CLOCK_MONOTONIC_COARSE,CLOCK_MONOTONIC_COARSE); 84 DEFINE(CLOCK_COARSE_RES, LOW_RES_NSEC); 85 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC); 86 BLANK(); 87 DEFINE(VDSO_CS_CYCLE_LAST, offsetof(struct vdso_data, cs_cycle_last)); 88 DEFINE(VDSO_XTIME_CLK_SEC, offsetof(struct vdso_data, xtime_clock_sec)); 89 DEFINE(VDSO_XTIME_CLK_NSEC, offsetof(struct vdso_data, xtime_clock_nsec)); 90 DEFINE(VDSO_XTIME_CRS_SEC, offsetof(struct vdso_data, xtime_coarse_sec)); 91 DEFINE(VDSO_XTIME_CRS_NSEC, offsetof(struct vdso_data, xtime_coarse_nsec)); 92 DEFINE(VDSO_WTM_CLK_SEC, offsetof(struct vdso_data, wtm_clock_sec)); 93 DEFINE(VDSO_WTM_CLK_NSEC, offsetof(struct vdso_data, wtm_clock_nsec)); 94 DEFINE(VDSO_TB_SEQ_COUNT, offsetof(struct vdso_data, tb_seq_count)); 95 DEFINE(VDSO_CS_MULT, offsetof(struct vdso_data, cs_mult)); 96 DEFINE(VDSO_CS_SHIFT, offsetof(struct vdso_data, cs_shift)); 97 DEFINE(VDSO_TZ_MINWEST, offsetof(struct vdso_data, tz_minuteswest)); 98 DEFINE(VDSO_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime)); 99 DEFINE(VDSO_USE_SYSCALL, offsetof(struct vdso_data, use_syscall)); 100 BLANK(); 101 DEFINE(TVAL_TV_SEC, offsetof(struct timeval, tv_sec)); 102 DEFINE(TVAL_TV_USEC, offsetof(struct timeval, tv_usec)); 103 DEFINE(TSPEC_TV_SEC, offsetof(struct timespec, tv_sec)); 104 DEFINE(TSPEC_TV_NSEC, offsetof(struct timespec, tv_nsec)); 105 BLANK(); 106 DEFINE(TZ_MINWEST, offsetof(struct timezone, tz_minuteswest)); 107 DEFINE(TZ_DSTTIME, offsetof(struct timezone, tz_dsttime)); 108 BLANK(); 109 DEFINE(CPU_BOOT_STACK, offsetof(struct secondary_data, stack)); 110 BLANK(); 111 #ifdef CONFIG_KVM_ARM_HOST 112 DEFINE(VCPU_CONTEXT, offsetof(struct kvm_vcpu, arch.ctxt)); 113 DEFINE(CPU_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs)); 114 DEFINE(CPU_USER_PT_REGS, offsetof(struct kvm_regs, regs)); 115 DEFINE(CPU_FP_REGS, offsetof(struct kvm_regs, fp_regs)); 116 DEFINE(VCPU_FPEXC32_EL2, offsetof(struct kvm_vcpu, arch.ctxt.sys_regs[FPEXC32_EL2])); 117 DEFINE(VCPU_HOST_CONTEXT, offsetof(struct kvm_vcpu, arch.host_cpu_context)); 118 #endif 119 #ifdef CONFIG_CPU_PM 120 DEFINE(CPU_SUSPEND_SZ, sizeof(struct cpu_suspend_ctx)); 121 DEFINE(CPU_CTX_SP, offsetof(struct cpu_suspend_ctx, sp)); 122 DEFINE(MPIDR_HASH_MASK, offsetof(struct mpidr_hash, mask)); 123 DEFINE(MPIDR_HASH_SHIFTS, offsetof(struct mpidr_hash, shift_aff)); 124 DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS, offsetof(struct sleep_stack_data, system_regs)); 125 DEFINE(SLEEP_STACK_DATA_CALLEE_REGS, offsetof(struct sleep_stack_data, callee_saved_regs)); 126 #endif 127 DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0)); 128 DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); 129 BLANK(); 130 DEFINE(HIBERN_PBE_ORIG, offsetof(struct pbe, orig_address)); 131 DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address)); 132 DEFINE(HIBERN_PBE_NEXT, offsetof(struct pbe, next)); 133 return 0; 134 } 135