xref: /openbmc/linux/arch/arm64/include/uapi/asm/ptrace.h (revision 55fd7e02)
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /*
3  * Based on arch/arm/include/asm/ptrace.h
4  *
5  * Copyright (C) 1996-2003 Russell King
6  * Copyright (C) 2012 ARM Ltd.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19  */
20 #ifndef _UAPI__ASM_PTRACE_H
21 #define _UAPI__ASM_PTRACE_H
22 
23 #include <linux/types.h>
24 
25 #include <asm/hwcap.h>
26 #include <asm/sve_context.h>
27 
28 
29 /*
30  * PSR bits
31  */
32 #define PSR_MODE_EL0t	0x00000000
33 #define PSR_MODE_EL1t	0x00000004
34 #define PSR_MODE_EL1h	0x00000005
35 #define PSR_MODE_EL2t	0x00000008
36 #define PSR_MODE_EL2h	0x00000009
37 #define PSR_MODE_EL3t	0x0000000c
38 #define PSR_MODE_EL3h	0x0000000d
39 #define PSR_MODE_MASK	0x0000000f
40 
41 /* AArch32 CPSR bits */
42 #define PSR_MODE32_BIT		0x00000010
43 
44 /* AArch64 SPSR bits */
45 #define PSR_F_BIT	0x00000040
46 #define PSR_I_BIT	0x00000080
47 #define PSR_A_BIT	0x00000100
48 #define PSR_D_BIT	0x00000200
49 #define PSR_BTYPE_MASK	0x00000c00
50 #define PSR_SSBS_BIT	0x00001000
51 #define PSR_PAN_BIT	0x00400000
52 #define PSR_UAO_BIT	0x00800000
53 #define PSR_DIT_BIT	0x01000000
54 #define PSR_V_BIT	0x10000000
55 #define PSR_C_BIT	0x20000000
56 #define PSR_Z_BIT	0x40000000
57 #define PSR_N_BIT	0x80000000
58 
59 #define PSR_BTYPE_SHIFT		10
60 
61 /*
62  * Groups of PSR bits
63  */
64 #define PSR_f		0xff000000	/* Flags		*/
65 #define PSR_s		0x00ff0000	/* Status		*/
66 #define PSR_x		0x0000ff00	/* Extension		*/
67 #define PSR_c		0x000000ff	/* Control		*/
68 
69 /* Convenience names for the values of PSTATE.BTYPE */
70 #define PSR_BTYPE_NONE		(0b00 << PSR_BTYPE_SHIFT)
71 #define PSR_BTYPE_JC		(0b01 << PSR_BTYPE_SHIFT)
72 #define PSR_BTYPE_C		(0b10 << PSR_BTYPE_SHIFT)
73 #define PSR_BTYPE_J		(0b11 << PSR_BTYPE_SHIFT)
74 
75 /* syscall emulation path in ptrace */
76 #define PTRACE_SYSEMU		  31
77 #define PTRACE_SYSEMU_SINGLESTEP  32
78 
79 #ifndef __ASSEMBLY__
80 
81 /*
82  * User structures for general purpose, floating point and debug registers.
83  */
84 struct user_pt_regs {
85 	__u64		regs[31];
86 	__u64		sp;
87 	__u64		pc;
88 	__u64		pstate;
89 };
90 
91 struct user_fpsimd_state {
92 	__uint128_t	vregs[32];
93 	__u32		fpsr;
94 	__u32		fpcr;
95 	__u32		__reserved[2];
96 };
97 
98 struct user_hwdebug_state {
99 	__u32		dbg_info;
100 	__u32		pad;
101 	struct {
102 		__u64	addr;
103 		__u32	ctrl;
104 		__u32	pad;
105 	}		dbg_regs[16];
106 };
107 
108 /* SVE/FP/SIMD state (NT_ARM_SVE) */
109 
110 struct user_sve_header {
111 	__u32 size; /* total meaningful regset content in bytes */
112 	__u32 max_size; /* maxmium possible size for this thread */
113 	__u16 vl; /* current vector length */
114 	__u16 max_vl; /* maximum possible vector length */
115 	__u16 flags;
116 	__u16 __reserved;
117 };
118 
119 /* Definitions for user_sve_header.flags: */
120 #define SVE_PT_REGS_MASK		(1 << 0)
121 
122 #define SVE_PT_REGS_FPSIMD		0
123 #define SVE_PT_REGS_SVE			SVE_PT_REGS_MASK
124 
125 /*
126  * Common SVE_PT_* flags:
127  * These must be kept in sync with prctl interface in <linux/prctl.h>
128  */
129 #define SVE_PT_VL_INHERIT		((1 << 17) /* PR_SVE_VL_INHERIT */ >> 16)
130 #define SVE_PT_VL_ONEXEC		((1 << 18) /* PR_SVE_SET_VL_ONEXEC */ >> 16)
131 
132 
133 /*
134  * The remainder of the SVE state follows struct user_sve_header.  The
135  * total size of the SVE state (including header) depends on the
136  * metadata in the header:  SVE_PT_SIZE(vq, flags) gives the total size
137  * of the state in bytes, including the header.
138  *
139  * Refer to <asm/sigcontext.h> for details of how to pass the correct
140  * "vq" argument to these macros.
141  */
142 
143 /* Offset from the start of struct user_sve_header to the register data */
144 #define SVE_PT_REGS_OFFSET						\
145 	((sizeof(struct user_sve_header) + (__SVE_VQ_BYTES - 1))	\
146 		/ __SVE_VQ_BYTES * __SVE_VQ_BYTES)
147 
148 /*
149  * The register data content and layout depends on the value of the
150  * flags field.
151  */
152 
153 /*
154  * (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD case:
155  *
156  * The payload starts at offset SVE_PT_FPSIMD_OFFSET, and is of type
157  * struct user_fpsimd_state.  Additional data might be appended in the
158  * future: use SVE_PT_FPSIMD_SIZE(vq, flags) to compute the total size.
159  * SVE_PT_FPSIMD_SIZE(vq, flags) will never be less than
160  * sizeof(struct user_fpsimd_state).
161  */
162 
163 #define SVE_PT_FPSIMD_OFFSET		SVE_PT_REGS_OFFSET
164 
165 #define SVE_PT_FPSIMD_SIZE(vq, flags)	(sizeof(struct user_fpsimd_state))
166 
167 /*
168  * (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE case:
169  *
170  * The payload starts at offset SVE_PT_SVE_OFFSET, and is of size
171  * SVE_PT_SVE_SIZE(vq, flags).
172  *
173  * Additional macros describe the contents and layout of the payload.
174  * For each, SVE_PT_SVE_x_OFFSET(args) is the start offset relative to
175  * the start of struct user_sve_header, and SVE_PT_SVE_x_SIZE(args) is
176  * the size in bytes:
177  *
178  *	x	type				description
179  *	-	----				-----------
180  *	ZREGS		\
181  *	ZREG		|
182  *	PREGS		| refer to <asm/sigcontext.h>
183  *	PREG		|
184  *	FFR		/
185  *
186  *	FPSR	uint32_t			FPSR
187  *	FPCR	uint32_t			FPCR
188  *
189  * Additional data might be appended in the future.
190  *
191  * The Z-, P- and FFR registers are represented in memory in an endianness-
192  * invariant layout which differs from the layout used for the FPSIMD
193  * V-registers on big-endian systems: see sigcontext.h for more explanation.
194  */
195 
196 #define SVE_PT_SVE_ZREG_SIZE(vq)	__SVE_ZREG_SIZE(vq)
197 #define SVE_PT_SVE_PREG_SIZE(vq)	__SVE_PREG_SIZE(vq)
198 #define SVE_PT_SVE_FFR_SIZE(vq)		__SVE_FFR_SIZE(vq)
199 #define SVE_PT_SVE_FPSR_SIZE		sizeof(__u32)
200 #define SVE_PT_SVE_FPCR_SIZE		sizeof(__u32)
201 
202 #define SVE_PT_SVE_OFFSET		SVE_PT_REGS_OFFSET
203 
204 #define SVE_PT_SVE_ZREGS_OFFSET \
205 	(SVE_PT_REGS_OFFSET + __SVE_ZREGS_OFFSET)
206 #define SVE_PT_SVE_ZREG_OFFSET(vq, n) \
207 	(SVE_PT_REGS_OFFSET + __SVE_ZREG_OFFSET(vq, n))
208 #define SVE_PT_SVE_ZREGS_SIZE(vq) \
209 	(SVE_PT_SVE_ZREG_OFFSET(vq, __SVE_NUM_ZREGS) - SVE_PT_SVE_ZREGS_OFFSET)
210 
211 #define SVE_PT_SVE_PREGS_OFFSET(vq) \
212 	(SVE_PT_REGS_OFFSET + __SVE_PREGS_OFFSET(vq))
213 #define SVE_PT_SVE_PREG_OFFSET(vq, n) \
214 	(SVE_PT_REGS_OFFSET + __SVE_PREG_OFFSET(vq, n))
215 #define SVE_PT_SVE_PREGS_SIZE(vq) \
216 	(SVE_PT_SVE_PREG_OFFSET(vq, __SVE_NUM_PREGS) - \
217 		SVE_PT_SVE_PREGS_OFFSET(vq))
218 
219 #define SVE_PT_SVE_FFR_OFFSET(vq) \
220 	(SVE_PT_REGS_OFFSET + __SVE_FFR_OFFSET(vq))
221 
222 #define SVE_PT_SVE_FPSR_OFFSET(vq)				\
223 	((SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq) +	\
224 			(__SVE_VQ_BYTES - 1))			\
225 		/ __SVE_VQ_BYTES * __SVE_VQ_BYTES)
226 #define SVE_PT_SVE_FPCR_OFFSET(vq) \
227 	(SVE_PT_SVE_FPSR_OFFSET(vq) + SVE_PT_SVE_FPSR_SIZE)
228 
229 /*
230  * Any future extension appended after FPCR must be aligned to the next
231  * 128-bit boundary.
232  */
233 
234 #define SVE_PT_SVE_SIZE(vq, flags)					\
235 	((SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE		\
236 			- SVE_PT_SVE_OFFSET + (__SVE_VQ_BYTES - 1))	\
237 		/ __SVE_VQ_BYTES * __SVE_VQ_BYTES)
238 
239 #define SVE_PT_SIZE(vq, flags)						\
240 	 (((flags) & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE ?		\
241 		  SVE_PT_SVE_OFFSET + SVE_PT_SVE_SIZE(vq, flags)	\
242 		: SVE_PT_FPSIMD_OFFSET + SVE_PT_FPSIMD_SIZE(vq, flags))
243 
244 /* pointer authentication masks (NT_ARM_PAC_MASK) */
245 
246 struct user_pac_mask {
247 	__u64		data_mask;
248 	__u64		insn_mask;
249 };
250 
251 /* pointer authentication keys (NT_ARM_PACA_KEYS, NT_ARM_PACG_KEYS) */
252 
253 struct user_pac_address_keys {
254 	__uint128_t	apiakey;
255 	__uint128_t	apibkey;
256 	__uint128_t	apdakey;
257 	__uint128_t	apdbkey;
258 };
259 
260 struct user_pac_generic_keys {
261 	__uint128_t	apgakey;
262 };
263 
264 #endif /* __ASSEMBLY__ */
265 
266 #endif /* _UAPI__ASM_PTRACE_H */
267