154f81d0eSMarc Zyngier /* 254f81d0eSMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 354f81d0eSMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 454f81d0eSMarc Zyngier * 554f81d0eSMarc Zyngier * Derived from arch/arm/include/uapi/asm/kvm.h: 654f81d0eSMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 754f81d0eSMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 854f81d0eSMarc Zyngier * 954f81d0eSMarc Zyngier * This program is free software; you can redistribute it and/or modify 1054f81d0eSMarc Zyngier * it under the terms of the GNU General Public License version 2 as 1154f81d0eSMarc Zyngier * published by the Free Software Foundation. 1254f81d0eSMarc Zyngier * 1354f81d0eSMarc Zyngier * This program is distributed in the hope that it will be useful, 1454f81d0eSMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 1554f81d0eSMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1654f81d0eSMarc Zyngier * GNU General Public License for more details. 1754f81d0eSMarc Zyngier * 1854f81d0eSMarc Zyngier * You should have received a copy of the GNU General Public License 1954f81d0eSMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 2054f81d0eSMarc Zyngier */ 2154f81d0eSMarc Zyngier 2254f81d0eSMarc Zyngier #ifndef __ARM_KVM_H__ 2354f81d0eSMarc Zyngier #define __ARM_KVM_H__ 2454f81d0eSMarc Zyngier 2554f81d0eSMarc Zyngier #define KVM_SPSR_EL1 0 2654f81d0eSMarc Zyngier #define KVM_NR_SPSR 1 2754f81d0eSMarc Zyngier 2854f81d0eSMarc Zyngier #ifndef __ASSEMBLY__ 2954f81d0eSMarc Zyngier #include <asm/types.h> 3054f81d0eSMarc Zyngier #include <asm/ptrace.h> 3154f81d0eSMarc Zyngier 3254f81d0eSMarc Zyngier #define __KVM_HAVE_GUEST_DEBUG 3354f81d0eSMarc Zyngier #define __KVM_HAVE_IRQ_LINE 3454f81d0eSMarc Zyngier 3554f81d0eSMarc Zyngier #define KVM_REG_SIZE(id) \ 3654f81d0eSMarc Zyngier (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) 3754f81d0eSMarc Zyngier 3854f81d0eSMarc Zyngier struct kvm_regs { 3954f81d0eSMarc Zyngier struct user_pt_regs regs; /* sp = sp_el0 */ 4054f81d0eSMarc Zyngier 4154f81d0eSMarc Zyngier __u64 sp_el1; 4254f81d0eSMarc Zyngier __u64 elr_el1; 4354f81d0eSMarc Zyngier 4454f81d0eSMarc Zyngier __u64 spsr[KVM_NR_SPSR]; 4554f81d0eSMarc Zyngier 4654f81d0eSMarc Zyngier struct user_fpsimd_state fp_regs; 4754f81d0eSMarc Zyngier }; 4854f81d0eSMarc Zyngier 4954f81d0eSMarc Zyngier /* Supported Processor Types */ 5054f81d0eSMarc Zyngier #define KVM_ARM_TARGET_AEM_V8 0 5154f81d0eSMarc Zyngier #define KVM_ARM_TARGET_FOUNDATION_V8 1 5254f81d0eSMarc Zyngier #define KVM_ARM_TARGET_CORTEX_A57 2 5354f81d0eSMarc Zyngier 5454f81d0eSMarc Zyngier #define KVM_ARM_NUM_TARGETS 3 5554f81d0eSMarc Zyngier 5654f81d0eSMarc Zyngier /* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */ 5754f81d0eSMarc Zyngier #define KVM_ARM_DEVICE_TYPE_SHIFT 0 5854f81d0eSMarc Zyngier #define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT) 5954f81d0eSMarc Zyngier #define KVM_ARM_DEVICE_ID_SHIFT 16 6054f81d0eSMarc Zyngier #define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT) 6154f81d0eSMarc Zyngier 6254f81d0eSMarc Zyngier /* Supported device IDs */ 6354f81d0eSMarc Zyngier #define KVM_ARM_DEVICE_VGIC_V2 0 6454f81d0eSMarc Zyngier 6554f81d0eSMarc Zyngier /* Supported VGIC address types */ 6654f81d0eSMarc Zyngier #define KVM_VGIC_V2_ADDR_TYPE_DIST 0 6754f81d0eSMarc Zyngier #define KVM_VGIC_V2_ADDR_TYPE_CPU 1 6854f81d0eSMarc Zyngier 6954f81d0eSMarc Zyngier #define KVM_VGIC_V2_DIST_SIZE 0x1000 7054f81d0eSMarc Zyngier #define KVM_VGIC_V2_CPU_SIZE 0x2000 7154f81d0eSMarc Zyngier 7254f81d0eSMarc Zyngier struct kvm_vcpu_init { 7354f81d0eSMarc Zyngier __u32 target; 7454f81d0eSMarc Zyngier __u32 features[7]; 7554f81d0eSMarc Zyngier }; 7654f81d0eSMarc Zyngier 7754f81d0eSMarc Zyngier struct kvm_sregs { 7854f81d0eSMarc Zyngier }; 7954f81d0eSMarc Zyngier 8054f81d0eSMarc Zyngier struct kvm_fpu { 8154f81d0eSMarc Zyngier }; 8254f81d0eSMarc Zyngier 8354f81d0eSMarc Zyngier struct kvm_guest_debug_arch { 8454f81d0eSMarc Zyngier }; 8554f81d0eSMarc Zyngier 8654f81d0eSMarc Zyngier struct kvm_debug_exit_arch { 8754f81d0eSMarc Zyngier }; 8854f81d0eSMarc Zyngier 8954f81d0eSMarc Zyngier struct kvm_sync_regs { 9054f81d0eSMarc Zyngier }; 9154f81d0eSMarc Zyngier 9254f81d0eSMarc Zyngier struct kvm_arch_memory_slot { 9354f81d0eSMarc Zyngier }; 9454f81d0eSMarc Zyngier 957c8c5e6aSMarc Zyngier /* If you need to interpret the index values, here is the key: */ 967c8c5e6aSMarc Zyngier #define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 977c8c5e6aSMarc Zyngier #define KVM_REG_ARM_COPROC_SHIFT 16 987c8c5e6aSMarc Zyngier 997c8c5e6aSMarc Zyngier /* Normal registers are mapped as coprocessor 16. */ 1007c8c5e6aSMarc Zyngier #define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT) 1017c8c5e6aSMarc Zyngier #define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / sizeof(__u32)) 1027c8c5e6aSMarc Zyngier 1037c8c5e6aSMarc Zyngier /* Some registers need more space to represent values. */ 1047c8c5e6aSMarc Zyngier #define KVM_REG_ARM_DEMUX (0x0011 << KVM_REG_ARM_COPROC_SHIFT) 1057c8c5e6aSMarc Zyngier #define KVM_REG_ARM_DEMUX_ID_MASK 0x000000000000FF00 1067c8c5e6aSMarc Zyngier #define KVM_REG_ARM_DEMUX_ID_SHIFT 8 1077c8c5e6aSMarc Zyngier #define KVM_REG_ARM_DEMUX_ID_CCSIDR (0x00 << KVM_REG_ARM_DEMUX_ID_SHIFT) 1087c8c5e6aSMarc Zyngier #define KVM_REG_ARM_DEMUX_VAL_MASK 0x00000000000000FF 1097c8c5e6aSMarc Zyngier #define KVM_REG_ARM_DEMUX_VAL_SHIFT 0 1107c8c5e6aSMarc Zyngier 1117c8c5e6aSMarc Zyngier /* AArch64 system registers */ 1127c8c5e6aSMarc Zyngier #define KVM_REG_ARM64_SYSREG (0x0013 << KVM_REG_ARM_COPROC_SHIFT) 1137c8c5e6aSMarc Zyngier #define KVM_REG_ARM64_SYSREG_OP0_MASK 0x000000000000c000 1147c8c5e6aSMarc Zyngier #define KVM_REG_ARM64_SYSREG_OP0_SHIFT 14 1157c8c5e6aSMarc Zyngier #define KVM_REG_ARM64_SYSREG_OP1_MASK 0x0000000000003800 1167c8c5e6aSMarc Zyngier #define KVM_REG_ARM64_SYSREG_OP1_SHIFT 11 1177c8c5e6aSMarc Zyngier #define KVM_REG_ARM64_SYSREG_CRN_MASK 0x0000000000000780 1187c8c5e6aSMarc Zyngier #define KVM_REG_ARM64_SYSREG_CRN_SHIFT 7 1197c8c5e6aSMarc Zyngier #define KVM_REG_ARM64_SYSREG_CRM_MASK 0x0000000000000078 1207c8c5e6aSMarc Zyngier #define KVM_REG_ARM64_SYSREG_CRM_SHIFT 3 1217c8c5e6aSMarc Zyngier #define KVM_REG_ARM64_SYSREG_OP2_MASK 0x0000000000000007 1227c8c5e6aSMarc Zyngier #define KVM_REG_ARM64_SYSREG_OP2_SHIFT 0 1237c8c5e6aSMarc Zyngier 12454f81d0eSMarc Zyngier /* KVM_IRQ_LINE irq field index values */ 12554f81d0eSMarc Zyngier #define KVM_ARM_IRQ_TYPE_SHIFT 24 12654f81d0eSMarc Zyngier #define KVM_ARM_IRQ_TYPE_MASK 0xff 12754f81d0eSMarc Zyngier #define KVM_ARM_IRQ_VCPU_SHIFT 16 12854f81d0eSMarc Zyngier #define KVM_ARM_IRQ_VCPU_MASK 0xff 12954f81d0eSMarc Zyngier #define KVM_ARM_IRQ_NUM_SHIFT 0 13054f81d0eSMarc Zyngier #define KVM_ARM_IRQ_NUM_MASK 0xffff 13154f81d0eSMarc Zyngier 13254f81d0eSMarc Zyngier /* irq_type field */ 13354f81d0eSMarc Zyngier #define KVM_ARM_IRQ_TYPE_CPU 0 13454f81d0eSMarc Zyngier #define KVM_ARM_IRQ_TYPE_SPI 1 13554f81d0eSMarc Zyngier #define KVM_ARM_IRQ_TYPE_PPI 2 13654f81d0eSMarc Zyngier 13754f81d0eSMarc Zyngier /* out-of-kernel GIC cpu interrupt injection irq_number field */ 13854f81d0eSMarc Zyngier #define KVM_ARM_IRQ_CPU_IRQ 0 13954f81d0eSMarc Zyngier #define KVM_ARM_IRQ_CPU_FIQ 1 14054f81d0eSMarc Zyngier 14154f81d0eSMarc Zyngier /* Highest supported SPI, from VGIC_NR_IRQS */ 14254f81d0eSMarc Zyngier #define KVM_ARM_IRQ_GIC_MAX 127 14354f81d0eSMarc Zyngier 14454f81d0eSMarc Zyngier #endif 14554f81d0eSMarc Zyngier 14654f81d0eSMarc Zyngier #endif /* __ARM_KVM_H__ */ 147