1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Based on arch/arm/include/asm/uaccess.h 4 * 5 * Copyright (C) 2012 ARM Ltd. 6 */ 7 #ifndef __ASM_UACCESS_H 8 #define __ASM_UACCESS_H 9 10 #include <asm/alternative.h> 11 #include <asm/kernel-pgtable.h> 12 #include <asm/sysreg.h> 13 14 /* 15 * User space memory access functions 16 */ 17 #include <linux/bitops.h> 18 #include <linux/kasan-checks.h> 19 #include <linux/string.h> 20 21 #include <asm/cpufeature.h> 22 #include <asm/mmu.h> 23 #include <asm/ptrace.h> 24 #include <asm/memory.h> 25 #include <asm/extable.h> 26 27 #define HAVE_GET_KERNEL_NOFAULT 28 29 /* 30 * Test whether a block of memory is a valid user space address. 31 * Returns 1 if the range is valid, 0 otherwise. 32 * 33 * This is equivalent to the following test: 34 * (u65)addr + (u65)size <= (u65)TASK_SIZE_MAX 35 */ 36 static inline unsigned long __range_ok(const void __user *addr, unsigned long size) 37 { 38 unsigned long ret, limit = TASK_SIZE_MAX - 1; 39 40 /* 41 * Asynchronous I/O running in a kernel thread does not have the 42 * TIF_TAGGED_ADDR flag of the process owning the mm, so always untag 43 * the user address before checking. 44 */ 45 if (IS_ENABLED(CONFIG_ARM64_TAGGED_ADDR_ABI) && 46 (current->flags & PF_KTHREAD || test_thread_flag(TIF_TAGGED_ADDR))) 47 addr = untagged_addr(addr); 48 49 __chk_user_ptr(addr); 50 asm volatile( 51 // A + B <= C + 1 for all A,B,C, in four easy steps: 52 // 1: X = A + B; X' = X % 2^64 53 " adds %0, %3, %2\n" 54 // 2: Set C = 0 if X > 2^64, to guarantee X' > C in step 4 55 " csel %1, xzr, %1, hi\n" 56 // 3: Set X' = ~0 if X >= 2^64. For X == 2^64, this decrements X' 57 // to compensate for the carry flag being set in step 4. For 58 // X > 2^64, X' merely has to remain nonzero, which it does. 59 " csinv %0, %0, xzr, cc\n" 60 // 4: For X < 2^64, this gives us X' - C - 1 <= 0, where the -1 61 // comes from the carry in being clear. Otherwise, we are 62 // testing X' - C == 0, subject to the previous adjustments. 63 " sbcs xzr, %0, %1\n" 64 " cset %0, ls\n" 65 : "=&r" (ret), "+r" (limit) : "Ir" (size), "0" (addr) : "cc"); 66 67 return ret; 68 } 69 70 #define access_ok(addr, size) __range_ok(addr, size) 71 72 #define _ASM_EXTABLE(from, to) \ 73 " .pushsection __ex_table, \"a\"\n" \ 74 " .align 3\n" \ 75 " .long (" #from " - .), (" #to " - .)\n" \ 76 " .popsection\n" 77 78 /* 79 * User access enabling/disabling. 80 */ 81 #ifdef CONFIG_ARM64_SW_TTBR0_PAN 82 static inline void __uaccess_ttbr0_disable(void) 83 { 84 unsigned long flags, ttbr; 85 86 local_irq_save(flags); 87 ttbr = read_sysreg(ttbr1_el1); 88 ttbr &= ~TTBR_ASID_MASK; 89 /* reserved_pg_dir placed before swapper_pg_dir */ 90 write_sysreg(ttbr - PAGE_SIZE, ttbr0_el1); 91 isb(); 92 /* Set reserved ASID */ 93 write_sysreg(ttbr, ttbr1_el1); 94 isb(); 95 local_irq_restore(flags); 96 } 97 98 static inline void __uaccess_ttbr0_enable(void) 99 { 100 unsigned long flags, ttbr0, ttbr1; 101 102 /* 103 * Disable interrupts to avoid preemption between reading the 'ttbr0' 104 * variable and the MSR. A context switch could trigger an ASID 105 * roll-over and an update of 'ttbr0'. 106 */ 107 local_irq_save(flags); 108 ttbr0 = READ_ONCE(current_thread_info()->ttbr0); 109 110 /* Restore active ASID */ 111 ttbr1 = read_sysreg(ttbr1_el1); 112 ttbr1 &= ~TTBR_ASID_MASK; /* safety measure */ 113 ttbr1 |= ttbr0 & TTBR_ASID_MASK; 114 write_sysreg(ttbr1, ttbr1_el1); 115 isb(); 116 117 /* Restore user page table */ 118 write_sysreg(ttbr0, ttbr0_el1); 119 isb(); 120 local_irq_restore(flags); 121 } 122 123 static inline bool uaccess_ttbr0_disable(void) 124 { 125 if (!system_uses_ttbr0_pan()) 126 return false; 127 __uaccess_ttbr0_disable(); 128 return true; 129 } 130 131 static inline bool uaccess_ttbr0_enable(void) 132 { 133 if (!system_uses_ttbr0_pan()) 134 return false; 135 __uaccess_ttbr0_enable(); 136 return true; 137 } 138 #else 139 static inline bool uaccess_ttbr0_disable(void) 140 { 141 return false; 142 } 143 144 static inline bool uaccess_ttbr0_enable(void) 145 { 146 return false; 147 } 148 #endif 149 150 static inline void __uaccess_disable_hw_pan(void) 151 { 152 asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN, 153 CONFIG_ARM64_PAN)); 154 } 155 156 static inline void __uaccess_enable_hw_pan(void) 157 { 158 asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, 159 CONFIG_ARM64_PAN)); 160 } 161 162 /* 163 * The Tag Check Flag (TCF) mode for MTE is per EL, hence TCF0 164 * affects EL0 and TCF affects EL1 irrespective of which TTBR is 165 * used. 166 * The kernel accesses TTBR0 usually with LDTR/STTR instructions 167 * when UAO is available, so these would act as EL0 accesses using 168 * TCF0. 169 * However futex.h code uses exclusives which would be executed as 170 * EL1, this can potentially cause a tag check fault even if the 171 * user disables TCF0. 172 * 173 * To address the problem we set the PSTATE.TCO bit in uaccess_enable() 174 * and reset it in uaccess_disable(). 175 * 176 * The Tag check override (TCO) bit disables temporarily the tag checking 177 * preventing the issue. 178 */ 179 static inline void uaccess_disable_privileged(void) 180 { 181 asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(0), 182 ARM64_MTE, CONFIG_KASAN_HW_TAGS)); 183 184 if (uaccess_ttbr0_disable()) 185 return; 186 187 __uaccess_enable_hw_pan(); 188 } 189 190 static inline void uaccess_enable_privileged(void) 191 { 192 asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(1), 193 ARM64_MTE, CONFIG_KASAN_HW_TAGS)); 194 195 if (uaccess_ttbr0_enable()) 196 return; 197 198 __uaccess_disable_hw_pan(); 199 } 200 201 /* 202 * Sanitise a uaccess pointer such that it becomes NULL if above the maximum 203 * user address. In case the pointer is tagged (has the top byte set), untag 204 * the pointer before checking. 205 */ 206 #define uaccess_mask_ptr(ptr) (__typeof__(ptr))__uaccess_mask_ptr(ptr) 207 static inline void __user *__uaccess_mask_ptr(const void __user *ptr) 208 { 209 void __user *safe_ptr; 210 211 asm volatile( 212 " bics xzr, %3, %2\n" 213 " csel %0, %1, xzr, eq\n" 214 : "=&r" (safe_ptr) 215 : "r" (ptr), "r" (TASK_SIZE_MAX - 1), 216 "r" (untagged_addr(ptr)) 217 : "cc"); 218 219 csdb(); 220 return safe_ptr; 221 } 222 223 /* 224 * The "__xxx" versions of the user access functions do not verify the address 225 * space - it must have been done previously with a separate "access_ok()" 226 * call. 227 * 228 * The "__xxx_error" versions set the third argument to -EFAULT if an error 229 * occurs, and leave it unchanged on success. 230 */ 231 #define __get_mem_asm(load, reg, x, addr, err) \ 232 asm volatile( \ 233 "1: " load " " reg "1, [%2]\n" \ 234 "2:\n" \ 235 " .section .fixup, \"ax\"\n" \ 236 " .align 2\n" \ 237 "3: mov %w0, %3\n" \ 238 " mov %1, #0\n" \ 239 " b 2b\n" \ 240 " .previous\n" \ 241 _ASM_EXTABLE(1b, 3b) \ 242 : "+r" (err), "=&r" (x) \ 243 : "r" (addr), "i" (-EFAULT)) 244 245 #define __raw_get_mem(ldr, x, ptr, err) \ 246 do { \ 247 unsigned long __gu_val; \ 248 switch (sizeof(*(ptr))) { \ 249 case 1: \ 250 __get_mem_asm(ldr "b", "%w", __gu_val, (ptr), (err)); \ 251 break; \ 252 case 2: \ 253 __get_mem_asm(ldr "h", "%w", __gu_val, (ptr), (err)); \ 254 break; \ 255 case 4: \ 256 __get_mem_asm(ldr, "%w", __gu_val, (ptr), (err)); \ 257 break; \ 258 case 8: \ 259 __get_mem_asm(ldr, "%x", __gu_val, (ptr), (err)); \ 260 break; \ 261 default: \ 262 BUILD_BUG(); \ 263 } \ 264 (x) = (__force __typeof__(*(ptr)))__gu_val; \ 265 } while (0) 266 267 #define __raw_get_user(x, ptr, err) \ 268 do { \ 269 __chk_user_ptr(ptr); \ 270 uaccess_ttbr0_enable(); \ 271 __raw_get_mem("ldtr", x, ptr, err); \ 272 uaccess_ttbr0_disable(); \ 273 } while (0) 274 275 #define __get_user_error(x, ptr, err) \ 276 do { \ 277 __typeof__(*(ptr)) __user *__p = (ptr); \ 278 might_fault(); \ 279 if (access_ok(__p, sizeof(*__p))) { \ 280 __p = uaccess_mask_ptr(__p); \ 281 __raw_get_user((x), __p, (err)); \ 282 } else { \ 283 (x) = (__force __typeof__(x))0; (err) = -EFAULT; \ 284 } \ 285 } while (0) 286 287 #define __get_user(x, ptr) \ 288 ({ \ 289 int __gu_err = 0; \ 290 __get_user_error((x), (ptr), __gu_err); \ 291 __gu_err; \ 292 }) 293 294 #define get_user __get_user 295 296 #define __get_kernel_nofault(dst, src, type, err_label) \ 297 do { \ 298 int __gkn_err = 0; \ 299 \ 300 __raw_get_mem("ldr", *((type *)(dst)), \ 301 (__force type *)(src), __gkn_err); \ 302 if (unlikely(__gkn_err)) \ 303 goto err_label; \ 304 } while (0) 305 306 #define __put_mem_asm(store, reg, x, addr, err) \ 307 asm volatile( \ 308 "1: " store " " reg "1, [%2]\n" \ 309 "2:\n" \ 310 " .section .fixup,\"ax\"\n" \ 311 " .align 2\n" \ 312 "3: mov %w0, %3\n" \ 313 " b 2b\n" \ 314 " .previous\n" \ 315 _ASM_EXTABLE(1b, 3b) \ 316 : "+r" (err) \ 317 : "r" (x), "r" (addr), "i" (-EFAULT)) 318 319 #define __raw_put_mem(str, x, ptr, err) \ 320 do { \ 321 __typeof__(*(ptr)) __pu_val = (x); \ 322 switch (sizeof(*(ptr))) { \ 323 case 1: \ 324 __put_mem_asm(str "b", "%w", __pu_val, (ptr), (err)); \ 325 break; \ 326 case 2: \ 327 __put_mem_asm(str "h", "%w", __pu_val, (ptr), (err)); \ 328 break; \ 329 case 4: \ 330 __put_mem_asm(str, "%w", __pu_val, (ptr), (err)); \ 331 break; \ 332 case 8: \ 333 __put_mem_asm(str, "%x", __pu_val, (ptr), (err)); \ 334 break; \ 335 default: \ 336 BUILD_BUG(); \ 337 } \ 338 } while (0) 339 340 #define __raw_put_user(x, ptr, err) \ 341 do { \ 342 __chk_user_ptr(ptr); \ 343 uaccess_ttbr0_enable(); \ 344 __raw_put_mem("sttr", x, ptr, err); \ 345 uaccess_ttbr0_disable(); \ 346 } while (0) 347 348 #define __put_user_error(x, ptr, err) \ 349 do { \ 350 __typeof__(*(ptr)) __user *__p = (ptr); \ 351 might_fault(); \ 352 if (access_ok(__p, sizeof(*__p))) { \ 353 __p = uaccess_mask_ptr(__p); \ 354 __raw_put_user((x), __p, (err)); \ 355 } else { \ 356 (err) = -EFAULT; \ 357 } \ 358 } while (0) 359 360 #define __put_user(x, ptr) \ 361 ({ \ 362 int __pu_err = 0; \ 363 __put_user_error((x), (ptr), __pu_err); \ 364 __pu_err; \ 365 }) 366 367 #define put_user __put_user 368 369 #define __put_kernel_nofault(dst, src, type, err_label) \ 370 do { \ 371 int __pkn_err = 0; \ 372 \ 373 __raw_put_mem("str", *((type *)(src)), \ 374 (__force type *)(dst), __pkn_err); \ 375 if (unlikely(__pkn_err)) \ 376 goto err_label; \ 377 } while(0) 378 379 extern unsigned long __must_check __arch_copy_from_user(void *to, const void __user *from, unsigned long n); 380 #define raw_copy_from_user(to, from, n) \ 381 ({ \ 382 unsigned long __acfu_ret; \ 383 uaccess_ttbr0_enable(); \ 384 __acfu_ret = __arch_copy_from_user((to), \ 385 __uaccess_mask_ptr(from), (n)); \ 386 uaccess_ttbr0_disable(); \ 387 __acfu_ret; \ 388 }) 389 390 extern unsigned long __must_check __arch_copy_to_user(void __user *to, const void *from, unsigned long n); 391 #define raw_copy_to_user(to, from, n) \ 392 ({ \ 393 unsigned long __actu_ret; \ 394 uaccess_ttbr0_enable(); \ 395 __actu_ret = __arch_copy_to_user(__uaccess_mask_ptr(to), \ 396 (from), (n)); \ 397 uaccess_ttbr0_disable(); \ 398 __actu_ret; \ 399 }) 400 401 extern unsigned long __must_check __arch_copy_in_user(void __user *to, const void __user *from, unsigned long n); 402 #define raw_copy_in_user(to, from, n) \ 403 ({ \ 404 unsigned long __aciu_ret; \ 405 uaccess_ttbr0_enable(); \ 406 __aciu_ret = __arch_copy_in_user(__uaccess_mask_ptr(to), \ 407 __uaccess_mask_ptr(from), (n)); \ 408 uaccess_ttbr0_disable(); \ 409 __aciu_ret; \ 410 }) 411 412 #define INLINE_COPY_TO_USER 413 #define INLINE_COPY_FROM_USER 414 415 extern unsigned long __must_check __arch_clear_user(void __user *to, unsigned long n); 416 static inline unsigned long __must_check __clear_user(void __user *to, unsigned long n) 417 { 418 if (access_ok(to, n)) { 419 uaccess_ttbr0_enable(); 420 n = __arch_clear_user(__uaccess_mask_ptr(to), n); 421 uaccess_ttbr0_disable(); 422 } 423 return n; 424 } 425 #define clear_user __clear_user 426 427 extern long strncpy_from_user(char *dest, const char __user *src, long count); 428 429 extern __must_check long strnlen_user(const char __user *str, long n); 430 431 #ifdef CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE 432 struct page; 433 void memcpy_page_flushcache(char *to, struct page *page, size_t offset, size_t len); 434 extern unsigned long __must_check __copy_user_flushcache(void *to, const void __user *from, unsigned long n); 435 436 static inline int __copy_from_user_flushcache(void *dst, const void __user *src, unsigned size) 437 { 438 kasan_check_write(dst, size); 439 return __copy_user_flushcache(dst, __uaccess_mask_ptr(src), size); 440 } 441 #endif 442 443 #endif /* __ASM_UACCESS_H */ 444