xref: /openbmc/linux/arch/arm64/include/asm/smp.h (revision 78bb17f7)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2012 ARM Ltd.
4  */
5 #ifndef __ASM_SMP_H
6 #define __ASM_SMP_H
7 
8 #include <linux/const.h>
9 
10 /* Values for secondary_data.status */
11 #define CPU_STUCK_REASON_SHIFT		(8)
12 #define CPU_BOOT_STATUS_MASK		((UL(1) << CPU_STUCK_REASON_SHIFT) - 1)
13 
14 #define CPU_MMU_OFF			(-1)
15 #define CPU_BOOT_SUCCESS		(0)
16 /* The cpu invoked ops->cpu_die, synchronise it with cpu_kill */
17 #define CPU_KILL_ME			(1)
18 /* The cpu couldn't die gracefully and is looping in the kernel */
19 #define CPU_STUCK_IN_KERNEL		(2)
20 /* Fatal system error detected by secondary CPU, crash the system */
21 #define CPU_PANIC_KERNEL		(3)
22 
23 #define CPU_STUCK_REASON_52_BIT_VA	(UL(1) << CPU_STUCK_REASON_SHIFT)
24 #define CPU_STUCK_REASON_NO_GRAN	(UL(2) << CPU_STUCK_REASON_SHIFT)
25 
26 /* Possible options for __cpu_setup */
27 /* Option to setup primary cpu */
28 #define ARM64_CPU_BOOT_PRIMARY		(1)
29 /* Option to setup secondary cpus */
30 #define ARM64_CPU_BOOT_SECONDARY	(2)
31 /* Option to setup cpus for different cpu run time services */
32 #define ARM64_CPU_RUNTIME		(3)
33 
34 #ifndef __ASSEMBLY__
35 
36 #include <asm/percpu.h>
37 
38 #include <linux/threads.h>
39 #include <linux/cpumask.h>
40 #include <linux/thread_info.h>
41 #include <asm/pointer_auth.h>
42 
43 DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number);
44 
45 /*
46  * We don't use this_cpu_read(cpu_number) as that has implicit writes to
47  * preempt_count, and associated (compiler) barriers, that we'd like to avoid
48  * the expense of. If we're preemptible, the value can be stale at use anyway.
49  * And we can't use this_cpu_ptr() either, as that winds up recursing back
50  * here under CONFIG_DEBUG_PREEMPT=y.
51  */
52 #define raw_smp_processor_id() (*raw_cpu_ptr(&cpu_number))
53 
54 /*
55  * Logical CPU mapping.
56  */
57 extern u64 __cpu_logical_map[NR_CPUS];
58 #define cpu_logical_map(cpu)    __cpu_logical_map[cpu]
59 
60 struct seq_file;
61 
62 /*
63  * generate IPI list text
64  */
65 extern void show_ipi_list(struct seq_file *p, int prec);
66 
67 /*
68  * Called from C code, this handles an IPI.
69  */
70 extern void handle_IPI(int ipinr, struct pt_regs *regs);
71 
72 /*
73  * Discover the set of possible CPUs and determine their
74  * SMP operations.
75  */
76 extern void smp_init_cpus(void);
77 
78 /*
79  * Provide a function to raise an IPI cross call on CPUs in callmap.
80  */
81 extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned int));
82 
83 extern void (*__smp_cross_call)(const struct cpumask *, unsigned int);
84 
85 /*
86  * Called from the secondary holding pen, this is the secondary CPU entry point.
87  */
88 asmlinkage void secondary_start_kernel(void);
89 
90 /*
91  * Initial data for bringing up a secondary CPU.
92  * @stack  - sp for the secondary CPU
93  * @status - Result passed back from the secondary CPU to
94  *           indicate failure.
95  */
96 struct secondary_data {
97 	void *stack;
98 	struct task_struct *task;
99 #ifdef CONFIG_ARM64_PTR_AUTH
100 	struct ptrauth_keys_kernel ptrauth_key;
101 #endif
102 	long status;
103 };
104 
105 extern struct secondary_data secondary_data;
106 extern long __early_cpu_boot_status;
107 extern void secondary_entry(void);
108 
109 extern void arch_send_call_function_single_ipi(int cpu);
110 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
111 
112 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
113 extern void arch_send_wakeup_ipi_mask(const struct cpumask *mask);
114 #else
115 static inline void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
116 {
117 	BUILD_BUG();
118 }
119 #endif
120 
121 extern int __cpu_disable(void);
122 
123 extern void __cpu_die(unsigned int cpu);
124 extern void cpu_die(void);
125 extern void cpu_die_early(void);
126 
127 static inline void cpu_park_loop(void)
128 {
129 	for (;;) {
130 		wfe();
131 		wfi();
132 	}
133 }
134 
135 static inline void update_cpu_boot_status(int val)
136 {
137 	WRITE_ONCE(secondary_data.status, val);
138 	/* Ensure the visibility of the status update */
139 	dsb(ishst);
140 }
141 
142 /*
143  * The calling secondary CPU has detected serious configuration mismatch,
144  * which calls for a kernel panic. Update the boot status and park the calling
145  * CPU.
146  */
147 static inline void cpu_panic_kernel(void)
148 {
149 	update_cpu_boot_status(CPU_PANIC_KERNEL);
150 	cpu_park_loop();
151 }
152 
153 /*
154  * If a secondary CPU enters the kernel but fails to come online,
155  * (e.g. due to mismatched features), and cannot exit the kernel,
156  * we increment cpus_stuck_in_kernel and leave the CPU in a
157  * quiesecent loop within the kernel text. The memory containing
158  * this loop must not be re-used for anything else as the 'stuck'
159  * core is executing it.
160  *
161  * This function is used to inhibit features like kexec and hibernate.
162  */
163 bool cpus_are_stuck_in_kernel(void);
164 
165 extern void crash_smp_send_stop(void);
166 extern bool smp_crash_stop_failed(void);
167 
168 #endif /* ifndef __ASSEMBLY__ */
169 
170 #endif /* ifndef __ASM_SMP_H */
171