1 /* 2 * Based on arch/arm/include/asm/ptrace.h 3 * 4 * Copyright (C) 1996-2003 Russell King 5 * Copyright (C) 2012 ARM Ltd. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 #ifndef __ASM_PTRACE_H 20 #define __ASM_PTRACE_H 21 22 #include <uapi/asm/ptrace.h> 23 24 /* Current Exception Level values, as contained in CurrentEL */ 25 #define CurrentEL_EL1 (1 << 2) 26 #define CurrentEL_EL2 (2 << 2) 27 28 /* AArch32-specific ptrace requests */ 29 #define COMPAT_PTRACE_GETREGS 12 30 #define COMPAT_PTRACE_SETREGS 13 31 #define COMPAT_PTRACE_GET_THREAD_AREA 22 32 #define COMPAT_PTRACE_SET_SYSCALL 23 33 #define COMPAT_PTRACE_GETVFPREGS 27 34 #define COMPAT_PTRACE_SETVFPREGS 28 35 #define COMPAT_PTRACE_GETHBPREGS 29 36 #define COMPAT_PTRACE_SETHBPREGS 30 37 38 /* AArch32 CPSR bits */ 39 #define COMPAT_PSR_MODE_MASK 0x0000001f 40 #define COMPAT_PSR_MODE_USR 0x00000010 41 #define COMPAT_PSR_MODE_FIQ 0x00000011 42 #define COMPAT_PSR_MODE_IRQ 0x00000012 43 #define COMPAT_PSR_MODE_SVC 0x00000013 44 #define COMPAT_PSR_MODE_ABT 0x00000017 45 #define COMPAT_PSR_MODE_HYP 0x0000001a 46 #define COMPAT_PSR_MODE_UND 0x0000001b 47 #define COMPAT_PSR_MODE_SYS 0x0000001f 48 #define COMPAT_PSR_T_BIT 0x00000020 49 #define COMPAT_PSR_F_BIT 0x00000040 50 #define COMPAT_PSR_I_BIT 0x00000080 51 #define COMPAT_PSR_A_BIT 0x00000100 52 #define COMPAT_PSR_E_BIT 0x00000200 53 #define COMPAT_PSR_J_BIT 0x01000000 54 #define COMPAT_PSR_Q_BIT 0x08000000 55 #define COMPAT_PSR_V_BIT 0x10000000 56 #define COMPAT_PSR_C_BIT 0x20000000 57 #define COMPAT_PSR_Z_BIT 0x40000000 58 #define COMPAT_PSR_N_BIT 0x80000000 59 #define COMPAT_PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */ 60 #define COMPAT_PSR_GE_MASK 0x000f0000 61 62 #ifdef CONFIG_CPU_BIG_ENDIAN 63 #define COMPAT_PSR_ENDSTATE COMPAT_PSR_E_BIT 64 #else 65 #define COMPAT_PSR_ENDSTATE 0 66 #endif 67 68 /* 69 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a 70 * process is located in memory. 71 */ 72 #define COMPAT_PT_TEXT_ADDR 0x10000 73 #define COMPAT_PT_DATA_ADDR 0x10004 74 #define COMPAT_PT_TEXT_END_ADDR 0x10008 75 #ifndef __ASSEMBLY__ 76 #include <linux/bug.h> 77 78 /* sizeof(struct user) for AArch32 */ 79 #define COMPAT_USER_SZ 296 80 81 /* Architecturally defined mapping between AArch32 and AArch64 registers */ 82 #define compat_usr(x) regs[(x)] 83 #define compat_fp regs[11] 84 #define compat_sp regs[13] 85 #define compat_lr regs[14] 86 #define compat_sp_hyp regs[15] 87 #define compat_lr_irq regs[16] 88 #define compat_sp_irq regs[17] 89 #define compat_lr_svc regs[18] 90 #define compat_sp_svc regs[19] 91 #define compat_lr_abt regs[20] 92 #define compat_sp_abt regs[21] 93 #define compat_lr_und regs[22] 94 #define compat_sp_und regs[23] 95 #define compat_r8_fiq regs[24] 96 #define compat_r9_fiq regs[25] 97 #define compat_r10_fiq regs[26] 98 #define compat_r11_fiq regs[27] 99 #define compat_r12_fiq regs[28] 100 #define compat_sp_fiq regs[29] 101 #define compat_lr_fiq regs[30] 102 103 /* 104 * This struct defines the way the registers are stored on the stack during an 105 * exception. Note that sizeof(struct pt_regs) has to be a multiple of 16 (for 106 * stack alignment). struct user_pt_regs must form a prefix of struct pt_regs. 107 */ 108 struct pt_regs { 109 union { 110 struct user_pt_regs user_regs; 111 struct { 112 u64 regs[31]; 113 u64 sp; 114 u64 pc; 115 u64 pstate; 116 }; 117 }; 118 u64 orig_x0; 119 u64 syscallno; 120 u64 orig_addr_limit; 121 u64 unused; // maintain 16 byte alignment 122 }; 123 124 #define MAX_REG_OFFSET offsetof(struct pt_regs, pstate) 125 126 #define arch_has_single_step() (1) 127 128 #ifdef CONFIG_COMPAT 129 #define compat_thumb_mode(regs) \ 130 (((regs)->pstate & COMPAT_PSR_T_BIT)) 131 #else 132 #define compat_thumb_mode(regs) (0) 133 #endif 134 135 #define user_mode(regs) \ 136 (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t) 137 138 #define compat_user_mode(regs) \ 139 (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \ 140 (PSR_MODE32_BIT | PSR_MODE_EL0t)) 141 142 #define processor_mode(regs) \ 143 ((regs)->pstate & PSR_MODE_MASK) 144 145 #define interrupts_enabled(regs) \ 146 (!((regs)->pstate & PSR_I_BIT)) 147 148 #define fast_interrupts_enabled(regs) \ 149 (!((regs)->pstate & PSR_F_BIT)) 150 151 #define GET_USP(regs) \ 152 (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp) 153 154 #define SET_USP(ptregs, value) \ 155 (!compat_user_mode(regs) ? ((regs)->sp = value) : ((regs)->compat_sp = value)) 156 157 extern int regs_query_register_offset(const char *name); 158 extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, 159 unsigned int n); 160 161 /** 162 * regs_get_register() - get register value from its offset 163 * @regs: pt_regs from which register value is gotten 164 * @offset: offset of the register. 165 * 166 * regs_get_register returns the value of a register whose offset from @regs. 167 * The @offset is the offset of the register in struct pt_regs. 168 * If @offset is bigger than MAX_REG_OFFSET, this returns 0. 169 */ 170 static inline u64 regs_get_register(struct pt_regs *regs, unsigned int offset) 171 { 172 u64 val = 0; 173 174 WARN_ON(offset & 7); 175 176 offset >>= 3; 177 switch (offset) { 178 case 0 ... 30: 179 val = regs->regs[offset]; 180 break; 181 case offsetof(struct pt_regs, sp) >> 3: 182 val = regs->sp; 183 break; 184 case offsetof(struct pt_regs, pc) >> 3: 185 val = regs->pc; 186 break; 187 case offsetof(struct pt_regs, pstate) >> 3: 188 val = regs->pstate; 189 break; 190 default: 191 val = 0; 192 } 193 194 return val; 195 } 196 197 /* 198 * Read a register given an architectural register index r. 199 * This handles the common case where 31 means XZR, not SP. 200 */ 201 static inline unsigned long pt_regs_read_reg(const struct pt_regs *regs, int r) 202 { 203 return (r == 31) ? 0 : regs->regs[r]; 204 } 205 206 /* 207 * Write a register given an architectural register index r. 208 * This handles the common case where 31 means XZR, not SP. 209 */ 210 static inline void pt_regs_write_reg(struct pt_regs *regs, int r, 211 unsigned long val) 212 { 213 if (r != 31) 214 regs->regs[r] = val; 215 } 216 217 /* Valid only for Kernel mode traps. */ 218 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) 219 { 220 return regs->sp; 221 } 222 223 static inline unsigned long regs_return_value(struct pt_regs *regs) 224 { 225 return regs->regs[0]; 226 } 227 228 /* We must avoid circular header include via sched.h */ 229 struct task_struct; 230 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task); 231 232 #define GET_IP(regs) ((unsigned long)(regs)->pc) 233 #define SET_IP(regs, value) ((regs)->pc = ((u64) (value))) 234 235 #define GET_FP(ptregs) ((unsigned long)(ptregs)->regs[29]) 236 #define SET_FP(ptregs, value) ((ptregs)->regs[29] = ((u64) (value))) 237 238 #include <asm-generic/ptrace.h> 239 240 #define procedure_link_pointer(regs) ((regs)->regs[30]) 241 242 static inline void procedure_link_pointer_set(struct pt_regs *regs, 243 unsigned long val) 244 { 245 procedure_link_pointer(regs) = val; 246 } 247 248 #undef profile_pc 249 extern unsigned long profile_pc(struct pt_regs *regs); 250 251 #endif /* __ASSEMBLY__ */ 252 #endif 253