1 /* 2 * Copyright (C) 2012 ARM Ltd. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 #ifndef __ASM_PGTABLE_H 17 #define __ASM_PGTABLE_H 18 19 #include <asm/bug.h> 20 #include <asm/proc-fns.h> 21 22 #include <asm/memory.h> 23 #include <asm/pgtable-hwdef.h> 24 25 /* 26 * Software defined PTE bits definition. 27 */ 28 #define PTE_VALID (_AT(pteval_t, 1) << 0) 29 #define PTE_WRITE (PTE_DBM) /* same as DBM (51) */ 30 #define PTE_DIRTY (_AT(pteval_t, 1) << 55) 31 #define PTE_SPECIAL (_AT(pteval_t, 1) << 56) 32 #define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */ 33 34 /* 35 * VMALLOC and SPARSEMEM_VMEMMAP ranges. 36 * 37 * VMEMAP_SIZE: allows the whole VA space to be covered by a struct page array 38 * (rounded up to PUD_SIZE). 39 * VMALLOC_START: beginning of the kernel VA space 40 * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space, 41 * fixed mappings and modules 42 */ 43 #define VMEMMAP_SIZE ALIGN((1UL << (VA_BITS - PAGE_SHIFT)) * sizeof(struct page), PUD_SIZE) 44 45 #ifndef CONFIG_KASAN 46 #define VMALLOC_START (VA_START) 47 #else 48 #include <asm/kasan.h> 49 #define VMALLOC_START (KASAN_SHADOW_END + SZ_64K) 50 #endif 51 52 #define VMALLOC_END (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K) 53 54 #define vmemmap ((struct page *)(VMALLOC_END + SZ_64K)) 55 56 #define FIRST_USER_ADDRESS 0UL 57 58 #ifndef __ASSEMBLY__ 59 60 #include <linux/mmdebug.h> 61 62 extern void __pte_error(const char *file, int line, unsigned long val); 63 extern void __pmd_error(const char *file, int line, unsigned long val); 64 extern void __pud_error(const char *file, int line, unsigned long val); 65 extern void __pgd_error(const char *file, int line, unsigned long val); 66 67 #define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED) 68 #define PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S) 69 70 #define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRnE)) 71 #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE)) 72 #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_NC)) 73 #define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_WT)) 74 #define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL)) 75 76 #define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE)) 77 #define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL)) 78 #define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL)) 79 80 #define _PAGE_DEFAULT (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL)) 81 82 #define PAGE_KERNEL __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE) 83 #define PAGE_KERNEL_RO __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_RDONLY) 84 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE) 85 #define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_CONT) 86 87 #define PAGE_HYP __pgprot(_PAGE_DEFAULT | PTE_HYP) 88 #define PAGE_HYP_DEVICE __pgprot(PROT_DEVICE_nGnRE | PTE_HYP) 89 90 #define PAGE_S2 __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY) 91 #define PAGE_S2_DEVICE __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_UXN) 92 93 #define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_PXN | PTE_UXN) 94 #define PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE) 95 #define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_WRITE) 96 #define PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN) 97 #define PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN) 98 #define PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN) 99 #define PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN) 100 101 #define __P000 PAGE_NONE 102 #define __P001 PAGE_READONLY 103 #define __P010 PAGE_COPY 104 #define __P011 PAGE_COPY 105 #define __P100 PAGE_READONLY_EXEC 106 #define __P101 PAGE_READONLY_EXEC 107 #define __P110 PAGE_COPY_EXEC 108 #define __P111 PAGE_COPY_EXEC 109 110 #define __S000 PAGE_NONE 111 #define __S001 PAGE_READONLY 112 #define __S010 PAGE_SHARED 113 #define __S011 PAGE_SHARED 114 #define __S100 PAGE_READONLY_EXEC 115 #define __S101 PAGE_READONLY_EXEC 116 #define __S110 PAGE_SHARED_EXEC 117 #define __S111 PAGE_SHARED_EXEC 118 119 /* 120 * ZERO_PAGE is a global shared page that is always zero: used 121 * for zero-mapped memory areas etc.. 122 */ 123 extern struct page *empty_zero_page; 124 #define ZERO_PAGE(vaddr) (empty_zero_page) 125 126 #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte)) 127 128 #define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT) 129 130 #define pfn_pte(pfn,prot) (__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))) 131 132 #define pte_none(pte) (!pte_val(pte)) 133 #define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0)) 134 #define pte_page(pte) (pfn_to_page(pte_pfn(pte))) 135 136 /* Find an entry in the third-level page table. */ 137 #define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 138 139 #define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + pte_index(addr)) 140 141 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr)) 142 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr)) 143 #define pte_unmap(pte) do { } while (0) 144 #define pte_unmap_nested(pte) do { } while (0) 145 146 /* 147 * The following only work if pte_present(). Undefined behaviour otherwise. 148 */ 149 #define pte_present(pte) (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE))) 150 #define pte_young(pte) (!!(pte_val(pte) & PTE_AF)) 151 #define pte_special(pte) (!!(pte_val(pte) & PTE_SPECIAL)) 152 #define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE)) 153 #define pte_exec(pte) (!(pte_val(pte) & PTE_UXN)) 154 #define pte_cont(pte) (!!(pte_val(pte) & PTE_CONT)) 155 156 #ifdef CONFIG_ARM64_HW_AFDBM 157 #define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY)) 158 #else 159 #define pte_hw_dirty(pte) (0) 160 #endif 161 #define pte_sw_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY)) 162 #define pte_dirty(pte) (pte_sw_dirty(pte) || pte_hw_dirty(pte)) 163 164 #define pte_valid(pte) (!!(pte_val(pte) & PTE_VALID)) 165 #define pte_valid_user(pte) \ 166 ((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER)) 167 #define pte_valid_not_user(pte) \ 168 ((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID) 169 170 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot) 171 { 172 pte_val(pte) &= ~pgprot_val(prot); 173 return pte; 174 } 175 176 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot) 177 { 178 pte_val(pte) |= pgprot_val(prot); 179 return pte; 180 } 181 182 static inline pte_t pte_wrprotect(pte_t pte) 183 { 184 return clear_pte_bit(pte, __pgprot(PTE_WRITE)); 185 } 186 187 static inline pte_t pte_mkwrite(pte_t pte) 188 { 189 return set_pte_bit(pte, __pgprot(PTE_WRITE)); 190 } 191 192 static inline pte_t pte_mkclean(pte_t pte) 193 { 194 return clear_pte_bit(pte, __pgprot(PTE_DIRTY)); 195 } 196 197 static inline pte_t pte_mkdirty(pte_t pte) 198 { 199 return set_pte_bit(pte, __pgprot(PTE_DIRTY)); 200 } 201 202 static inline pte_t pte_mkold(pte_t pte) 203 { 204 return clear_pte_bit(pte, __pgprot(PTE_AF)); 205 } 206 207 static inline pte_t pte_mkyoung(pte_t pte) 208 { 209 return set_pte_bit(pte, __pgprot(PTE_AF)); 210 } 211 212 static inline pte_t pte_mkspecial(pte_t pte) 213 { 214 return set_pte_bit(pte, __pgprot(PTE_SPECIAL)); 215 } 216 217 static inline pte_t pte_mkcont(pte_t pte) 218 { 219 return set_pte_bit(pte, __pgprot(PTE_CONT)); 220 } 221 222 static inline pte_t pte_mknoncont(pte_t pte) 223 { 224 return clear_pte_bit(pte, __pgprot(PTE_CONT)); 225 } 226 227 static inline void set_pte(pte_t *ptep, pte_t pte) 228 { 229 *ptep = pte; 230 231 /* 232 * Only if the new pte is valid and kernel, otherwise TLB maintenance 233 * or update_mmu_cache() have the necessary barriers. 234 */ 235 if (pte_valid_not_user(pte)) { 236 dsb(ishst); 237 isb(); 238 } 239 } 240 241 struct mm_struct; 242 struct vm_area_struct; 243 244 extern void __sync_icache_dcache(pte_t pteval, unsigned long addr); 245 246 /* 247 * PTE bits configuration in the presence of hardware Dirty Bit Management 248 * (PTE_WRITE == PTE_DBM): 249 * 250 * Dirty Writable | PTE_RDONLY PTE_WRITE PTE_DIRTY (sw) 251 * 0 0 | 1 0 0 252 * 0 1 | 1 1 0 253 * 1 0 | 1 0 1 254 * 1 1 | 0 1 x 255 * 256 * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via 257 * the page fault mechanism. Checking the dirty status of a pte becomes: 258 * 259 * PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY) 260 */ 261 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 262 pte_t *ptep, pte_t pte) 263 { 264 if (pte_valid_user(pte)) { 265 if (!pte_special(pte) && pte_exec(pte)) 266 __sync_icache_dcache(pte, addr); 267 if (pte_sw_dirty(pte) && pte_write(pte)) 268 pte_val(pte) &= ~PTE_RDONLY; 269 else 270 pte_val(pte) |= PTE_RDONLY; 271 } 272 273 /* 274 * If the existing pte is valid, check for potential race with 275 * hardware updates of the pte (ptep_set_access_flags safely changes 276 * valid ptes without going through an invalid entry). 277 */ 278 if (IS_ENABLED(CONFIG_DEBUG_VM) && IS_ENABLED(CONFIG_ARM64_HW_AFDBM) && 279 pte_valid(*ptep)) { 280 BUG_ON(!pte_young(pte)); 281 BUG_ON(pte_write(*ptep) && !pte_dirty(pte)); 282 } 283 284 set_pte(ptep, pte); 285 } 286 287 /* 288 * Huge pte definitions. 289 */ 290 #define pte_huge(pte) (!(pte_val(pte) & PTE_TABLE_BIT)) 291 #define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT)) 292 293 /* 294 * Hugetlb definitions. 295 */ 296 #define HUGE_MAX_HSTATE 2 297 #define HPAGE_SHIFT PMD_SHIFT 298 #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT) 299 #define HPAGE_MASK (~(HPAGE_SIZE - 1)) 300 #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 301 302 #define __HAVE_ARCH_PTE_SPECIAL 303 304 static inline pte_t pud_pte(pud_t pud) 305 { 306 return __pte(pud_val(pud)); 307 } 308 309 static inline pmd_t pud_pmd(pud_t pud) 310 { 311 return __pmd(pud_val(pud)); 312 } 313 314 static inline pte_t pmd_pte(pmd_t pmd) 315 { 316 return __pte(pmd_val(pmd)); 317 } 318 319 static inline pmd_t pte_pmd(pte_t pte) 320 { 321 return __pmd(pte_val(pte)); 322 } 323 324 static inline pgprot_t mk_sect_prot(pgprot_t prot) 325 { 326 return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT); 327 } 328 329 /* 330 * THP definitions. 331 */ 332 333 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 334 #define pmd_trans_huge(pmd) (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT)) 335 #define pmd_trans_splitting(pmd) pte_special(pmd_pte(pmd)) 336 #ifdef CONFIG_HAVE_RCU_TABLE_FREE 337 #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH 338 struct vm_area_struct; 339 void pmdp_splitting_flush(struct vm_area_struct *vma, unsigned long address, 340 pmd_t *pmdp); 341 #endif /* CONFIG_HAVE_RCU_TABLE_FREE */ 342 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 343 344 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd)) 345 #define pmd_young(pmd) pte_young(pmd_pte(pmd)) 346 #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd))) 347 #define pmd_mksplitting(pmd) pte_pmd(pte_mkspecial(pmd_pte(pmd))) 348 #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd))) 349 #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd))) 350 #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd))) 351 #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd))) 352 #define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK)) 353 354 #define __HAVE_ARCH_PMD_WRITE 355 #define pmd_write(pmd) pte_write(pmd_pte(pmd)) 356 357 #define pmd_mkhuge(pmd) (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT)) 358 359 #define pmd_pfn(pmd) (((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT) 360 #define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))) 361 #define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot) 362 363 #define pud_write(pud) pte_write(pud_pte(pud)) 364 #define pud_pfn(pud) (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT) 365 366 #define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd)) 367 368 static inline int has_transparent_hugepage(void) 369 { 370 return 1; 371 } 372 373 #define __pgprot_modify(prot,mask,bits) \ 374 __pgprot((pgprot_val(prot) & ~(mask)) | (bits)) 375 376 /* 377 * Mark the prot value as uncacheable and unbufferable. 378 */ 379 #define pgprot_noncached(prot) \ 380 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN) 381 #define pgprot_writecombine(prot) \ 382 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN) 383 #define pgprot_device(prot) \ 384 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN) 385 #define __HAVE_PHYS_MEM_ACCESS_PROT 386 struct file; 387 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 388 unsigned long size, pgprot_t vma_prot); 389 390 #define pmd_none(pmd) (!pmd_val(pmd)) 391 #define pmd_present(pmd) (pmd_val(pmd)) 392 393 #define pmd_bad(pmd) (!(pmd_val(pmd) & 2)) 394 395 #define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \ 396 PMD_TYPE_TABLE) 397 #define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \ 398 PMD_TYPE_SECT) 399 400 #ifdef CONFIG_ARM64_64K_PAGES 401 #define pud_sect(pud) (0) 402 #define pud_table(pud) (1) 403 #else 404 #define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \ 405 PUD_TYPE_SECT) 406 #define pud_table(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \ 407 PUD_TYPE_TABLE) 408 #endif 409 410 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd) 411 { 412 *pmdp = pmd; 413 dsb(ishst); 414 isb(); 415 } 416 417 static inline void pmd_clear(pmd_t *pmdp) 418 { 419 set_pmd(pmdp, __pmd(0)); 420 } 421 422 static inline pte_t *pmd_page_vaddr(pmd_t pmd) 423 { 424 return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK); 425 } 426 427 #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK)) 428 429 /* 430 * Conversion functions: convert a page and protection to a page entry, 431 * and a page entry and page directory to the page they refer to. 432 */ 433 #define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot) 434 435 #if CONFIG_PGTABLE_LEVELS > 2 436 437 #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd)) 438 439 #define pud_none(pud) (!pud_val(pud)) 440 #define pud_bad(pud) (!(pud_val(pud) & 2)) 441 #define pud_present(pud) (pud_val(pud)) 442 443 static inline void set_pud(pud_t *pudp, pud_t pud) 444 { 445 *pudp = pud; 446 dsb(ishst); 447 isb(); 448 } 449 450 static inline void pud_clear(pud_t *pudp) 451 { 452 set_pud(pudp, __pud(0)); 453 } 454 455 static inline pmd_t *pud_page_vaddr(pud_t pud) 456 { 457 return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK); 458 } 459 460 /* Find an entry in the second-level page table. */ 461 #define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) 462 463 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr) 464 { 465 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr); 466 } 467 468 #define pud_page(pud) pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK)) 469 470 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 471 472 #if CONFIG_PGTABLE_LEVELS > 3 473 474 #define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud)) 475 476 #define pgd_none(pgd) (!pgd_val(pgd)) 477 #define pgd_bad(pgd) (!(pgd_val(pgd) & 2)) 478 #define pgd_present(pgd) (pgd_val(pgd)) 479 480 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd) 481 { 482 *pgdp = pgd; 483 dsb(ishst); 484 } 485 486 static inline void pgd_clear(pgd_t *pgdp) 487 { 488 set_pgd(pgdp, __pgd(0)); 489 } 490 491 static inline pud_t *pgd_page_vaddr(pgd_t pgd) 492 { 493 return __va(pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK); 494 } 495 496 /* Find an entry in the frst-level page table. */ 497 #define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)) 498 499 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr) 500 { 501 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(addr); 502 } 503 504 #define pgd_page(pgd) pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK)) 505 506 #endif /* CONFIG_PGTABLE_LEVELS > 3 */ 507 508 #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd)) 509 510 /* to find an entry in a page-table-directory */ 511 #define pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 512 513 #define pgd_offset(mm, addr) ((mm)->pgd+pgd_index(addr)) 514 515 /* to find an entry in a kernel page-table-directory */ 516 #define pgd_offset_k(addr) pgd_offset(&init_mm, addr) 517 518 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 519 { 520 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY | 521 PTE_PROT_NONE | PTE_VALID | PTE_WRITE; 522 /* preserve the hardware dirty information */ 523 if (pte_hw_dirty(pte)) 524 pte = pte_mkdirty(pte); 525 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); 526 return pte; 527 } 528 529 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 530 { 531 return pte_pmd(pte_modify(pmd_pte(pmd), newprot)); 532 } 533 534 #ifdef CONFIG_ARM64_HW_AFDBM 535 /* 536 * Atomic pte/pmd modifications. 537 */ 538 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 539 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 540 unsigned long address, 541 pte_t *ptep) 542 { 543 pteval_t pteval; 544 unsigned int tmp, res; 545 546 asm volatile("// ptep_test_and_clear_young\n" 547 " prfm pstl1strm, %2\n" 548 "1: ldxr %0, %2\n" 549 " ubfx %w3, %w0, %5, #1 // extract PTE_AF (young)\n" 550 " and %0, %0, %4 // clear PTE_AF\n" 551 " stxr %w1, %0, %2\n" 552 " cbnz %w1, 1b\n" 553 : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)), "=&r" (res) 554 : "L" (~PTE_AF), "I" (ilog2(PTE_AF))); 555 556 return res; 557 } 558 559 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 560 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 561 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 562 unsigned long address, 563 pmd_t *pmdp) 564 { 565 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp); 566 } 567 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 568 569 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 570 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 571 unsigned long address, pte_t *ptep) 572 { 573 pteval_t old_pteval; 574 unsigned int tmp; 575 576 asm volatile("// ptep_get_and_clear\n" 577 " prfm pstl1strm, %2\n" 578 "1: ldxr %0, %2\n" 579 " stxr %w1, xzr, %2\n" 580 " cbnz %w1, 1b\n" 581 : "=&r" (old_pteval), "=&r" (tmp), "+Q" (pte_val(*ptep))); 582 583 return __pte(old_pteval); 584 } 585 586 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 587 #define __HAVE_ARCH_PMDP_GET_AND_CLEAR 588 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, 589 unsigned long address, pmd_t *pmdp) 590 { 591 return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp)); 592 } 593 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 594 595 /* 596 * ptep_set_wrprotect - mark read-only while trasferring potential hardware 597 * dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit. 598 */ 599 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 600 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) 601 { 602 pteval_t pteval; 603 unsigned long tmp; 604 605 asm volatile("// ptep_set_wrprotect\n" 606 " prfm pstl1strm, %2\n" 607 "1: ldxr %0, %2\n" 608 " tst %0, %4 // check for hw dirty (!PTE_RDONLY)\n" 609 " csel %1, %3, xzr, eq // set PTE_DIRTY|PTE_RDONLY if dirty\n" 610 " orr %0, %0, %1 // if !dirty, PTE_RDONLY is already set\n" 611 " and %0, %0, %5 // clear PTE_WRITE/PTE_DBM\n" 612 " stxr %w1, %0, %2\n" 613 " cbnz %w1, 1b\n" 614 : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)) 615 : "r" (PTE_DIRTY|PTE_RDONLY), "L" (PTE_RDONLY), "L" (~PTE_WRITE) 616 : "cc"); 617 } 618 619 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 620 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 621 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 622 unsigned long address, pmd_t *pmdp) 623 { 624 ptep_set_wrprotect(mm, address, (pte_t *)pmdp); 625 } 626 #endif 627 #endif /* CONFIG_ARM64_HW_AFDBM */ 628 629 extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 630 extern pgd_t idmap_pg_dir[PTRS_PER_PGD]; 631 632 /* 633 * Encode and decode a swap entry: 634 * bits 0-1: present (must be zero) 635 * bits 2-7: swap type 636 * bits 8-57: swap offset 637 */ 638 #define __SWP_TYPE_SHIFT 2 639 #define __SWP_TYPE_BITS 6 640 #define __SWP_OFFSET_BITS 50 641 #define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1) 642 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT) 643 #define __SWP_OFFSET_MASK ((1UL << __SWP_OFFSET_BITS) - 1) 644 645 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK) 646 #define __swp_offset(x) (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK) 647 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) }) 648 649 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 650 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val }) 651 652 /* 653 * Ensure that there are not more swap files than can be encoded in the kernel 654 * PTEs. 655 */ 656 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS) 657 658 extern int kern_addr_valid(unsigned long addr); 659 660 #include <asm-generic/pgtable.h> 661 662 #define pgtable_cache_init() do { } while (0) 663 664 /* 665 * On AArch64, the cache coherency is handled via the set_pte_at() function. 666 */ 667 static inline void update_mmu_cache(struct vm_area_struct *vma, 668 unsigned long addr, pte_t *ptep) 669 { 670 /* 671 * We don't do anything here, so there's a very small chance of 672 * us retaking a user fault which we just fixed up. The alternative 673 * is doing a dsb(ishst), but that penalises the fastpath. 674 */ 675 } 676 677 #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0) 678 679 #define kc_vaddr_to_offset(v) ((v) & ~VA_START) 680 #define kc_offset_to_vaddr(o) ((o) | VA_START) 681 682 #endif /* !__ASSEMBLY__ */ 683 684 #endif /* __ASM_PGTABLE_H */ 685