1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2016 ARM Ltd.
4  */
5 #ifndef __ASM_PGTABLE_PROT_H
6 #define __ASM_PGTABLE_PROT_H
7 
8 #include <asm/memory.h>
9 #include <asm/pgtable-hwdef.h>
10 
11 #include <linux/const.h>
12 
13 /*
14  * Software defined PTE bits definition.
15  */
16 #define PTE_WRITE		(PTE_DBM)		 /* same as DBM (51) */
17 #define PTE_DIRTY		(_AT(pteval_t, 1) << 55)
18 #define PTE_SPECIAL		(_AT(pteval_t, 1) << 56)
19 #define PTE_DEVMAP		(_AT(pteval_t, 1) << 57)
20 #define PTE_PROT_NONE		(_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */
21 
22 #ifndef __ASSEMBLY__
23 
24 #include <asm/cpufeature.h>
25 #include <asm/pgtable-types.h>
26 
27 extern bool arm64_use_ng_mappings;
28 
29 #define _PROT_DEFAULT		(PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
30 #define _PROT_SECT_DEFAULT	(PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
31 
32 #define PTE_MAYBE_NG		(arm64_use_ng_mappings ? PTE_NG : 0)
33 #define PMD_MAYBE_NG		(arm64_use_ng_mappings ? PMD_SECT_NG : 0)
34 
35 /*
36  * If we have userspace only BTI we don't want to mark kernel pages
37  * guarded even if the system does support BTI.
38  */
39 #ifdef CONFIG_ARM64_BTI_KERNEL
40 #define PTE_MAYBE_GP		(system_supports_bti() ? PTE_GP : 0)
41 #else
42 #define PTE_MAYBE_GP		0
43 #endif
44 
45 #define PROT_DEFAULT		(_PROT_DEFAULT | PTE_MAYBE_NG)
46 #define PROT_SECT_DEFAULT	(_PROT_SECT_DEFAULT | PMD_MAYBE_NG)
47 
48 #define PROT_DEVICE_nGnRnE	(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
49 #define PROT_DEVICE_nGnRE	(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
50 #define PROT_NORMAL_NC		(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
51 #define PROT_NORMAL_WT		(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT))
52 #define PROT_NORMAL		(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
53 
54 #define PROT_SECT_DEVICE_nGnRE	(PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
55 #define PROT_SECT_NORMAL	(PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
56 #define PROT_SECT_NORMAL_EXEC	(PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
57 
58 #define _PAGE_DEFAULT		(_PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
59 #define _HYP_PAGE_DEFAULT	_PAGE_DEFAULT
60 
61 #define PAGE_KERNEL		__pgprot(PROT_NORMAL)
62 #define PAGE_KERNEL_RO		__pgprot((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY)
63 #define PAGE_KERNEL_ROX		__pgprot((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY)
64 #define PAGE_KERNEL_EXEC	__pgprot(PROT_NORMAL & ~PTE_PXN)
65 #define PAGE_KERNEL_EXEC_CONT	__pgprot((PROT_NORMAL & ~PTE_PXN) | PTE_CONT)
66 
67 #define PAGE_HYP		__pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_HYP_XN)
68 #define PAGE_HYP_EXEC		__pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY)
69 #define PAGE_HYP_RO		__pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY | PTE_HYP_XN)
70 #define PAGE_HYP_DEVICE		__pgprot(_PROT_DEFAULT | PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_HYP | PTE_HYP_XN)
71 
72 #define PAGE_S2_MEMATTR(attr)						\
73 	({								\
74 		u64 __val;						\
75 		if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))		\
76 			__val = PTE_S2_MEMATTR(MT_S2_FWB_ ## attr);	\
77 		else							\
78 			__val = PTE_S2_MEMATTR(MT_S2_ ## attr);		\
79 		__val;							\
80 	 })
81 
82 #define PAGE_S2_XN							\
83 	({								\
84 		u64 __val;						\
85 		if (cpus_have_const_cap(ARM64_HAS_CACHE_DIC))		\
86 			__val = 0;					\
87 		else							\
88 			__val = PTE_S2_XN;				\
89 		__val;							\
90 	})
91 
92 #define PAGE_S2			__pgprot(_PROT_DEFAULT | PAGE_S2_MEMATTR(NORMAL) | PTE_S2_RDONLY | PAGE_S2_XN)
93 #define PAGE_S2_DEVICE		__pgprot(_PROT_DEFAULT | PAGE_S2_MEMATTR(DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_S2_XN)
94 
95 #define PAGE_NONE		__pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)
96 /* shared+writable pages are clean by default, hence PTE_RDONLY|PTE_WRITE */
97 #define PAGE_SHARED		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
98 #define PAGE_SHARED_EXEC	__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_WRITE)
99 #define PAGE_READONLY		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)
100 #define PAGE_READONLY_EXEC	__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN)
101 
102 #define __P000  PAGE_NONE
103 #define __P001  PAGE_READONLY
104 #define __P010  PAGE_READONLY
105 #define __P011  PAGE_READONLY
106 #define __P100  PAGE_READONLY_EXEC
107 #define __P101  PAGE_READONLY_EXEC
108 #define __P110  PAGE_READONLY_EXEC
109 #define __P111  PAGE_READONLY_EXEC
110 
111 #define __S000  PAGE_NONE
112 #define __S001  PAGE_READONLY
113 #define __S010  PAGE_SHARED
114 #define __S011  PAGE_SHARED
115 #define __S100  PAGE_READONLY_EXEC
116 #define __S101  PAGE_READONLY_EXEC
117 #define __S110  PAGE_SHARED_EXEC
118 #define __S111  PAGE_SHARED_EXEC
119 
120 #endif /* __ASSEMBLY__ */
121 
122 #endif /* __ASM_PGTABLE_PROT_H */
123