1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 23eca86e7SMark Rutland /* 33eca86e7SMark Rutland * Copyright (C) 2016 ARM Ltd. 43eca86e7SMark Rutland */ 53eca86e7SMark Rutland #ifndef __ASM_PGTABLE_PROT_H 63eca86e7SMark Rutland #define __ASM_PGTABLE_PROT_H 73eca86e7SMark Rutland 83eca86e7SMark Rutland #include <asm/memory.h> 93eca86e7SMark Rutland #include <asm/pgtable-hwdef.h> 103eca86e7SMark Rutland 113eca86e7SMark Rutland #include <linux/const.h> 123eca86e7SMark Rutland 133eca86e7SMark Rutland /* 143eca86e7SMark Rutland * Software defined PTE bits definition. 153eca86e7SMark Rutland */ 163eca86e7SMark Rutland #define PTE_WRITE (PTE_DBM) /* same as DBM (51) */ 17570ef363SDavid Hildenbrand #define PTE_SWP_EXCLUSIVE (_AT(pteval_t, 1) << 2) /* only for swp ptes */ 183eca86e7SMark Rutland #define PTE_DIRTY (_AT(pteval_t, 1) << 55) 193eca86e7SMark Rutland #define PTE_SPECIAL (_AT(pteval_t, 1) << 56) 2073b20c84SRobin Murphy #define PTE_DEVMAP (_AT(pteval_t, 1) << 57) 213eca86e7SMark Rutland #define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */ 223eca86e7SMark Rutland 23b65399f6SAnshuman Khandual /* 24b65399f6SAnshuman Khandual * This bit indicates that the entry is present i.e. pmd_page() 25b65399f6SAnshuman Khandual * still points to a valid huge page in memory even if the pmd 26b65399f6SAnshuman Khandual * has been invalidated. 27b65399f6SAnshuman Khandual */ 28b65399f6SAnshuman Khandual #define PMD_PRESENT_INVALID (_AT(pteval_t, 1) << 59) /* only when !PMD_SECT_VALID */ 29b65399f6SAnshuman Khandual 30e046eb0cSWill Deacon #define _PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED) 31e046eb0cSWill Deacon #define _PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S) 32e046eb0cSWill Deacon 3341acec62SWill Deacon #define PROT_DEFAULT (_PROT_DEFAULT | PTE_MAYBE_NG) 3441acec62SWill Deacon #define PROT_SECT_DEFAULT (_PROT_SECT_DEFAULT | PMD_MAYBE_NG) 353eca86e7SMark Rutland 36aa57157bSCatalin Marinas #define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE)) 37aa57157bSCatalin Marinas #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE)) 38aa57157bSCatalin Marinas #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC)) 39aa57157bSCatalin Marinas #define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL)) 400178dc76SCatalin Marinas #define PROT_NORMAL_TAGGED (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_TAGGED)) 413eca86e7SMark Rutland 423eca86e7SMark Rutland #define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE)) 437c302cfbSJoey Gouly #define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PTE_WRITE | PMD_ATTRINDX(MT_NORMAL)) 443eca86e7SMark Rutland #define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL)) 453eca86e7SMark Rutland 4641acec62SWill Deacon #define _PAGE_DEFAULT (_PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL)) 473eca86e7SMark Rutland 48fa4cdccaSJoey Gouly #define _PAGE_KERNEL (PROT_NORMAL) 49fa4cdccaSJoey Gouly #define _PAGE_KERNEL_RO ((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY) 50fa4cdccaSJoey Gouly #define _PAGE_KERNEL_ROX ((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY) 51fa4cdccaSJoey Gouly #define _PAGE_KERNEL_EXEC (PROT_NORMAL & ~PTE_PXN) 52fa4cdccaSJoey Gouly #define _PAGE_KERNEL_EXEC_CONT ((PROT_NORMAL & ~PTE_PXN) | PTE_CONT) 53fa4cdccaSJoey Gouly 54fa4cdccaSJoey Gouly #define _PAGE_SHARED (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE) 55fa4cdccaSJoey Gouly #define _PAGE_SHARED_EXEC (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_WRITE) 56fa4cdccaSJoey Gouly #define _PAGE_READONLY (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN) 57fa4cdccaSJoey Gouly #define _PAGE_READONLY_EXEC (_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN) 58fa4cdccaSJoey Gouly #define _PAGE_EXECONLY (_PAGE_DEFAULT | PTE_RDONLY | PTE_NG | PTE_PXN) 59fa4cdccaSJoey Gouly 60fa4cdccaSJoey Gouly #ifdef __ASSEMBLY__ 61fa4cdccaSJoey Gouly #define PTE_MAYBE_NG 0 62fa4cdccaSJoey Gouly #endif 63fa4cdccaSJoey Gouly 64fa4cdccaSJoey Gouly #ifndef __ASSEMBLY__ 65fa4cdccaSJoey Gouly 66fa4cdccaSJoey Gouly #include <asm/cpufeature.h> 67fa4cdccaSJoey Gouly #include <asm/pgtable-types.h> 68fa4cdccaSJoey Gouly 69fa4cdccaSJoey Gouly extern bool arm64_use_ng_mappings; 70fa4cdccaSJoey Gouly 71fa4cdccaSJoey Gouly #define PTE_MAYBE_NG (arm64_use_ng_mappings ? PTE_NG : 0) 72fa4cdccaSJoey Gouly #define PMD_MAYBE_NG (arm64_use_ng_mappings ? PMD_SECT_NG : 0) 73fa4cdccaSJoey Gouly 74fa4cdccaSJoey Gouly /* 75fa4cdccaSJoey Gouly * If we have userspace only BTI we don't want to mark kernel pages 76fa4cdccaSJoey Gouly * guarded even if the system does support BTI. 77fa4cdccaSJoey Gouly */ 78fa4cdccaSJoey Gouly #ifdef CONFIG_ARM64_BTI_KERNEL 79fa4cdccaSJoey Gouly #define PTE_MAYBE_GP (system_supports_bti() ? PTE_GP : 0) 80fa4cdccaSJoey Gouly #else 81fa4cdccaSJoey Gouly #define PTE_MAYBE_GP 0 82fa4cdccaSJoey Gouly #endif 83fa4cdccaSJoey Gouly 84fa4cdccaSJoey Gouly #define PAGE_KERNEL __pgprot(_PAGE_KERNEL) 85fa4cdccaSJoey Gouly #define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL_RO) 86fa4cdccaSJoey Gouly #define PAGE_KERNEL_ROX __pgprot(_PAGE_KERNEL_ROX) 87fa4cdccaSJoey Gouly #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL_EXEC) 88fa4cdccaSJoey Gouly #define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_KERNEL_EXEC_CONT) 893eca86e7SMark Rutland 90bc224df1SQuentin Perret #define PAGE_S2_MEMATTR(attr, has_fwb) \ 91e48d53a9SMarc Zyngier ({ \ 92e48d53a9SMarc Zyngier u64 __val; \ 93bc224df1SQuentin Perret if (has_fwb) \ 94e48d53a9SMarc Zyngier __val = PTE_S2_MEMATTR(MT_S2_FWB_ ## attr); \ 95e48d53a9SMarc Zyngier else \ 96e48d53a9SMarc Zyngier __val = PTE_S2_MEMATTR(MT_S2_ ## attr); \ 97e48d53a9SMarc Zyngier __val; \ 98e48d53a9SMarc Zyngier }) 99e48d53a9SMarc Zyngier 100e046eb0cSWill Deacon #define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN) 101aa57157bSCatalin Marinas /* shared+writable pages are clean by default, hence PTE_RDONLY|PTE_WRITE */ 102fa4cdccaSJoey Gouly #define PAGE_SHARED __pgprot(_PAGE_SHARED) 103fa4cdccaSJoey Gouly #define PAGE_SHARED_EXEC __pgprot(_PAGE_SHARED_EXEC) 104fa4cdccaSJoey Gouly #define PAGE_READONLY __pgprot(_PAGE_READONLY) 105fa4cdccaSJoey Gouly #define PAGE_READONLY_EXEC __pgprot(_PAGE_READONLY_EXEC) 106fa4cdccaSJoey Gouly #define PAGE_EXECONLY __pgprot(_PAGE_EXECONLY) 1073eca86e7SMark Rutland 1083eca86e7SMark Rutland #endif /* __ASSEMBLY__ */ 1093eca86e7SMark Rutland 110*eeda243dSJoey Gouly #define pte_pi_index(pte) ( \ 111*eeda243dSJoey Gouly ((pte & BIT(PTE_PI_IDX_3)) >> (PTE_PI_IDX_3 - 3)) | \ 112*eeda243dSJoey Gouly ((pte & BIT(PTE_PI_IDX_2)) >> (PTE_PI_IDX_2 - 2)) | \ 113*eeda243dSJoey Gouly ((pte & BIT(PTE_PI_IDX_1)) >> (PTE_PI_IDX_1 - 1)) | \ 114*eeda243dSJoey Gouly ((pte & BIT(PTE_PI_IDX_0)) >> (PTE_PI_IDX_0 - 0))) 115*eeda243dSJoey Gouly 116*eeda243dSJoey Gouly /* 117*eeda243dSJoey Gouly * Page types used via Permission Indirection Extension (PIE). PIE uses 118*eeda243dSJoey Gouly * the USER, DBM, PXN and UXN bits to to generate an index which is used 119*eeda243dSJoey Gouly * to look up the actual permission in PIR_ELx and PIRE0_EL1. We define 120*eeda243dSJoey Gouly * combinations we use on non-PIE systems with the same encoding, for 121*eeda243dSJoey Gouly * convenience these are listed here as comments as are the unallocated 122*eeda243dSJoey Gouly * encodings. 123*eeda243dSJoey Gouly */ 124*eeda243dSJoey Gouly 125*eeda243dSJoey Gouly /* 0: PAGE_DEFAULT */ 126*eeda243dSJoey Gouly /* 1: PTE_USER */ 127*eeda243dSJoey Gouly /* 2: PTE_WRITE */ 128*eeda243dSJoey Gouly /* 3: PTE_WRITE | PTE_USER */ 129*eeda243dSJoey Gouly /* 4: PAGE_EXECONLY PTE_PXN */ 130*eeda243dSJoey Gouly /* 5: PAGE_READONLY_EXEC PTE_PXN | PTE_USER */ 131*eeda243dSJoey Gouly /* 6: PTE_PXN | PTE_WRITE */ 132*eeda243dSJoey Gouly /* 7: PAGE_SHARED_EXEC PTE_PXN | PTE_WRITE | PTE_USER */ 133*eeda243dSJoey Gouly /* 8: PAGE_KERNEL_ROX PTE_UXN */ 134*eeda243dSJoey Gouly /* 9: PTE_UXN | PTE_USER */ 135*eeda243dSJoey Gouly /* a: PAGE_KERNEL_EXEC PTE_UXN | PTE_WRITE */ 136*eeda243dSJoey Gouly /* b: PTE_UXN | PTE_WRITE | PTE_USER */ 137*eeda243dSJoey Gouly /* c: PAGE_KERNEL_RO PTE_UXN | PTE_PXN */ 138*eeda243dSJoey Gouly /* d: PAGE_READONLY PTE_UXN | PTE_PXN | PTE_USER */ 139*eeda243dSJoey Gouly /* e: PAGE_KERNEL PTE_UXN | PTE_PXN | PTE_WRITE */ 140*eeda243dSJoey Gouly /* f: PAGE_SHARED PTE_UXN | PTE_PXN | PTE_WRITE | PTE_USER */ 141*eeda243dSJoey Gouly 142*eeda243dSJoey Gouly #define PIE_E0 ( \ 143*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_X_O) | \ 144*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX) | \ 145*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RWX) | \ 146*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R) | \ 147*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW)) 148*eeda243dSJoey Gouly 149*eeda243dSJoey Gouly #define PIE_E1 ( \ 150*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_NONE_O) | \ 151*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_R) | \ 152*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RW) | \ 153*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R) | \ 154*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW) | \ 155*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_ROX), PIE_RX) | \ 156*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_EXEC), PIE_RWX) | \ 157*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_RO), PIE_R) | \ 158*eeda243dSJoey Gouly PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL), PIE_RW)) 159*eeda243dSJoey Gouly 1603eca86e7SMark Rutland #endif /* __ASM_PGTABLE_PROT_H */ 161