1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Based on arch/arm/include/asm/memory.h 4 * 5 * Copyright (C) 2000-2002 Russell King 6 * Copyright (C) 2012 ARM Ltd. 7 * 8 * Note: this file should not be included by non-asm/.h files 9 */ 10 #ifndef __ASM_MEMORY_H 11 #define __ASM_MEMORY_H 12 13 #include <linux/const.h> 14 #include <linux/sizes.h> 15 #include <asm/page-def.h> 16 17 /* 18 * Size of the PCI I/O space. This must remain a power of two so that 19 * IO_SPACE_LIMIT acts as a mask for the low bits of I/O addresses. 20 */ 21 #define PCI_IO_SIZE SZ_16M 22 23 /* 24 * VMEMMAP_SIZE - allows the whole linear region to be covered by 25 * a struct page array 26 * 27 * If we are configured with a 52-bit kernel VA then our VMEMMAP_SIZE 28 * needs to cover the memory region from the beginning of the 52-bit 29 * PAGE_OFFSET all the way to PAGE_END for 48-bit. This allows us to 30 * keep a constant PAGE_OFFSET and "fallback" to using the higher end 31 * of the VMEMMAP where 52-bit support is not available in hardware. 32 */ 33 #define VMEMMAP_SHIFT (PAGE_SHIFT - STRUCT_PAGE_MAX_SHIFT) 34 #define VMEMMAP_SIZE ((_PAGE_END(VA_BITS_MIN) - PAGE_OFFSET) >> VMEMMAP_SHIFT) 35 36 /* 37 * PAGE_OFFSET - the virtual address of the start of the linear map, at the 38 * start of the TTBR1 address space. 39 * PAGE_END - the end of the linear map, where all other kernel mappings begin. 40 * KIMAGE_VADDR - the virtual address of the start of the kernel image. 41 * VA_BITS - the maximum number of bits for virtual addresses. 42 */ 43 #define VA_BITS (CONFIG_ARM64_VA_BITS) 44 #define _PAGE_OFFSET(va) (-(UL(1) << (va))) 45 #define PAGE_OFFSET (_PAGE_OFFSET(VA_BITS)) 46 #define KIMAGE_VADDR (MODULES_END) 47 #define BPF_JIT_REGION_START (_PAGE_END(VA_BITS_MIN)) 48 #define BPF_JIT_REGION_SIZE (SZ_128M) 49 #define BPF_JIT_REGION_END (BPF_JIT_REGION_START + BPF_JIT_REGION_SIZE) 50 #define MODULES_END (MODULES_VADDR + MODULES_VSIZE) 51 #define MODULES_VADDR (BPF_JIT_REGION_END) 52 #define MODULES_VSIZE (SZ_128M) 53 #define VMEMMAP_START (-(UL(1) << (VA_BITS - VMEMMAP_SHIFT))) 54 #define VMEMMAP_END (VMEMMAP_START + VMEMMAP_SIZE) 55 #define PCI_IO_END (VMEMMAP_START - SZ_8M) 56 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE) 57 #define FIXADDR_TOP (VMEMMAP_START - SZ_32M) 58 59 #if VA_BITS > 48 60 #define VA_BITS_MIN (48) 61 #else 62 #define VA_BITS_MIN (VA_BITS) 63 #endif 64 65 #define _PAGE_END(va) (-(UL(1) << ((va) - 1))) 66 67 #define KERNEL_START _text 68 #define KERNEL_END _end 69 70 /* 71 * Generic and tag-based KASAN require 1/8th and 1/16th of the kernel virtual 72 * address space for the shadow region respectively. They can bloat the stack 73 * significantly, so double the (minimum) stack size when they are in use. 74 */ 75 #if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS) 76 #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL) 77 #define KASAN_SHADOW_END ((UL(1) << (64 - KASAN_SHADOW_SCALE_SHIFT)) \ 78 + KASAN_SHADOW_OFFSET) 79 #define PAGE_END (KASAN_SHADOW_END - (1UL << (vabits_actual - KASAN_SHADOW_SCALE_SHIFT))) 80 #define KASAN_THREAD_SHIFT 1 81 #else 82 #define KASAN_THREAD_SHIFT 0 83 #define PAGE_END (_PAGE_END(VA_BITS_MIN)) 84 #endif /* CONFIG_KASAN */ 85 86 #define MIN_THREAD_SHIFT (14 + KASAN_THREAD_SHIFT) 87 88 /* 89 * VMAP'd stacks are allocated at page granularity, so we must ensure that such 90 * stacks are a multiple of page size. 91 */ 92 #if defined(CONFIG_VMAP_STACK) && (MIN_THREAD_SHIFT < PAGE_SHIFT) 93 #define THREAD_SHIFT PAGE_SHIFT 94 #else 95 #define THREAD_SHIFT MIN_THREAD_SHIFT 96 #endif 97 98 #if THREAD_SHIFT >= PAGE_SHIFT 99 #define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT) 100 #endif 101 102 #define THREAD_SIZE (UL(1) << THREAD_SHIFT) 103 104 /* 105 * By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by 106 * checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry 107 * assembly. 108 */ 109 #ifdef CONFIG_VMAP_STACK 110 #define THREAD_ALIGN (2 * THREAD_SIZE) 111 #else 112 #define THREAD_ALIGN THREAD_SIZE 113 #endif 114 115 #define IRQ_STACK_SIZE THREAD_SIZE 116 117 #define OVERFLOW_STACK_SIZE SZ_4K 118 119 /* 120 * Alignment of kernel segments (e.g. .text, .data). 121 * 122 * 4 KB granule: 16 level 3 entries, with contiguous bit 123 * 16 KB granule: 4 level 3 entries, without contiguous bit 124 * 64 KB granule: 1 level 3 entry 125 */ 126 #define SEGMENT_ALIGN SZ_64K 127 128 /* 129 * Memory types available. 130 * 131 * IMPORTANT: MT_NORMAL must be index 0 since vm_get_page_prot() may 'or' in 132 * the MT_NORMAL_TAGGED memory type for PROT_MTE mappings. Note 133 * that protection_map[] only contains MT_NORMAL attributes. 134 */ 135 #define MT_NORMAL 0 136 #define MT_NORMAL_TAGGED 1 137 #define MT_NORMAL_NC 2 138 #define MT_DEVICE_nGnRnE 3 139 #define MT_DEVICE_nGnRE 4 140 141 /* 142 * Memory types for Stage-2 translation 143 */ 144 #define MT_S2_NORMAL 0xf 145 #define MT_S2_DEVICE_nGnRE 0x1 146 147 /* 148 * Memory types for Stage-2 translation when ID_AA64MMFR2_EL1.FWB is 0001 149 * Stage-2 enforces Normal-WB and Device-nGnRE 150 */ 151 #define MT_S2_FWB_NORMAL 6 152 #define MT_S2_FWB_DEVICE_nGnRE 1 153 154 #ifdef CONFIG_ARM64_4K_PAGES 155 #define IOREMAP_MAX_ORDER (PUD_SHIFT) 156 #else 157 #define IOREMAP_MAX_ORDER (PMD_SHIFT) 158 #endif 159 160 /* 161 * Open-coded (swapper_pg_dir - reserved_pg_dir) as this cannot be calculated 162 * until link time. 163 */ 164 #define RESERVED_SWAPPER_OFFSET (PAGE_SIZE) 165 166 /* 167 * Open-coded (swapper_pg_dir - tramp_pg_dir) as this cannot be calculated 168 * until link time. 169 */ 170 #define TRAMP_SWAPPER_OFFSET (2 * PAGE_SIZE) 171 172 #ifndef __ASSEMBLY__ 173 174 #include <linux/bitops.h> 175 #include <linux/compiler.h> 176 #include <linux/mmdebug.h> 177 #include <linux/types.h> 178 #include <asm/bug.h> 179 180 extern u64 vabits_actual; 181 182 extern s64 memstart_addr; 183 /* PHYS_OFFSET - the physical address of the start of memory. */ 184 #define PHYS_OFFSET ({ VM_BUG_ON(memstart_addr & 1); memstart_addr; }) 185 186 /* the virtual base of the kernel image */ 187 extern u64 kimage_vaddr; 188 189 /* the offset between the kernel virtual and physical mappings */ 190 extern u64 kimage_voffset; 191 192 static inline unsigned long kaslr_offset(void) 193 { 194 return kimage_vaddr - KIMAGE_VADDR; 195 } 196 197 /* 198 * Allow all memory at the discovery stage. We will clip it later. 199 */ 200 #define MIN_MEMBLOCK_ADDR 0 201 #define MAX_MEMBLOCK_ADDR U64_MAX 202 203 /* 204 * PFNs are used to describe any physical page; this means 205 * PFN 0 == physical address 0. 206 * 207 * This is the PFN of the first RAM page in the kernel 208 * direct-mapped view. We assume this is the first page 209 * of RAM in the mem_map as well. 210 */ 211 #define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT) 212 213 /* 214 * When dealing with data aborts, watchpoints, or instruction traps we may end 215 * up with a tagged userland pointer. Clear the tag to get a sane pointer to 216 * pass on to access_ok(), for instance. 217 */ 218 #define __untagged_addr(addr) \ 219 ((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55)) 220 221 #define untagged_addr(addr) ({ \ 222 u64 __addr = (__force u64)(addr); \ 223 __addr &= __untagged_addr(__addr); \ 224 (__force __typeof__(addr))__addr; \ 225 }) 226 227 #if defined(CONFIG_KASAN_SW_TAGS) || defined(CONFIG_KASAN_HW_TAGS) 228 #define __tag_shifted(tag) ((u64)(tag) << 56) 229 #define __tag_reset(addr) __untagged_addr(addr) 230 #define __tag_get(addr) (__u8)((u64)(addr) >> 56) 231 #else 232 #define __tag_shifted(tag) 0UL 233 #define __tag_reset(addr) (addr) 234 #define __tag_get(addr) 0 235 #endif /* CONFIG_KASAN_SW_TAGS || CONFIG_KASAN_HW_TAGS */ 236 237 static inline const void *__tag_set(const void *addr, u8 tag) 238 { 239 u64 __addr = (u64)addr & ~__tag_shifted(0xff); 240 return (const void *)(__addr | __tag_shifted(tag)); 241 } 242 243 #ifdef CONFIG_KASAN_HW_TAGS 244 #define arch_enable_tagging_sync() mte_enable_kernel_sync() 245 #define arch_enable_tagging_async() mte_enable_kernel_async() 246 #define arch_force_async_tag_fault() mte_check_tfsr_exit() 247 #define arch_get_random_tag() mte_get_random_tag() 248 #define arch_get_mem_tag(addr) mte_get_mem_tag(addr) 249 #define arch_set_mem_tag_range(addr, size, tag, init) \ 250 mte_set_mem_tag_range((addr), (size), (tag), (init)) 251 #endif /* CONFIG_KASAN_HW_TAGS */ 252 253 /* 254 * Physical vs virtual RAM address space conversion. These are 255 * private definitions which should NOT be used outside memory.h 256 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. 257 */ 258 259 260 /* 261 * Check whether an arbitrary address is within the linear map, which 262 * lives in the [PAGE_OFFSET, PAGE_END) interval at the bottom of the 263 * kernel's TTBR1 address range. 264 */ 265 #define __is_lm_address(addr) (((u64)(addr) - PAGE_OFFSET) < (PAGE_END - PAGE_OFFSET)) 266 267 #define __lm_to_phys(addr) (((addr) - PAGE_OFFSET) + PHYS_OFFSET) 268 #define __kimg_to_phys(addr) ((addr) - kimage_voffset) 269 270 #define __virt_to_phys_nodebug(x) ({ \ 271 phys_addr_t __x = (phys_addr_t)(__tag_reset(x)); \ 272 __is_lm_address(__x) ? __lm_to_phys(__x) : __kimg_to_phys(__x); \ 273 }) 274 275 #define __pa_symbol_nodebug(x) __kimg_to_phys((phys_addr_t)(x)) 276 277 #ifdef CONFIG_DEBUG_VIRTUAL 278 extern phys_addr_t __virt_to_phys(unsigned long x); 279 extern phys_addr_t __phys_addr_symbol(unsigned long x); 280 #else 281 #define __virt_to_phys(x) __virt_to_phys_nodebug(x) 282 #define __phys_addr_symbol(x) __pa_symbol_nodebug(x) 283 #endif /* CONFIG_DEBUG_VIRTUAL */ 284 285 #define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET) | PAGE_OFFSET) 286 #define __phys_to_kimg(x) ((unsigned long)((x) + kimage_voffset)) 287 288 /* 289 * Convert a page to/from a physical address 290 */ 291 #define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page))) 292 #define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys))) 293 294 /* 295 * Note: Drivers should NOT use these. They are the wrong 296 * translation for translating DMA addresses. Use the driver 297 * DMA support - see dma-mapping.h. 298 */ 299 #define virt_to_phys virt_to_phys 300 static inline phys_addr_t virt_to_phys(const volatile void *x) 301 { 302 return __virt_to_phys((unsigned long)(x)); 303 } 304 305 #define phys_to_virt phys_to_virt 306 static inline void *phys_to_virt(phys_addr_t x) 307 { 308 return (void *)(__phys_to_virt(x)); 309 } 310 311 /* 312 * Drivers should NOT use these either. 313 */ 314 #define __pa(x) __virt_to_phys((unsigned long)(x)) 315 #define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0)) 316 #define __pa_nodebug(x) __virt_to_phys_nodebug((unsigned long)(x)) 317 #define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x))) 318 #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 319 #define virt_to_pfn(x) __phys_to_pfn(__virt_to_phys((unsigned long)(x))) 320 #define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x)) 321 322 /* 323 * virt_to_page(x) convert a _valid_ virtual address to struct page * 324 * virt_addr_valid(x) indicates whether a virtual address is valid 325 */ 326 #define ARCH_PFN_OFFSET ((unsigned long)PHYS_PFN_OFFSET) 327 328 #if defined(CONFIG_DEBUG_VIRTUAL) 329 #define page_to_virt(x) ({ \ 330 __typeof__(x) __page = x; \ 331 void *__addr = __va(page_to_phys(__page)); \ 332 (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\ 333 }) 334 #define virt_to_page(x) pfn_to_page(virt_to_pfn(x)) 335 #else 336 #define page_to_virt(x) ({ \ 337 __typeof__(x) __page = x; \ 338 u64 __idx = ((u64)__page - VMEMMAP_START) / sizeof(struct page);\ 339 u64 __addr = PAGE_OFFSET + (__idx * PAGE_SIZE); \ 340 (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\ 341 }) 342 343 #define virt_to_page(x) ({ \ 344 u64 __idx = (__tag_reset((u64)x) - PAGE_OFFSET) / PAGE_SIZE; \ 345 u64 __addr = VMEMMAP_START + (__idx * sizeof(struct page)); \ 346 (struct page *)__addr; \ 347 }) 348 #endif /* CONFIG_DEBUG_VIRTUAL */ 349 350 #define virt_addr_valid(addr) ({ \ 351 __typeof__(addr) __addr = __tag_reset(addr); \ 352 __is_lm_address(__addr) && pfn_is_map_memory(virt_to_pfn(__addr)); \ 353 }) 354 355 void dump_mem_limit(void); 356 #endif /* !ASSEMBLY */ 357 358 /* 359 * Given that the GIC architecture permits ITS implementations that can only be 360 * configured with a LPI table address once, GICv3 systems with many CPUs may 361 * end up reserving a lot of different regions after a kexec for their LPI 362 * tables (one per CPU), as we are forced to reuse the same memory after kexec 363 * (and thus reserve it persistently with EFI beforehand) 364 */ 365 #if defined(CONFIG_EFI) && defined(CONFIG_ARM_GIC_V3_ITS) 366 # define INIT_MEMBLOCK_RESERVED_REGIONS (INIT_MEMBLOCK_REGIONS + NR_CPUS + 1) 367 #endif 368 369 #include <asm-generic/memory_model.h> 370 371 #endif /* __ASM_MEMORY_H */ 372