xref: /openbmc/linux/arch/arm64/include/asm/lse.h (revision fadbafc1)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_LSE_H
3 #define __ASM_LSE_H
4 
5 #include <asm/atomic_ll_sc.h>
6 
7 #ifdef CONFIG_ARM64_LSE_ATOMICS
8 
9 #define __LSE_PREAMBLE	".arch_extension lse\n"
10 
11 #include <linux/compiler_types.h>
12 #include <linux/export.h>
13 #include <linux/jump_label.h>
14 #include <linux/stringify.h>
15 #include <asm/alternative.h>
16 #include <asm/alternative-macros.h>
17 #include <asm/atomic_lse.h>
18 #include <asm/cpucaps.h>
19 
20 static __always_inline bool system_uses_lse_atomics(void)
21 {
22 	return alternative_has_feature_likely(ARM64_HAS_LSE_ATOMICS);
23 }
24 
25 #define __lse_ll_sc_body(op, ...)					\
26 ({									\
27 	system_uses_lse_atomics() ?					\
28 		__lse_##op(__VA_ARGS__) :				\
29 		__ll_sc_##op(__VA_ARGS__);				\
30 })
31 
32 /* In-line patching at runtime */
33 #define ARM64_LSE_ATOMIC_INSN(llsc, lse)				\
34 	ALTERNATIVE(llsc, __LSE_PREAMBLE lse, ARM64_HAS_LSE_ATOMICS)
35 
36 #else	/* CONFIG_ARM64_LSE_ATOMICS */
37 
38 static inline bool system_uses_lse_atomics(void) { return false; }
39 
40 #define __lse_ll_sc_body(op, ...)		__ll_sc_##op(__VA_ARGS__)
41 
42 #define ARM64_LSE_ATOMIC_INSN(llsc, lse)	llsc
43 
44 #endif	/* CONFIG_ARM64_LSE_ATOMICS */
45 #endif	/* __ASM_LSE_H */
46