xref: /openbmc/linux/arch/arm64/include/asm/kvm_hyp.h (revision e7bae9bb)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2015 - ARM Ltd
4  * Author: Marc Zyngier <marc.zyngier@arm.com>
5  */
6 
7 #ifndef __ARM64_KVM_HYP_H__
8 #define __ARM64_KVM_HYP_H__
9 
10 #include <linux/compiler.h>
11 #include <linux/kvm_host.h>
12 #include <asm/alternative.h>
13 #include <asm/sysreg.h>
14 
15 #define read_sysreg_elx(r,nvh,vh)					\
16 	({								\
17 		u64 reg;						\
18 		asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh),	\
19 					 __mrs_s("%0", r##vh),		\
20 					 ARM64_HAS_VIRT_HOST_EXTN)	\
21 			     : "=r" (reg));				\
22 		reg;							\
23 	})
24 
25 #define write_sysreg_elx(v,r,nvh,vh)					\
26 	do {								\
27 		u64 __val = (u64)(v);					\
28 		asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"),	\
29 					 __msr_s(r##vh, "%x0"),		\
30 					 ARM64_HAS_VIRT_HOST_EXTN)	\
31 					 : : "rZ" (__val));		\
32 	} while (0)
33 
34 /*
35  * Unified accessors for registers that have a different encoding
36  * between VHE and non-VHE. They must be specified without their "ELx"
37  * encoding, but with the SYS_ prefix, as defined in asm/sysreg.h.
38  */
39 
40 #define read_sysreg_el0(r)	read_sysreg_elx(r, _EL0, _EL02)
41 #define write_sysreg_el0(v,r)	write_sysreg_elx(v, r, _EL0, _EL02)
42 #define read_sysreg_el1(r)	read_sysreg_elx(r, _EL1, _EL12)
43 #define write_sysreg_el1(v,r)	write_sysreg_elx(v, r, _EL1, _EL12)
44 #define read_sysreg_el2(r)	read_sysreg_elx(r, _EL2, _EL1)
45 #define write_sysreg_el2(v,r)	write_sysreg_elx(v, r, _EL2, _EL1)
46 
47 /*
48  * Without an __arch_swab32(), we fall back to ___constant_swab32(), but the
49  * static inline can allow the compiler to out-of-line this. KVM always wants
50  * the macro version as its always inlined.
51  */
52 #define __kvm_swab32(x)	___constant_swab32(x)
53 
54 int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu);
55 
56 void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if);
57 void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if);
58 void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if);
59 void __vgic_v3_deactivate_traps(struct vgic_v3_cpu_if *cpu_if);
60 void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if);
61 void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if);
62 int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu);
63 
64 #ifdef __KVM_NVHE_HYPERVISOR__
65 void __timer_enable_traps(struct kvm_vcpu *vcpu);
66 void __timer_disable_traps(struct kvm_vcpu *vcpu);
67 #endif
68 
69 #ifdef __KVM_NVHE_HYPERVISOR__
70 void __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt);
71 void __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt);
72 #else
73 void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt);
74 void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt);
75 void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt);
76 void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt);
77 #endif
78 
79 void __debug_switch_to_guest(struct kvm_vcpu *vcpu);
80 void __debug_switch_to_host(struct kvm_vcpu *vcpu);
81 
82 void __fpsimd_save_state(struct user_fpsimd_state *fp_regs);
83 void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs);
84 
85 #ifndef __KVM_NVHE_HYPERVISOR__
86 void activate_traps_vhe_load(struct kvm_vcpu *vcpu);
87 void deactivate_traps_vhe_put(void);
88 #endif
89 
90 u64 __guest_enter(struct kvm_vcpu *vcpu, struct kvm_cpu_context *host_ctxt);
91 
92 void __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt);
93 #ifdef __KVM_NVHE_HYPERVISOR__
94 void __noreturn __hyp_do_panic(unsigned long, ...);
95 #endif
96 
97 #endif /* __ARM64_KVM_HYP_H__ */
98 
99