1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2015 - ARM Ltd 4 * Author: Marc Zyngier <marc.zyngier@arm.com> 5 */ 6 7 #ifndef __ARM64_KVM_HYP_H__ 8 #define __ARM64_KVM_HYP_H__ 9 10 #include <linux/compiler.h> 11 #include <linux/kvm_host.h> 12 #include <asm/alternative.h> 13 #include <asm/kvm_mmu.h> 14 #include <asm/sysreg.h> 15 16 #define __hyp_text __section(.hyp.text) notrace 17 18 #define read_sysreg_elx(r,nvh,vh) \ 19 ({ \ 20 u64 reg; \ 21 asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh), \ 22 __mrs_s("%0", r##vh), \ 23 ARM64_HAS_VIRT_HOST_EXTN) \ 24 : "=r" (reg)); \ 25 reg; \ 26 }) 27 28 #define write_sysreg_elx(v,r,nvh,vh) \ 29 do { \ 30 u64 __val = (u64)(v); \ 31 asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"), \ 32 __msr_s(r##vh, "%x0"), \ 33 ARM64_HAS_VIRT_HOST_EXTN) \ 34 : : "rZ" (__val)); \ 35 } while (0) 36 37 /* 38 * Unified accessors for registers that have a different encoding 39 * between VHE and non-VHE. They must be specified without their "ELx" 40 * encoding, but with the SYS_ prefix, as defined in asm/sysreg.h. 41 */ 42 43 #define read_sysreg_el0(r) read_sysreg_elx(r, _EL0, _EL02) 44 #define write_sysreg_el0(v,r) write_sysreg_elx(v, r, _EL0, _EL02) 45 #define read_sysreg_el1(r) read_sysreg_elx(r, _EL1, _EL12) 46 #define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12) 47 #define read_sysreg_el2(r) read_sysreg_elx(r, _EL2, _EL1) 48 #define write_sysreg_el2(v,r) write_sysreg_elx(v, r, _EL2, _EL1) 49 50 int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu); 51 52 void __vgic_v3_save_state(struct kvm_vcpu *vcpu); 53 void __vgic_v3_restore_state(struct kvm_vcpu *vcpu); 54 void __vgic_v3_activate_traps(struct kvm_vcpu *vcpu); 55 void __vgic_v3_deactivate_traps(struct kvm_vcpu *vcpu); 56 void __vgic_v3_save_aprs(struct kvm_vcpu *vcpu); 57 void __vgic_v3_restore_aprs(struct kvm_vcpu *vcpu); 58 int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu); 59 60 void __timer_enable_traps(struct kvm_vcpu *vcpu); 61 void __timer_disable_traps(struct kvm_vcpu *vcpu); 62 63 void __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt); 64 void __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt); 65 void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt); 66 void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt); 67 void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt); 68 void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt); 69 void __sysreg32_save_state(struct kvm_vcpu *vcpu); 70 void __sysreg32_restore_state(struct kvm_vcpu *vcpu); 71 72 void __debug_switch_to_guest(struct kvm_vcpu *vcpu); 73 void __debug_switch_to_host(struct kvm_vcpu *vcpu); 74 75 void __fpsimd_save_state(struct user_fpsimd_state *fp_regs); 76 void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs); 77 78 void activate_traps_vhe_load(struct kvm_vcpu *vcpu); 79 void deactivate_traps_vhe_put(void); 80 81 u64 __guest_enter(struct kvm_vcpu *vcpu, struct kvm_cpu_context *host_ctxt); 82 void __noreturn __hyp_do_panic(unsigned long, ...); 83 84 /* 85 * Must be called from hyp code running at EL2 with an updated VTTBR 86 * and interrupts disabled. 87 */ 88 static __always_inline void __hyp_text __load_guest_stage2(struct kvm *kvm) 89 { 90 write_sysreg(kvm->arch.vtcr, vtcr_el2); 91 write_sysreg(kvm_get_vttbr(kvm), vttbr_el2); 92 93 /* 94 * ARM erratum 1165522 requires the actual execution of the above 95 * before we can switch to the EL1/EL0 translation regime used by 96 * the guest. 97 */ 98 asm(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_1165522)); 99 } 100 101 #endif /* __ARM64_KVM_HYP_H__ */ 102 103