1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 24f8d6632SMarc Zyngier /* 34f8d6632SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 44f8d6632SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 54f8d6632SMarc Zyngier * 64f8d6632SMarc Zyngier * Derived from arch/arm/include/asm/kvm_host.h: 74f8d6632SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 84f8d6632SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 94f8d6632SMarc Zyngier */ 104f8d6632SMarc Zyngier 114f8d6632SMarc Zyngier #ifndef __ARM64_KVM_HOST_H__ 124f8d6632SMarc Zyngier #define __ARM64_KVM_HOST_H__ 134f8d6632SMarc Zyngier 1405469831SAndrew Scull #include <linux/arm-smccc.h> 153f61f409SDave Martin #include <linux/bitmap.h> 1665647300SPaolo Bonzini #include <linux/types.h> 173f61f409SDave Martin #include <linux/jump_label.h> 1865647300SPaolo Bonzini #include <linux/kvm_types.h> 193f61f409SDave Martin #include <linux/percpu.h> 20ff367fe4SDavid Brazdil #include <linux/psci.h> 2185738e05SJulien Thierry #include <asm/arch_gicv3.h> 223f61f409SDave Martin #include <asm/barrier.h> 2363a1e1c9SMark Rutland #include <asm/cpufeature.h> 241e0cf16cSMarc Zyngier #include <asm/cputype.h> 254f5abad9SJames Morse #include <asm/daifflags.h> 2617eed27bSDave Martin #include <asm/fpsimd.h> 274f8d6632SMarc Zyngier #include <asm/kvm.h> 283a3604bcSMarc Zyngier #include <asm/kvm_asm.h> 29e6b673b7SDave Martin #include <asm/thread_info.h> 304f8d6632SMarc Zyngier 31c1426e4cSEric Auger #define __KVM_HAVE_ARCH_INTC_INITIALIZED 32c1426e4cSEric Auger 33920552b2SDavid Hildenbrand #define KVM_HALT_POLL_NS_DEFAULT 500000 344f8d6632SMarc Zyngier 354f8d6632SMarc Zyngier #include <kvm/arm_vgic.h> 364f8d6632SMarc Zyngier #include <kvm/arm_arch_timer.h> 3704fe4726SShannon Zhao #include <kvm/arm_pmu.h> 384f8d6632SMarc Zyngier 39ef748917SMing Lei #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS 40ef748917SMing Lei 41a22fa321SAmit Daniel Kachhap #define KVM_VCPU_MAX_FEATURES 7 424f8d6632SMarc Zyngier 437b244e2bSAndrew Jones #define KVM_REQ_SLEEP \ 442387149eSAndrew Jones KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 45325f9c64SAndrew Jones #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) 46358b28f0SMarc Zyngier #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2) 478564d637SSteven Price #define KVM_REQ_RECORD_STEAL KVM_ARCH_REQ(3) 48d9c3872cSMarc Zyngier #define KVM_REQ_RELOAD_GICv4 KVM_ARCH_REQ(4) 49b13216cfSChristoffer Dall 50c862626eSKeqian Zhu #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 51c862626eSKeqian Zhu KVM_DIRTY_LOG_INITIALLY_SET) 52c862626eSKeqian Zhu 53d8b369c4SDavid Brazdil /* 54d8b369c4SDavid Brazdil * Mode of operation configurable with kvm-arm.mode early param. 55d8b369c4SDavid Brazdil * See Documentation/admin-guide/kernel-parameters.txt for more information. 56d8b369c4SDavid Brazdil */ 57d8b369c4SDavid Brazdil enum kvm_mode { 58d8b369c4SDavid Brazdil KVM_MODE_DEFAULT, 59d8b369c4SDavid Brazdil KVM_MODE_PROTECTED, 60d8b369c4SDavid Brazdil }; 613eb681fbSDavid Brazdil enum kvm_mode kvm_get_mode(void); 62d8b369c4SDavid Brazdil 6361bbe380SChristoffer Dall DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 6461bbe380SChristoffer Dall 659033bba4SDave Martin extern unsigned int kvm_sve_max_vl; 66a3be836dSDave Martin int kvm_arm_init_sve(void); 670f062bfeSDave Martin 686951e48bSWill Deacon int __attribute_const__ kvm_target_cpu(void); 694f8d6632SMarc Zyngier int kvm_reset_vcpu(struct kvm_vcpu *vcpu); 7019bcc89eSSean Christopherson void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu); 714f8d6632SMarc Zyngier 72e329fb75SChristoffer Dall struct kvm_vmid { 734f8d6632SMarc Zyngier /* The VMID generation used for the virt. memory system */ 744f8d6632SMarc Zyngier u64 vmid_gen; 754f8d6632SMarc Zyngier u32 vmid; 76e329fb75SChristoffer Dall }; 77e329fb75SChristoffer Dall 78a0e50aa3SChristoffer Dall struct kvm_s2_mmu { 79e329fb75SChristoffer Dall struct kvm_vmid vmid; 804f8d6632SMarc Zyngier 81a0e50aa3SChristoffer Dall /* 82a0e50aa3SChristoffer Dall * stage2 entry level table 83a0e50aa3SChristoffer Dall * 84a0e50aa3SChristoffer Dall * Two kvm_s2_mmu structures in the same VM can point to the same 85a0e50aa3SChristoffer Dall * pgd here. This happens when running a guest using a 86a0e50aa3SChristoffer Dall * translation regime that isn't affected by its own stage-2 87a0e50aa3SChristoffer Dall * translation, such as a non-VHE hypervisor running at vEL2, or 88a0e50aa3SChristoffer Dall * for vEL1/EL0 with vHCR_EL2.VM == 0. In that case, we use the 89a0e50aa3SChristoffer Dall * canonical stage-2 page tables. 90a0e50aa3SChristoffer Dall */ 91e329fb75SChristoffer Dall phys_addr_t pgd_phys; 9271233d05SWill Deacon struct kvm_pgtable *pgt; 934f8d6632SMarc Zyngier 9494d0e598SMarc Zyngier /* The last vcpu id that ran on each physical CPU */ 9594d0e598SMarc Zyngier int __percpu *last_vcpu_ran; 9694d0e598SMarc Zyngier 97a0e50aa3SChristoffer Dall struct kvm *kvm; 98a0e50aa3SChristoffer Dall }; 99a0e50aa3SChristoffer Dall 1008d14797bSWill Deacon struct kvm_arch_memory_slot { 1018d14797bSWill Deacon }; 1028d14797bSWill Deacon 103a0e50aa3SChristoffer Dall struct kvm_arch { 104a0e50aa3SChristoffer Dall struct kvm_s2_mmu mmu; 105a0e50aa3SChristoffer Dall 106a0e50aa3SChristoffer Dall /* VTCR_EL2 value for this VM */ 107a0e50aa3SChristoffer Dall u64 vtcr; 108a0e50aa3SChristoffer Dall 1093caa2d8cSAndre Przywara /* The maximum number of vCPUs depends on the used GIC model */ 1103caa2d8cSAndre Przywara int max_vcpus; 1113caa2d8cSAndre Przywara 1124f8d6632SMarc Zyngier /* Interrupt controller */ 1134f8d6632SMarc Zyngier struct vgic_dist vgic; 11485bd0ba1SMarc Zyngier 11585bd0ba1SMarc Zyngier /* Mandated version of PSCI */ 11685bd0ba1SMarc Zyngier u32 psci_version; 117c726200dSChristoffer Dall 118c726200dSChristoffer Dall /* 119c726200dSChristoffer Dall * If we encounter a data abort without valid instruction syndrome 120c726200dSChristoffer Dall * information, report this to user space. User space can (and 121c726200dSChristoffer Dall * should) opt in to this feature if KVM_CAP_ARM_NISV_TO_USER is 122c726200dSChristoffer Dall * supported. 123c726200dSChristoffer Dall */ 124c726200dSChristoffer Dall bool return_nisv_io_abort_to_user; 125fd65a3b5SMarc Zyngier 126d7eec236SMarc Zyngier /* 127d7eec236SMarc Zyngier * VM-wide PMU filter, implemented as a bitmap and big enough for 128d7eec236SMarc Zyngier * up to 2^10 events (ARMv8.0) or 2^16 events (ARMv8.1+). 129d7eec236SMarc Zyngier */ 130d7eec236SMarc Zyngier unsigned long *pmu_filter; 131fd65a3b5SMarc Zyngier unsigned int pmuver; 13223711a5eSMarc Zyngier 13323711a5eSMarc Zyngier u8 pfr0_csv2; 1344f1df628SMarc Zyngier u8 pfr0_csv3; 1354f8d6632SMarc Zyngier }; 1364f8d6632SMarc Zyngier 1374f8d6632SMarc Zyngier struct kvm_vcpu_fault_info { 1384f8d6632SMarc Zyngier u32 esr_el2; /* Hyp Syndrom Register */ 1394f8d6632SMarc Zyngier u64 far_el2; /* Hyp Fault Address Register */ 1404f8d6632SMarc Zyngier u64 hpfar_el2; /* Hyp IPA Fault Address Register */ 1410067df41SJames Morse u64 disr_el1; /* Deferred [SError] Status Register */ 1424f8d6632SMarc Zyngier }; 1434f8d6632SMarc Zyngier 1449d8415d6SMarc Zyngier enum vcpu_sysreg { 1458f7f4fe7SMarc Zyngier __INVALID_SYSREG__, /* 0 is reserved as an invalid value */ 1469d8415d6SMarc Zyngier MPIDR_EL1, /* MultiProcessor Affinity Register */ 1479d8415d6SMarc Zyngier CSSELR_EL1, /* Cache Size Selection Register */ 1489d8415d6SMarc Zyngier SCTLR_EL1, /* System Control Register */ 1499d8415d6SMarc Zyngier ACTLR_EL1, /* Auxiliary Control Register */ 1509d8415d6SMarc Zyngier CPACR_EL1, /* Coprocessor Access Control */ 15173433762SDave Martin ZCR_EL1, /* SVE Control */ 1529d8415d6SMarc Zyngier TTBR0_EL1, /* Translation Table Base Register 0 */ 1539d8415d6SMarc Zyngier TTBR1_EL1, /* Translation Table Base Register 1 */ 1549d8415d6SMarc Zyngier TCR_EL1, /* Translation Control Register */ 1559d8415d6SMarc Zyngier ESR_EL1, /* Exception Syndrome Register */ 156ef769e32SAdam Buchbinder AFSR0_EL1, /* Auxiliary Fault Status Register 0 */ 157ef769e32SAdam Buchbinder AFSR1_EL1, /* Auxiliary Fault Status Register 1 */ 1589d8415d6SMarc Zyngier FAR_EL1, /* Fault Address Register */ 1599d8415d6SMarc Zyngier MAIR_EL1, /* Memory Attribute Indirection Register */ 1609d8415d6SMarc Zyngier VBAR_EL1, /* Vector Base Address Register */ 1619d8415d6SMarc Zyngier CONTEXTIDR_EL1, /* Context ID Register */ 1629d8415d6SMarc Zyngier TPIDR_EL0, /* Thread ID, User R/W */ 1639d8415d6SMarc Zyngier TPIDRRO_EL0, /* Thread ID, User R/O */ 1649d8415d6SMarc Zyngier TPIDR_EL1, /* Thread ID, Privileged */ 1659d8415d6SMarc Zyngier AMAIR_EL1, /* Aux Memory Attribute Indirection Register */ 1669d8415d6SMarc Zyngier CNTKCTL_EL1, /* Timer Control Register (EL1) */ 1679d8415d6SMarc Zyngier PAR_EL1, /* Physical Address Register */ 1689d8415d6SMarc Zyngier MDSCR_EL1, /* Monitor Debug System Control Register */ 1699d8415d6SMarc Zyngier MDCCINT_EL1, /* Monitor Debug Comms Channel Interrupt Enable Reg */ 170c773ae2bSJames Morse DISR_EL1, /* Deferred Interrupt Status Register */ 1719d8415d6SMarc Zyngier 172ab946834SShannon Zhao /* Performance Monitors Registers */ 173ab946834SShannon Zhao PMCR_EL0, /* Control Register */ 1743965c3ceSShannon Zhao PMSELR_EL0, /* Event Counter Selection Register */ 175051ff581SShannon Zhao PMEVCNTR0_EL0, /* Event Counter Register (0-30) */ 176051ff581SShannon Zhao PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30, 177051ff581SShannon Zhao PMCCNTR_EL0, /* Cycle Counter Register */ 1789feb21acSShannon Zhao PMEVTYPER0_EL0, /* Event Type Register (0-30) */ 1799feb21acSShannon Zhao PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30, 1809feb21acSShannon Zhao PMCCFILTR_EL0, /* Cycle Count Filter Register */ 18196b0eebcSShannon Zhao PMCNTENSET_EL0, /* Count Enable Set Register */ 1829db52c78SShannon Zhao PMINTENSET_EL1, /* Interrupt Enable Set Register */ 18376d883c4SShannon Zhao PMOVSSET_EL0, /* Overflow Flag Status Set Register */ 1847a0adc70SShannon Zhao PMSWINC_EL0, /* Software Increment Register */ 185d692b8adSShannon Zhao PMUSERENR_EL0, /* User Enable Register */ 186ab946834SShannon Zhao 187384b40caSMark Rutland /* Pointer Authentication Registers in a strict increasing order. */ 188384b40caSMark Rutland APIAKEYLO_EL1, 189384b40caSMark Rutland APIAKEYHI_EL1, 190384b40caSMark Rutland APIBKEYLO_EL1, 191384b40caSMark Rutland APIBKEYHI_EL1, 192384b40caSMark Rutland APDAKEYLO_EL1, 193384b40caSMark Rutland APDAKEYHI_EL1, 194384b40caSMark Rutland APDBKEYLO_EL1, 195384b40caSMark Rutland APDBKEYHI_EL1, 196384b40caSMark Rutland APGAKEYLO_EL1, 197384b40caSMark Rutland APGAKEYHI_EL1, 198384b40caSMark Rutland 19998909e6dSMarc Zyngier ELR_EL1, 2001bded23eSMarc Zyngier SP_EL1, 201710f1982SMarc Zyngier SPSR_EL1, 20298909e6dSMarc Zyngier 20341ce82f6SMarc Zyngier CNTVOFF_EL2, 20441ce82f6SMarc Zyngier CNTV_CVAL_EL0, 20541ce82f6SMarc Zyngier CNTV_CTL_EL0, 20641ce82f6SMarc Zyngier CNTP_CVAL_EL0, 20741ce82f6SMarc Zyngier CNTP_CTL_EL0, 20841ce82f6SMarc Zyngier 2099d8415d6SMarc Zyngier /* 32bit specific registers. Keep them at the end of the range */ 2109d8415d6SMarc Zyngier DACR32_EL2, /* Domain Access Control Register */ 2119d8415d6SMarc Zyngier IFSR32_EL2, /* Instruction Fault Status Register */ 2129d8415d6SMarc Zyngier FPEXC32_EL2, /* Floating-Point Exception Control Register */ 2139d8415d6SMarc Zyngier DBGVCR32_EL2, /* Debug Vector Catch Register */ 2149d8415d6SMarc Zyngier 2159d8415d6SMarc Zyngier NR_SYS_REGS /* Nothing after this line! */ 2169d8415d6SMarc Zyngier }; 2179d8415d6SMarc Zyngier 2184f8d6632SMarc Zyngier struct kvm_cpu_context { 219e47c2055SMarc Zyngier struct user_pt_regs regs; /* sp = sp_el0 */ 220e47c2055SMarc Zyngier 221fd85b667SMarc Zyngier u64 spsr_abt; 222fd85b667SMarc Zyngier u64 spsr_und; 223fd85b667SMarc Zyngier u64 spsr_irq; 224fd85b667SMarc Zyngier u64 spsr_fiq; 225e47c2055SMarc Zyngier 226e47c2055SMarc Zyngier struct user_fpsimd_state fp_regs; 227e47c2055SMarc Zyngier 2284f8d6632SMarc Zyngier u64 sys_regs[NR_SYS_REGS]; 229c97e166eSJames Morse 230c97e166eSJames Morse struct kvm_vcpu *__hyp_running_vcpu; 2314f8d6632SMarc Zyngier }; 2324f8d6632SMarc Zyngier 233eb41238cSAndrew Murray struct kvm_pmu_events { 234eb41238cSAndrew Murray u32 events_host; 235eb41238cSAndrew Murray u32 events_guest; 236eb41238cSAndrew Murray }; 237eb41238cSAndrew Murray 238630a1685SAndrew Murray struct kvm_host_data { 239630a1685SAndrew Murray struct kvm_cpu_context host_ctxt; 240eb41238cSAndrew Murray struct kvm_pmu_events pmu_events; 241630a1685SAndrew Murray }; 242630a1685SAndrew Murray 243ff367fe4SDavid Brazdil struct kvm_host_psci_config { 244ff367fe4SDavid Brazdil /* PSCI version used by host. */ 245ff367fe4SDavid Brazdil u32 version; 246ff367fe4SDavid Brazdil 247ff367fe4SDavid Brazdil /* Function IDs used by host if version is v0.1. */ 248ff367fe4SDavid Brazdil struct psci_0_1_function_ids function_ids_0_1; 249ff367fe4SDavid Brazdil 250767c973fSMarc Zyngier bool psci_0_1_cpu_suspend_implemented; 251767c973fSMarc Zyngier bool psci_0_1_cpu_on_implemented; 252767c973fSMarc Zyngier bool psci_0_1_cpu_off_implemented; 253767c973fSMarc Zyngier bool psci_0_1_migrate_implemented; 254ff367fe4SDavid Brazdil }; 255ff367fe4SDavid Brazdil 256ff367fe4SDavid Brazdil extern struct kvm_host_psci_config kvm_nvhe_sym(kvm_host_psci_config); 257ff367fe4SDavid Brazdil #define kvm_host_psci_config CHOOSE_NVHE_SYM(kvm_host_psci_config) 258ff367fe4SDavid Brazdil 25961fe0c37SDavid Brazdil extern s64 kvm_nvhe_sym(hyp_physvirt_offset); 26061fe0c37SDavid Brazdil #define hyp_physvirt_offset CHOOSE_NVHE_SYM(hyp_physvirt_offset) 26161fe0c37SDavid Brazdil 26261fe0c37SDavid Brazdil extern u64 kvm_nvhe_sym(hyp_cpu_logical_map)[NR_CPUS]; 26361fe0c37SDavid Brazdil #define hyp_cpu_logical_map CHOOSE_NVHE_SYM(hyp_cpu_logical_map) 26461fe0c37SDavid Brazdil 265358b28f0SMarc Zyngier struct vcpu_reset_state { 266358b28f0SMarc Zyngier unsigned long pc; 267358b28f0SMarc Zyngier unsigned long r0; 268358b28f0SMarc Zyngier bool be; 269358b28f0SMarc Zyngier bool reset; 270358b28f0SMarc Zyngier }; 271358b28f0SMarc Zyngier 2724f8d6632SMarc Zyngier struct kvm_vcpu_arch { 2734f8d6632SMarc Zyngier struct kvm_cpu_context ctxt; 274b43b5dd9SDave Martin void *sve_state; 275b43b5dd9SDave Martin unsigned int sve_max_vl; 2764f8d6632SMarc Zyngier 277a0e50aa3SChristoffer Dall /* Stage 2 paging state used by the hardware on next switch */ 278a0e50aa3SChristoffer Dall struct kvm_s2_mmu *hw_mmu; 279a0e50aa3SChristoffer Dall 2804f8d6632SMarc Zyngier /* HYP configuration */ 2814f8d6632SMarc Zyngier u64 hcr_el2; 28256c7f5e7SAlex Bennée u32 mdcr_el2; 2834f8d6632SMarc Zyngier 2844f8d6632SMarc Zyngier /* Exception Information */ 2854f8d6632SMarc Zyngier struct kvm_vcpu_fault_info fault; 2864f8d6632SMarc Zyngier 28755e3748eSMarc Zyngier /* State of various workarounds, see kvm_asm.h for bit assignment */ 28855e3748eSMarc Zyngier u64 workaround_flags; 28955e3748eSMarc Zyngier 290fa89d31cSDave Martin /* Miscellaneous vcpu state flags */ 291fa89d31cSDave Martin u64 flags; 2920c557ed4SMarc Zyngier 29384e690bfSAlex Bennée /* 29484e690bfSAlex Bennée * We maintain more than a single set of debug registers to support 29584e690bfSAlex Bennée * debugging the guest from the host and to maintain separate host and 29684e690bfSAlex Bennée * guest state during world switches. vcpu_debug_state are the debug 29784e690bfSAlex Bennée * registers of the vcpu as the guest sees them. host_debug_state are 298834bf887SAlex Bennée * the host registers which are saved and restored during 299834bf887SAlex Bennée * world switches. external_debug_state contains the debug 300834bf887SAlex Bennée * values we want to debug the guest. This is set via the 301834bf887SAlex Bennée * KVM_SET_GUEST_DEBUG ioctl. 30284e690bfSAlex Bennée * 30384e690bfSAlex Bennée * debug_ptr points to the set of debug registers that should be loaded 30484e690bfSAlex Bennée * onto the hardware when running the guest. 30584e690bfSAlex Bennée */ 30684e690bfSAlex Bennée struct kvm_guest_debug_arch *debug_ptr; 30784e690bfSAlex Bennée struct kvm_guest_debug_arch vcpu_debug_state; 308834bf887SAlex Bennée struct kvm_guest_debug_arch external_debug_state; 30984e690bfSAlex Bennée 310e6b673b7SDave Martin struct thread_info *host_thread_info; /* hyp VA */ 311e6b673b7SDave Martin struct user_fpsimd_state *host_fpsimd_state; /* hyp VA */ 312e6b673b7SDave Martin 313f85279b4SWill Deacon struct { 314f85279b4SWill Deacon /* {Break,watch}point registers */ 315f85279b4SWill Deacon struct kvm_guest_debug_arch regs; 316f85279b4SWill Deacon /* Statistical profiling extension */ 317f85279b4SWill Deacon u64 pmscr_el1; 318f85279b4SWill Deacon } host_debug_state; 3194f8d6632SMarc Zyngier 3204f8d6632SMarc Zyngier /* VGIC state */ 3214f8d6632SMarc Zyngier struct vgic_cpu vgic_cpu; 3224f8d6632SMarc Zyngier struct arch_timer_cpu timer_cpu; 32304fe4726SShannon Zhao struct kvm_pmu pmu; 3244f8d6632SMarc Zyngier 3254f8d6632SMarc Zyngier /* 3264f8d6632SMarc Zyngier * Anything that is not used directly from assembly code goes 3274f8d6632SMarc Zyngier * here. 3284f8d6632SMarc Zyngier */ 3294f8d6632SMarc Zyngier 330337b99bfSAlex Bennée /* 331337b99bfSAlex Bennée * Guest registers we preserve during guest debugging. 332337b99bfSAlex Bennée * 333337b99bfSAlex Bennée * These shadow registers are updated by the kvm_handle_sys_reg 334337b99bfSAlex Bennée * trap handler if the guest accesses or updates them while we 335337b99bfSAlex Bennée * are using guest debug. 336337b99bfSAlex Bennée */ 337337b99bfSAlex Bennée struct { 338337b99bfSAlex Bennée u32 mdscr_el1; 339337b99bfSAlex Bennée } guest_debug_preserved; 340337b99bfSAlex Bennée 3413781528eSEric Auger /* vcpu power-off state */ 3423781528eSEric Auger bool power_off; 3434f8d6632SMarc Zyngier 3443b92830aSEric Auger /* Don't run the guest (internal implementation need) */ 3453b92830aSEric Auger bool pause; 3463b92830aSEric Auger 3474f8d6632SMarc Zyngier /* Cache some mmu pages needed inside spinlock regions */ 3484f8d6632SMarc Zyngier struct kvm_mmu_memory_cache mmu_page_cache; 3494f8d6632SMarc Zyngier 3504f8d6632SMarc Zyngier /* Target CPU and feature flags */ 3516c8c0c4dSChen Gang int target; 3524f8d6632SMarc Zyngier DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES); 3534f8d6632SMarc Zyngier 3544f8d6632SMarc Zyngier /* Detect first run of a vcpu */ 3554f8d6632SMarc Zyngier bool has_run_once; 3564715c14bSJames Morse 3574715c14bSJames Morse /* Virtual SError ESR to restore when HCR_EL2.VSE is set */ 3584715c14bSJames Morse u64 vsesr_el2; 359d47533daSChristoffer Dall 360358b28f0SMarc Zyngier /* Additional reset state */ 361358b28f0SMarc Zyngier struct vcpu_reset_state reset_state; 362358b28f0SMarc Zyngier 363d47533daSChristoffer Dall /* True when deferrable sysregs are loaded on the physical CPU, 36413aeb9b4SDavid Brazdil * see kvm_vcpu_load_sysregs_vhe and kvm_vcpu_put_sysregs_vhe. */ 365d47533daSChristoffer Dall bool sysregs_loaded_on_cpu; 3668564d637SSteven Price 3678564d637SSteven Price /* Guest PV state */ 3688564d637SSteven Price struct { 3698564d637SSteven Price u64 last_steal; 3708564d637SSteven Price gpa_t base; 3718564d637SSteven Price } steal; 3724f8d6632SMarc Zyngier }; 3734f8d6632SMarc Zyngier 374b43b5dd9SDave Martin /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ 375b43b5dd9SDave Martin #define vcpu_sve_pffr(vcpu) ((void *)((char *)((vcpu)->arch.sve_state) + \ 376b43b5dd9SDave Martin sve_ffr_offset((vcpu)->arch.sve_max_vl))) 377b43b5dd9SDave Martin 378e1c9c983SDave Martin #define vcpu_sve_state_size(vcpu) ({ \ 379e1c9c983SDave Martin size_t __size_ret; \ 380e1c9c983SDave Martin unsigned int __vcpu_vq; \ 381e1c9c983SDave Martin \ 382e1c9c983SDave Martin if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) { \ 383e1c9c983SDave Martin __size_ret = 0; \ 384e1c9c983SDave Martin } else { \ 385e1c9c983SDave Martin __vcpu_vq = sve_vq_from_vl((vcpu)->arch.sve_max_vl); \ 386e1c9c983SDave Martin __size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq); \ 387e1c9c983SDave Martin } \ 388e1c9c983SDave Martin \ 389e1c9c983SDave Martin __size_ret; \ 390e1c9c983SDave Martin }) 391e1c9c983SDave Martin 392fa89d31cSDave Martin /* vcpu_arch flags field values: */ 393fa89d31cSDave Martin #define KVM_ARM64_DEBUG_DIRTY (1 << 0) 394e6b673b7SDave Martin #define KVM_ARM64_FP_ENABLED (1 << 1) /* guest FP regs loaded */ 395e6b673b7SDave Martin #define KVM_ARM64_FP_HOST (1 << 2) /* host FP regs loaded */ 396e6b673b7SDave Martin #define KVM_ARM64_HOST_SVE_IN_USE (1 << 3) /* backup for host TIF_SVE */ 397b3eb56b6SDave Martin #define KVM_ARM64_HOST_SVE_ENABLED (1 << 4) /* SVE enabled for EL0 */ 3981765edbaSDave Martin #define KVM_ARM64_GUEST_HAS_SVE (1 << 5) /* SVE exposed to guest */ 3999033bba4SDave Martin #define KVM_ARM64_VCPU_SVE_FINALIZED (1 << 6) /* SVE config completed */ 400b890d75cSAmit Daniel Kachhap #define KVM_ARM64_GUEST_HAS_PTRAUTH (1 << 7) /* PTRAUTH exposed to guest */ 401e650b64fSMarc Zyngier #define KVM_ARM64_PENDING_EXCEPTION (1 << 8) /* Exception pending */ 402e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_MASK (7 << 9) /* Target EL/MODE */ 403e650b64fSMarc Zyngier 404*fa18aca9SMaxim Levitsky #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \ 405*fa18aca9SMaxim Levitsky KVM_GUESTDBG_USE_SW_BP | \ 406*fa18aca9SMaxim Levitsky KVM_GUESTDBG_USE_HW | \ 407*fa18aca9SMaxim Levitsky KVM_GUESTDBG_SINGLESTEP) 408e650b64fSMarc Zyngier /* 409e650b64fSMarc Zyngier * When KVM_ARM64_PENDING_EXCEPTION is set, KVM_ARM64_EXCEPT_MASK can 410e650b64fSMarc Zyngier * take the following values: 411e650b64fSMarc Zyngier * 412e650b64fSMarc Zyngier * For AArch32 EL1: 413e650b64fSMarc Zyngier */ 414e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA32_UND (0 << 9) 415e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA32_IABT (1 << 9) 416e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA32_DABT (2 << 9) 417e650b64fSMarc Zyngier /* For AArch64: */ 418e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_SYNC (0 << 9) 419e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_IRQ (1 << 9) 420e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_FIQ (2 << 9) 421e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_SERR (3 << 9) 422e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_EL1 (0 << 11) 423e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_EL2 (1 << 11) 424e650b64fSMarc Zyngier 425e650b64fSMarc Zyngier /* 426e650b64fSMarc Zyngier * Overlaps with KVM_ARM64_EXCEPT_MASK on purpose so that it can't be 427e650b64fSMarc Zyngier * set together with an exception... 428e650b64fSMarc Zyngier */ 429e650b64fSMarc Zyngier #define KVM_ARM64_INCREMENT_PC (1 << 9) /* Increment PC */ 4301765edbaSDave Martin 4311765edbaSDave Martin #define vcpu_has_sve(vcpu) (system_supports_sve() && \ 4321765edbaSDave Martin ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_SVE)) 433fa89d31cSDave Martin 434bf4086b1SMarc Zyngier #ifdef CONFIG_ARM64_PTR_AUTH 435bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) \ 436bf4086b1SMarc Zyngier ((cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) || \ 437bf4086b1SMarc Zyngier cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) && \ 438bf4086b1SMarc Zyngier (vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_PTRAUTH) 439bf4086b1SMarc Zyngier #else 440bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) false 441bf4086b1SMarc Zyngier #endif 442b890d75cSAmit Daniel Kachhap 443e47c2055SMarc Zyngier #define vcpu_gp_regs(v) (&(v)->arch.ctxt.regs) 4448d404c4cSChristoffer Dall 4458d404c4cSChristoffer Dall /* 4461b422dd7SMarc Zyngier * Only use __vcpu_sys_reg/ctxt_sys_reg if you know you want the 4471b422dd7SMarc Zyngier * memory backed version of a register, and not the one most recently 4481b422dd7SMarc Zyngier * accessed by a running VCPU. For example, for userspace access or 4491b422dd7SMarc Zyngier * for system registers that are never context switched, but only 4501b422dd7SMarc Zyngier * emulated. 4518d404c4cSChristoffer Dall */ 4521b422dd7SMarc Zyngier #define __ctxt_sys_reg(c,r) (&(c)->sys_regs[(r)]) 4531b422dd7SMarc Zyngier 4541b422dd7SMarc Zyngier #define ctxt_sys_reg(c,r) (*__ctxt_sys_reg(c,r)) 4551b422dd7SMarc Zyngier 4561b422dd7SMarc Zyngier #define __vcpu_sys_reg(v,r) (ctxt_sys_reg(&(v)->arch.ctxt, (r))) 4578d404c4cSChristoffer Dall 458da6f1666SChristoffer Dall u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg); 459d47533daSChristoffer Dall void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg); 4608d404c4cSChristoffer Dall 46121c81001SMarc Zyngier static inline bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val) 46221c81001SMarc Zyngier { 46321c81001SMarc Zyngier /* 46421c81001SMarc Zyngier * *** VHE ONLY *** 46521c81001SMarc Zyngier * 46621c81001SMarc Zyngier * System registers listed in the switch are not saved on every 46721c81001SMarc Zyngier * exit from the guest but are only saved on vcpu_put. 46821c81001SMarc Zyngier * 46921c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 47021c81001SMarc Zyngier * should never be listed below, because the guest cannot modify its 47121c81001SMarc Zyngier * own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's 47221c81001SMarc Zyngier * thread when emulating cross-VCPU communication. 47321c81001SMarc Zyngier */ 47421c81001SMarc Zyngier if (!has_vhe()) 47521c81001SMarc Zyngier return false; 47621c81001SMarc Zyngier 47721c81001SMarc Zyngier switch (reg) { 47821c81001SMarc Zyngier case CSSELR_EL1: *val = read_sysreg_s(SYS_CSSELR_EL1); break; 47921c81001SMarc Zyngier case SCTLR_EL1: *val = read_sysreg_s(SYS_SCTLR_EL12); break; 48021c81001SMarc Zyngier case CPACR_EL1: *val = read_sysreg_s(SYS_CPACR_EL12); break; 48121c81001SMarc Zyngier case TTBR0_EL1: *val = read_sysreg_s(SYS_TTBR0_EL12); break; 48221c81001SMarc Zyngier case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); break; 48321c81001SMarc Zyngier case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break; 48421c81001SMarc Zyngier case ESR_EL1: *val = read_sysreg_s(SYS_ESR_EL12); break; 48521c81001SMarc Zyngier case AFSR0_EL1: *val = read_sysreg_s(SYS_AFSR0_EL12); break; 48621c81001SMarc Zyngier case AFSR1_EL1: *val = read_sysreg_s(SYS_AFSR1_EL12); break; 48721c81001SMarc Zyngier case FAR_EL1: *val = read_sysreg_s(SYS_FAR_EL12); break; 48821c81001SMarc Zyngier case MAIR_EL1: *val = read_sysreg_s(SYS_MAIR_EL12); break; 48921c81001SMarc Zyngier case VBAR_EL1: *val = read_sysreg_s(SYS_VBAR_EL12); break; 49021c81001SMarc Zyngier case CONTEXTIDR_EL1: *val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break; 49121c81001SMarc Zyngier case TPIDR_EL0: *val = read_sysreg_s(SYS_TPIDR_EL0); break; 49221c81001SMarc Zyngier case TPIDRRO_EL0: *val = read_sysreg_s(SYS_TPIDRRO_EL0); break; 49321c81001SMarc Zyngier case TPIDR_EL1: *val = read_sysreg_s(SYS_TPIDR_EL1); break; 49421c81001SMarc Zyngier case AMAIR_EL1: *val = read_sysreg_s(SYS_AMAIR_EL12); break; 49521c81001SMarc Zyngier case CNTKCTL_EL1: *val = read_sysreg_s(SYS_CNTKCTL_EL12); break; 49621c81001SMarc Zyngier case ELR_EL1: *val = read_sysreg_s(SYS_ELR_EL12); break; 49721c81001SMarc Zyngier case PAR_EL1: *val = read_sysreg_par(); break; 49821c81001SMarc Zyngier case DACR32_EL2: *val = read_sysreg_s(SYS_DACR32_EL2); break; 49921c81001SMarc Zyngier case IFSR32_EL2: *val = read_sysreg_s(SYS_IFSR32_EL2); break; 50021c81001SMarc Zyngier case DBGVCR32_EL2: *val = read_sysreg_s(SYS_DBGVCR32_EL2); break; 50121c81001SMarc Zyngier default: return false; 50221c81001SMarc Zyngier } 50321c81001SMarc Zyngier 50421c81001SMarc Zyngier return true; 50521c81001SMarc Zyngier } 50621c81001SMarc Zyngier 50721c81001SMarc Zyngier static inline bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg) 50821c81001SMarc Zyngier { 50921c81001SMarc Zyngier /* 51021c81001SMarc Zyngier * *** VHE ONLY *** 51121c81001SMarc Zyngier * 51221c81001SMarc Zyngier * System registers listed in the switch are not restored on every 51321c81001SMarc Zyngier * entry to the guest but are only restored on vcpu_load. 51421c81001SMarc Zyngier * 51521c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 51621c81001SMarc Zyngier * should never be listed below, because the MPIDR should only be set 51721c81001SMarc Zyngier * once, before running the VCPU, and never changed later. 51821c81001SMarc Zyngier */ 51921c81001SMarc Zyngier if (!has_vhe()) 52021c81001SMarc Zyngier return false; 52121c81001SMarc Zyngier 52221c81001SMarc Zyngier switch (reg) { 52321c81001SMarc Zyngier case CSSELR_EL1: write_sysreg_s(val, SYS_CSSELR_EL1); break; 52421c81001SMarc Zyngier case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break; 52521c81001SMarc Zyngier case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); break; 52621c81001SMarc Zyngier case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); break; 52721c81001SMarc Zyngier case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break; 52821c81001SMarc Zyngier case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; 52921c81001SMarc Zyngier case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); break; 53021c81001SMarc Zyngier case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); break; 53121c81001SMarc Zyngier case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); break; 53221c81001SMarc Zyngier case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); break; 53321c81001SMarc Zyngier case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); break; 53421c81001SMarc Zyngier case VBAR_EL1: write_sysreg_s(val, SYS_VBAR_EL12); break; 53521c81001SMarc Zyngier case CONTEXTIDR_EL1: write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break; 53621c81001SMarc Zyngier case TPIDR_EL0: write_sysreg_s(val, SYS_TPIDR_EL0); break; 53721c81001SMarc Zyngier case TPIDRRO_EL0: write_sysreg_s(val, SYS_TPIDRRO_EL0); break; 53821c81001SMarc Zyngier case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); break; 53921c81001SMarc Zyngier case AMAIR_EL1: write_sysreg_s(val, SYS_AMAIR_EL12); break; 54021c81001SMarc Zyngier case CNTKCTL_EL1: write_sysreg_s(val, SYS_CNTKCTL_EL12); break; 54121c81001SMarc Zyngier case ELR_EL1: write_sysreg_s(val, SYS_ELR_EL12); break; 54221c81001SMarc Zyngier case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); break; 54321c81001SMarc Zyngier case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); break; 54421c81001SMarc Zyngier case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); break; 54521c81001SMarc Zyngier case DBGVCR32_EL2: write_sysreg_s(val, SYS_DBGVCR32_EL2); break; 54621c81001SMarc Zyngier default: return false; 54721c81001SMarc Zyngier } 54821c81001SMarc Zyngier 54921c81001SMarc Zyngier return true; 55021c81001SMarc Zyngier } 55121c81001SMarc Zyngier 5524f8d6632SMarc Zyngier struct kvm_vm_stat { 5538a7e75d4SSuraj Jitindar Singh ulong remote_tlb_flush; 5544f8d6632SMarc Zyngier }; 5554f8d6632SMarc Zyngier 5564f8d6632SMarc Zyngier struct kvm_vcpu_stat { 5578a7e75d4SSuraj Jitindar Singh u64 halt_successful_poll; 5588a7e75d4SSuraj Jitindar Singh u64 halt_attempted_poll; 559cb953129SDavid Matlack u64 halt_poll_success_ns; 560cb953129SDavid Matlack u64 halt_poll_fail_ns; 5618a7e75d4SSuraj Jitindar Singh u64 halt_poll_invalid; 5628a7e75d4SSuraj Jitindar Singh u64 halt_wakeup; 5638a7e75d4SSuraj Jitindar Singh u64 hvc_exit_stat; 564b19e6892SAmit Tomar u64 wfe_exit_stat; 565b19e6892SAmit Tomar u64 wfi_exit_stat; 566b19e6892SAmit Tomar u64 mmio_exit_user; 567b19e6892SAmit Tomar u64 mmio_exit_kernel; 568b19e6892SAmit Tomar u64 exits; 5694f8d6632SMarc Zyngier }; 5704f8d6632SMarc Zyngier 571473bdc0eSAnup Patel int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init); 5724f8d6632SMarc Zyngier unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu); 5734f8d6632SMarc Zyngier int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); 5744f8d6632SMarc Zyngier int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 5754f8d6632SMarc Zyngier int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 5766ac4a5acSMarc Zyngier 5776ac4a5acSMarc Zyngier unsigned long kvm_arm_num_sys_reg_descs(struct kvm_vcpu *vcpu); 5786ac4a5acSMarc Zyngier int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices); 5796ac4a5acSMarc Zyngier int kvm_arm_sys_reg_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *); 5806ac4a5acSMarc Zyngier int kvm_arm_sys_reg_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *); 5816ac4a5acSMarc Zyngier 582539aee0eSJames Morse int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 583b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 584b7b27facSDongjiu Geng 585539aee0eSJames Morse int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 586b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 5874f8d6632SMarc Zyngier 5884f8d6632SMarc Zyngier #define KVM_ARCH_WANT_MMU_NOTIFIER 5894f8d6632SMarc Zyngier 590b13216cfSChristoffer Dall void kvm_arm_halt_guest(struct kvm *kvm); 591b13216cfSChristoffer Dall void kvm_arm_resume_guest(struct kvm *kvm); 5924f8d6632SMarc Zyngier 593f50b6f6aSAndrew Scull #define kvm_call_hyp_nvhe(f, ...) \ 594f50b6f6aSAndrew Scull ({ \ 59505469831SAndrew Scull struct arm_smccc_res res; \ 59605469831SAndrew Scull \ 59705469831SAndrew Scull arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(f), \ 59805469831SAndrew Scull ##__VA_ARGS__, &res); \ 59905469831SAndrew Scull WARN_ON(res.a0 != SMCCC_RET_SUCCESS); \ 60005469831SAndrew Scull \ 60105469831SAndrew Scull res.a1; \ 602f50b6f6aSAndrew Scull }) 603f50b6f6aSAndrew Scull 60418fc7bf8SMarc Zyngier /* 60518fc7bf8SMarc Zyngier * The couple of isb() below are there to guarantee the same behaviour 60618fc7bf8SMarc Zyngier * on VHE as on !VHE, where the eret to EL1 acts as a context 60718fc7bf8SMarc Zyngier * synchronization event. 60818fc7bf8SMarc Zyngier */ 60918fc7bf8SMarc Zyngier #define kvm_call_hyp(f, ...) \ 61018fc7bf8SMarc Zyngier do { \ 61118fc7bf8SMarc Zyngier if (has_vhe()) { \ 61218fc7bf8SMarc Zyngier f(__VA_ARGS__); \ 61318fc7bf8SMarc Zyngier isb(); \ 61418fc7bf8SMarc Zyngier } else { \ 615f50b6f6aSAndrew Scull kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 61618fc7bf8SMarc Zyngier } \ 61718fc7bf8SMarc Zyngier } while(0) 61818fc7bf8SMarc Zyngier 61918fc7bf8SMarc Zyngier #define kvm_call_hyp_ret(f, ...) \ 62018fc7bf8SMarc Zyngier ({ \ 62118fc7bf8SMarc Zyngier typeof(f(__VA_ARGS__)) ret; \ 62218fc7bf8SMarc Zyngier \ 62318fc7bf8SMarc Zyngier if (has_vhe()) { \ 62418fc7bf8SMarc Zyngier ret = f(__VA_ARGS__); \ 62518fc7bf8SMarc Zyngier isb(); \ 62618fc7bf8SMarc Zyngier } else { \ 62705469831SAndrew Scull ret = kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 62818fc7bf8SMarc Zyngier } \ 62918fc7bf8SMarc Zyngier \ 63018fc7bf8SMarc Zyngier ret; \ 63118fc7bf8SMarc Zyngier }) 63222b39ca3SMarc Zyngier 633cf5d3188SChristoffer Dall void force_vm_exit(const cpumask_t *mask); 6348199ed0eSMario Smarduch void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot); 6354f8d6632SMarc Zyngier 63674cc7e0cSTianjia Zhang int handle_exit(struct kvm_vcpu *vcpu, int exception_index); 63774cc7e0cSTianjia Zhang void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index); 6384f8d6632SMarc Zyngier 6396ac4a5acSMarc Zyngier int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu); 6406ac4a5acSMarc Zyngier int kvm_handle_cp14_32(struct kvm_vcpu *vcpu); 6416ac4a5acSMarc Zyngier int kvm_handle_cp14_64(struct kvm_vcpu *vcpu); 6426ac4a5acSMarc Zyngier int kvm_handle_cp15_32(struct kvm_vcpu *vcpu); 6436ac4a5acSMarc Zyngier int kvm_handle_cp15_64(struct kvm_vcpu *vcpu); 6446ac4a5acSMarc Zyngier int kvm_handle_sys_reg(struct kvm_vcpu *vcpu); 6456ac4a5acSMarc Zyngier 6466ac4a5acSMarc Zyngier void kvm_reset_sys_regs(struct kvm_vcpu *vcpu); 6476ac4a5acSMarc Zyngier 6486ac4a5acSMarc Zyngier void kvm_sys_reg_table_init(void); 6496ac4a5acSMarc Zyngier 6500e20f5e2SMarc Zyngier /* MMIO helpers */ 6510e20f5e2SMarc Zyngier void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data); 6520e20f5e2SMarc Zyngier unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len); 6530e20f5e2SMarc Zyngier 65474cc7e0cSTianjia Zhang int kvm_handle_mmio_return(struct kvm_vcpu *vcpu); 65574cc7e0cSTianjia Zhang int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa); 6560e20f5e2SMarc Zyngier 6574f8d6632SMarc Zyngier int kvm_perf_init(void); 6584f8d6632SMarc Zyngier int kvm_perf_teardown(void); 6594f8d6632SMarc Zyngier 660b48c1a45SSteven Price long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu); 6618564d637SSteven Price gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu); 6628564d637SSteven Price void kvm_update_stolen_time(struct kvm_vcpu *vcpu); 6638564d637SSteven Price 664004a0124SAndrew Jones bool kvm_arm_pvtime_supported(void); 66558772e9aSSteven Price int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu, 66658772e9aSSteven Price struct kvm_device_attr *attr); 66758772e9aSSteven Price int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu, 66858772e9aSSteven Price struct kvm_device_attr *attr); 66958772e9aSSteven Price int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu, 67058772e9aSSteven Price struct kvm_device_attr *attr); 67158772e9aSSteven Price 6728564d637SSteven Price static inline void kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch *vcpu_arch) 6738564d637SSteven Price { 6748564d637SSteven Price vcpu_arch->steal.base = GPA_INVALID; 6758564d637SSteven Price } 6768564d637SSteven Price 6778564d637SSteven Price static inline bool kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch *vcpu_arch) 6788564d637SSteven Price { 6798564d637SSteven Price return (vcpu_arch->steal.base != GPA_INVALID); 6808564d637SSteven Price } 681b48c1a45SSteven Price 682b7b27facSDongjiu Geng void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome); 683b7b27facSDongjiu Geng 6844429fc64SAndre Przywara struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr); 6854429fc64SAndre Przywara 68614ef9d04SMarc Zyngier DECLARE_KVM_HYP_PER_CPU(struct kvm_host_data, kvm_host_data); 6874464e210SChristoffer Dall 6881e0cf16cSMarc Zyngier static inline void kvm_init_host_cpu_context(struct kvm_cpu_context *cpu_ctxt) 68932f13955SMarc Zyngier { 69032f13955SMarc Zyngier /* The host's MPIDR is immutable, so let's set it up at boot time */ 69171071acfSMarc Zyngier ctxt_sys_reg(cpu_ctxt, MPIDR_EL1) = read_cpuid_mpidr(); 69232f13955SMarc Zyngier } 69332f13955SMarc Zyngier 69433e5f4e5SMarc Zyngier static inline bool kvm_arch_requires_vhe(void) 69585acda3bSDave Martin { 69685acda3bSDave Martin /* 69785acda3bSDave Martin * The Arm architecture specifies that implementation of SVE 69885acda3bSDave Martin * requires VHE also to be implemented. The KVM code for arm64 69985acda3bSDave Martin * relies on this when SVE is present: 70085acda3bSDave Martin */ 70185acda3bSDave Martin if (system_supports_sve()) 70285acda3bSDave Martin return true; 70333e5f4e5SMarc Zyngier 70433e5f4e5SMarc Zyngier return false; 70585acda3bSDave Martin } 70685acda3bSDave Martin 707384b40caSMark Rutland void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu); 708384b40caSMark Rutland 7090865e636SRadim Krčmář static inline void kvm_arch_hardware_unsetup(void) {} 7100865e636SRadim Krčmář static inline void kvm_arch_sync_events(struct kvm *kvm) {} 7110865e636SRadim Krčmář static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 7123491caf2SChristian Borntraeger static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 7130865e636SRadim Krčmář 71456c7f5e7SAlex Bennée void kvm_arm_init_debug(void); 71556c7f5e7SAlex Bennée void kvm_arm_setup_debug(struct kvm_vcpu *vcpu); 71656c7f5e7SAlex Bennée void kvm_arm_clear_debug(struct kvm_vcpu *vcpu); 71784e690bfSAlex Bennée void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu); 718bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, 719bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 720bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, 721bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 722bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu, 723bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 72456c7f5e7SAlex Bennée 725e6b673b7SDave Martin /* Guest/host FPSIMD coordination helpers */ 726e6b673b7SDave Martin int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu); 727e6b673b7SDave Martin void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu); 728e6b673b7SDave Martin void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu); 729e6b673b7SDave Martin void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu); 730e6b673b7SDave Martin 731eb41238cSAndrew Murray static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr) 732eb41238cSAndrew Murray { 733435e53fbSAndrew Murray return (!has_vhe() && attr->exclude_host); 734eb41238cSAndrew Murray } 735eb41238cSAndrew Murray 736e6b673b7SDave Martin #ifdef CONFIG_KVM /* Avoid conflicts with core headers if CONFIG_KVM=n */ 737e6b673b7SDave Martin static inline int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu) 73817eed27bSDave Martin { 739e6b673b7SDave Martin return kvm_arch_vcpu_run_map_fp(vcpu); 74017eed27bSDave Martin } 741eb41238cSAndrew Murray 742eb41238cSAndrew Murray void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr); 743eb41238cSAndrew Murray void kvm_clr_pmu_events(u32 clr); 7443d91befbSAndrew Murray 745435e53fbSAndrew Murray void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu); 746435e53fbSAndrew Murray void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu); 747eb41238cSAndrew Murray #else 748eb41238cSAndrew Murray static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {} 749eb41238cSAndrew Murray static inline void kvm_clr_pmu_events(u32 clr) {} 750e6b673b7SDave Martin #endif 75117eed27bSDave Martin 75213aeb9b4SDavid Brazdil void kvm_vcpu_load_sysregs_vhe(struct kvm_vcpu *vcpu); 75313aeb9b4SDavid Brazdil void kvm_vcpu_put_sysregs_vhe(struct kvm_vcpu *vcpu); 754bc192ceeSChristoffer Dall 755b130a8f7SMarc Zyngier int kvm_set_ipa_limit(void); 7560f62f0e9SSuzuki K Poulose 757d1e5b0e9SMarc Orr #define __KVM_HAVE_ARCH_VM_ALLOC 758d1e5b0e9SMarc Orr struct kvm *kvm_arch_alloc_vm(void); 759d1e5b0e9SMarc Orr void kvm_arch_free_vm(struct kvm *kvm); 760d1e5b0e9SMarc Orr 761bca607ebSMarc Zyngier int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type); 7625b6c6742SSuzuki K Poulose 76392e68b2bSDave Martin int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature); 7649033bba4SDave Martin bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu); 7659033bba4SDave Martin 7669033bba4SDave Martin #define kvm_arm_vcpu_sve_finalized(vcpu) \ 7679033bba4SDave Martin ((vcpu)->arch.flags & KVM_ARM64_VCPU_SVE_FINALIZED) 7687dd32a0dSDave Martin 76914bda7a9SMarc Zyngier #define kvm_vcpu_has_pmu(vcpu) \ 77014bda7a9SMarc Zyngier (test_bit(KVM_ARM_VCPU_PMU_V3, (vcpu)->arch.features)) 77114bda7a9SMarc Zyngier 772a8e190cdSArd Biesheuvel int kvm_trng_call(struct kvm_vcpu *vcpu); 773a8e190cdSArd Biesheuvel 7744f8d6632SMarc Zyngier #endif /* __ARM64_KVM_HOST_H__ */ 775