1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 24f8d6632SMarc Zyngier /* 34f8d6632SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 44f8d6632SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 54f8d6632SMarc Zyngier * 64f8d6632SMarc Zyngier * Derived from arch/arm/include/asm/kvm_host.h: 74f8d6632SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 84f8d6632SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 94f8d6632SMarc Zyngier */ 104f8d6632SMarc Zyngier 114f8d6632SMarc Zyngier #ifndef __ARM64_KVM_HOST_H__ 124f8d6632SMarc Zyngier #define __ARM64_KVM_HOST_H__ 134f8d6632SMarc Zyngier 1405469831SAndrew Scull #include <linux/arm-smccc.h> 153f61f409SDave Martin #include <linux/bitmap.h> 1665647300SPaolo Bonzini #include <linux/types.h> 173f61f409SDave Martin #include <linux/jump_label.h> 1865647300SPaolo Bonzini #include <linux/kvm_types.h> 193f61f409SDave Martin #include <linux/percpu.h> 20ff367fe4SDavid Brazdil #include <linux/psci.h> 2185738e05SJulien Thierry #include <asm/arch_gicv3.h> 223f61f409SDave Martin #include <asm/barrier.h> 2363a1e1c9SMark Rutland #include <asm/cpufeature.h> 241e0cf16cSMarc Zyngier #include <asm/cputype.h> 254f5abad9SJames Morse #include <asm/daifflags.h> 2617eed27bSDave Martin #include <asm/fpsimd.h> 274f8d6632SMarc Zyngier #include <asm/kvm.h> 283a3604bcSMarc Zyngier #include <asm/kvm_asm.h> 294f8d6632SMarc Zyngier 30c1426e4cSEric Auger #define __KVM_HAVE_ARCH_INTC_INITIALIZED 31c1426e4cSEric Auger 32920552b2SDavid Hildenbrand #define KVM_HALT_POLL_NS_DEFAULT 500000 334f8d6632SMarc Zyngier 344f8d6632SMarc Zyngier #include <kvm/arm_vgic.h> 354f8d6632SMarc Zyngier #include <kvm/arm_arch_timer.h> 3604fe4726SShannon Zhao #include <kvm/arm_pmu.h> 374f8d6632SMarc Zyngier 38ef748917SMing Lei #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS 39ef748917SMing Lei 40a22fa321SAmit Daniel Kachhap #define KVM_VCPU_MAX_FEATURES 7 414f8d6632SMarc Zyngier 427b244e2bSAndrew Jones #define KVM_REQ_SLEEP \ 432387149eSAndrew Jones KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 44325f9c64SAndrew Jones #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) 45358b28f0SMarc Zyngier #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2) 468564d637SSteven Price #define KVM_REQ_RECORD_STEAL KVM_ARCH_REQ(3) 47d9c3872cSMarc Zyngier #define KVM_REQ_RELOAD_GICv4 KVM_ARCH_REQ(4) 48d0c94c49SMarc Zyngier #define KVM_REQ_RELOAD_PMU KVM_ARCH_REQ(5) 497b33a09dSOliver Upton #define KVM_REQ_SUSPEND KVM_ARCH_REQ(6) 50b13216cfSChristoffer Dall 51c862626eSKeqian Zhu #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 52c862626eSKeqian Zhu KVM_DIRTY_LOG_INITIALLY_SET) 53c862626eSKeqian Zhu 54fcc5bf89SJing Zhang #define KVM_HAVE_MMU_RWLOCK 55fcc5bf89SJing Zhang 56d8b369c4SDavid Brazdil /* 57d8b369c4SDavid Brazdil * Mode of operation configurable with kvm-arm.mode early param. 58d8b369c4SDavid Brazdil * See Documentation/admin-guide/kernel-parameters.txt for more information. 59d8b369c4SDavid Brazdil */ 60d8b369c4SDavid Brazdil enum kvm_mode { 61d8b369c4SDavid Brazdil KVM_MODE_DEFAULT, 62d8b369c4SDavid Brazdil KVM_MODE_PROTECTED, 63b6a68b97SMarc Zyngier KVM_MODE_NONE, 64d8b369c4SDavid Brazdil }; 653eb681fbSDavid Brazdil enum kvm_mode kvm_get_mode(void); 66d8b369c4SDavid Brazdil 6761bbe380SChristoffer Dall DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 6861bbe380SChristoffer Dall 699033bba4SDave Martin extern unsigned int kvm_sve_max_vl; 70a3be836dSDave Martin int kvm_arm_init_sve(void); 710f062bfeSDave Martin 726b7982feSAnshuman Khandual u32 __attribute_const__ kvm_target_cpu(void); 734f8d6632SMarc Zyngier int kvm_reset_vcpu(struct kvm_vcpu *vcpu); 7419bcc89eSSean Christopherson void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu); 754f8d6632SMarc Zyngier 76717a7eebSQuentin Perret struct kvm_hyp_memcache { 77717a7eebSQuentin Perret phys_addr_t head; 78717a7eebSQuentin Perret unsigned long nr_pages; 79717a7eebSQuentin Perret }; 80717a7eebSQuentin Perret 81717a7eebSQuentin Perret static inline void push_hyp_memcache(struct kvm_hyp_memcache *mc, 82717a7eebSQuentin Perret phys_addr_t *p, 83717a7eebSQuentin Perret phys_addr_t (*to_pa)(void *virt)) 84717a7eebSQuentin Perret { 85717a7eebSQuentin Perret *p = mc->head; 86717a7eebSQuentin Perret mc->head = to_pa(p); 87717a7eebSQuentin Perret mc->nr_pages++; 88717a7eebSQuentin Perret } 89717a7eebSQuentin Perret 90717a7eebSQuentin Perret static inline void *pop_hyp_memcache(struct kvm_hyp_memcache *mc, 91717a7eebSQuentin Perret void *(*to_va)(phys_addr_t phys)) 92717a7eebSQuentin Perret { 93717a7eebSQuentin Perret phys_addr_t *p = to_va(mc->head); 94717a7eebSQuentin Perret 95717a7eebSQuentin Perret if (!mc->nr_pages) 96717a7eebSQuentin Perret return NULL; 97717a7eebSQuentin Perret 98717a7eebSQuentin Perret mc->head = *p; 99717a7eebSQuentin Perret mc->nr_pages--; 100717a7eebSQuentin Perret 101717a7eebSQuentin Perret return p; 102717a7eebSQuentin Perret } 103717a7eebSQuentin Perret 104717a7eebSQuentin Perret static inline int __topup_hyp_memcache(struct kvm_hyp_memcache *mc, 105717a7eebSQuentin Perret unsigned long min_pages, 106717a7eebSQuentin Perret void *(*alloc_fn)(void *arg), 107717a7eebSQuentin Perret phys_addr_t (*to_pa)(void *virt), 108717a7eebSQuentin Perret void *arg) 109717a7eebSQuentin Perret { 110717a7eebSQuentin Perret while (mc->nr_pages < min_pages) { 111717a7eebSQuentin Perret phys_addr_t *p = alloc_fn(arg); 112717a7eebSQuentin Perret 113717a7eebSQuentin Perret if (!p) 114717a7eebSQuentin Perret return -ENOMEM; 115717a7eebSQuentin Perret push_hyp_memcache(mc, p, to_pa); 116717a7eebSQuentin Perret } 117717a7eebSQuentin Perret 118717a7eebSQuentin Perret return 0; 119717a7eebSQuentin Perret } 120717a7eebSQuentin Perret 121717a7eebSQuentin Perret static inline void __free_hyp_memcache(struct kvm_hyp_memcache *mc, 122717a7eebSQuentin Perret void (*free_fn)(void *virt, void *arg), 123717a7eebSQuentin Perret void *(*to_va)(phys_addr_t phys), 124717a7eebSQuentin Perret void *arg) 125717a7eebSQuentin Perret { 126717a7eebSQuentin Perret while (mc->nr_pages) 127717a7eebSQuentin Perret free_fn(pop_hyp_memcache(mc, to_va), arg); 128717a7eebSQuentin Perret } 129717a7eebSQuentin Perret 130717a7eebSQuentin Perret void free_hyp_memcache(struct kvm_hyp_memcache *mc); 131717a7eebSQuentin Perret int topup_hyp_memcache(struct kvm_hyp_memcache *mc, unsigned long min_pages); 132717a7eebSQuentin Perret 133e329fb75SChristoffer Dall struct kvm_vmid { 1343248136bSJulien Grall atomic64_t id; 135e329fb75SChristoffer Dall }; 136e329fb75SChristoffer Dall 137a0e50aa3SChristoffer Dall struct kvm_s2_mmu { 138e329fb75SChristoffer Dall struct kvm_vmid vmid; 1394f8d6632SMarc Zyngier 140a0e50aa3SChristoffer Dall /* 141a0e50aa3SChristoffer Dall * stage2 entry level table 142a0e50aa3SChristoffer Dall * 143a0e50aa3SChristoffer Dall * Two kvm_s2_mmu structures in the same VM can point to the same 144a0e50aa3SChristoffer Dall * pgd here. This happens when running a guest using a 145a0e50aa3SChristoffer Dall * translation regime that isn't affected by its own stage-2 146a0e50aa3SChristoffer Dall * translation, such as a non-VHE hypervisor running at vEL2, or 147a0e50aa3SChristoffer Dall * for vEL1/EL0 with vHCR_EL2.VM == 0. In that case, we use the 148a0e50aa3SChristoffer Dall * canonical stage-2 page tables. 149a0e50aa3SChristoffer Dall */ 150e329fb75SChristoffer Dall phys_addr_t pgd_phys; 15171233d05SWill Deacon struct kvm_pgtable *pgt; 1524f8d6632SMarc Zyngier 15394d0e598SMarc Zyngier /* The last vcpu id that ran on each physical CPU */ 15494d0e598SMarc Zyngier int __percpu *last_vcpu_ran; 15594d0e598SMarc Zyngier 156cfb1a98dSQuentin Perret struct kvm_arch *arch; 157a0e50aa3SChristoffer Dall }; 158a0e50aa3SChristoffer Dall 1598d14797bSWill Deacon struct kvm_arch_memory_slot { 1608d14797bSWill Deacon }; 1618d14797bSWill Deacon 16205714cabSRaghavendra Rao Ananta /** 16305714cabSRaghavendra Rao Ananta * struct kvm_smccc_features: Descriptor of the hypercall services exposed to the guests 16405714cabSRaghavendra Rao Ananta * 16505714cabSRaghavendra Rao Ananta * @std_bmap: Bitmap of standard secure service calls 166428fd678SRaghavendra Rao Ananta * @std_hyp_bmap: Bitmap of standard hypervisor service calls 167b22216e1SRaghavendra Rao Ananta * @vendor_hyp_bmap: Bitmap of vendor specific hypervisor service calls 16805714cabSRaghavendra Rao Ananta */ 16905714cabSRaghavendra Rao Ananta struct kvm_smccc_features { 17005714cabSRaghavendra Rao Ananta unsigned long std_bmap; 171428fd678SRaghavendra Rao Ananta unsigned long std_hyp_bmap; 172b22216e1SRaghavendra Rao Ananta unsigned long vendor_hyp_bmap; 17305714cabSRaghavendra Rao Ananta }; 17405714cabSRaghavendra Rao Ananta 175a1ec5c70SFuad Tabba typedef unsigned int pkvm_handle_t; 176a1ec5c70SFuad Tabba 1779d0c063aSFuad Tabba struct kvm_protected_vm { 1789d0c063aSFuad Tabba pkvm_handle_t handle; 179f41dff4eSQuentin Perret struct kvm_hyp_memcache teardown_mc; 1809d0c063aSFuad Tabba }; 1819d0c063aSFuad Tabba 182a0e50aa3SChristoffer Dall struct kvm_arch { 183a0e50aa3SChristoffer Dall struct kvm_s2_mmu mmu; 184a0e50aa3SChristoffer Dall 185a0e50aa3SChristoffer Dall /* VTCR_EL2 value for this VM */ 186a0e50aa3SChristoffer Dall u64 vtcr; 187a0e50aa3SChristoffer Dall 1884f8d6632SMarc Zyngier /* Interrupt controller */ 1894f8d6632SMarc Zyngier struct vgic_dist vgic; 19085bd0ba1SMarc Zyngier 19185bd0ba1SMarc Zyngier /* Mandated version of PSCI */ 19285bd0ba1SMarc Zyngier u32 psci_version; 193c726200dSChristoffer Dall 194c726200dSChristoffer Dall /* 195c726200dSChristoffer Dall * If we encounter a data abort without valid instruction syndrome 196c726200dSChristoffer Dall * information, report this to user space. User space can (and 197c726200dSChristoffer Dall * should) opt in to this feature if KVM_CAP_ARM_NISV_TO_USER is 198c726200dSChristoffer Dall * supported. 199c726200dSChristoffer Dall */ 20006394531SMarc Zyngier #define KVM_ARCH_FLAG_RETURN_NISV_IO_ABORT_TO_USER 0 20106394531SMarc Zyngier /* Memory Tagging Extension enabled for the guest */ 20206394531SMarc Zyngier #define KVM_ARCH_FLAG_MTE_ENABLED 1 20306394531SMarc Zyngier /* At least one vCPU has ran in the VM */ 20406394531SMarc Zyngier #define KVM_ARCH_FLAG_HAS_RAN_ONCE 2 20526bf74bdSReiji Watanabe /* 20626bf74bdSReiji Watanabe * The following two bits are used to indicate the guest's EL1 20726bf74bdSReiji Watanabe * register width configuration. A value of KVM_ARCH_FLAG_EL1_32BIT 20826bf74bdSReiji Watanabe * bit is valid only when KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED is set. 20926bf74bdSReiji Watanabe * Otherwise, the guest's EL1 register width has not yet been 21026bf74bdSReiji Watanabe * determined yet. 21126bf74bdSReiji Watanabe */ 21226bf74bdSReiji Watanabe #define KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED 3 21326bf74bdSReiji Watanabe #define KVM_ARCH_FLAG_EL1_32BIT 4 214bfbab445SOliver Upton /* PSCI SYSTEM_SUSPEND enabled for the guest */ 215bfbab445SOliver Upton #define KVM_ARCH_FLAG_SYSTEM_SUSPEND_ENABLED 5 21626bf74bdSReiji Watanabe 21706394531SMarc Zyngier unsigned long flags; 218fd65a3b5SMarc Zyngier 219d7eec236SMarc Zyngier /* 220d7eec236SMarc Zyngier * VM-wide PMU filter, implemented as a bitmap and big enough for 221d7eec236SMarc Zyngier * up to 2^10 events (ARMv8.0) or 2^16 events (ARMv8.1+). 222d7eec236SMarc Zyngier */ 223d7eec236SMarc Zyngier unsigned long *pmu_filter; 22446b18782SMarc Zyngier struct arm_pmu *arm_pmu; 22523711a5eSMarc Zyngier 226583cda1bSAlexandru Elisei cpumask_var_t supported_cpus; 22723711a5eSMarc Zyngier 22823711a5eSMarc Zyngier u8 pfr0_csv2; 2294f1df628SMarc Zyngier u8 pfr0_csv3; 2303d0dba57SMarc Zyngier struct { 2313d0dba57SMarc Zyngier u8 imp:4; 2323d0dba57SMarc Zyngier u8 unimp:4; 2333d0dba57SMarc Zyngier } dfr0_pmuver; 23405714cabSRaghavendra Rao Ananta 23505714cabSRaghavendra Rao Ananta /* Hypercall features firmware registers' descriptor */ 23605714cabSRaghavendra Rao Ananta struct kvm_smccc_features smccc_feat; 237a1ec5c70SFuad Tabba 238a1ec5c70SFuad Tabba /* 2399d0c063aSFuad Tabba * For an untrusted host VM, 'pkvm.handle' is used to lookup 240a1ec5c70SFuad Tabba * the associated pKVM instance in the hypervisor. 241a1ec5c70SFuad Tabba */ 2429d0c063aSFuad Tabba struct kvm_protected_vm pkvm; 2434f8d6632SMarc Zyngier }; 2444f8d6632SMarc Zyngier 2454f8d6632SMarc Zyngier struct kvm_vcpu_fault_info { 2460b12620fSAlexandru Elisei u64 esr_el2; /* Hyp Syndrom Register */ 2474f8d6632SMarc Zyngier u64 far_el2; /* Hyp Fault Address Register */ 2484f8d6632SMarc Zyngier u64 hpfar_el2; /* Hyp IPA Fault Address Register */ 2490067df41SJames Morse u64 disr_el1; /* Deferred [SError] Status Register */ 2504f8d6632SMarc Zyngier }; 2514f8d6632SMarc Zyngier 2529d8415d6SMarc Zyngier enum vcpu_sysreg { 2538f7f4fe7SMarc Zyngier __INVALID_SYSREG__, /* 0 is reserved as an invalid value */ 2549d8415d6SMarc Zyngier MPIDR_EL1, /* MultiProcessor Affinity Register */ 2559d8415d6SMarc Zyngier CSSELR_EL1, /* Cache Size Selection Register */ 2569d8415d6SMarc Zyngier SCTLR_EL1, /* System Control Register */ 2579d8415d6SMarc Zyngier ACTLR_EL1, /* Auxiliary Control Register */ 2589d8415d6SMarc Zyngier CPACR_EL1, /* Coprocessor Access Control */ 25973433762SDave Martin ZCR_EL1, /* SVE Control */ 2609d8415d6SMarc Zyngier TTBR0_EL1, /* Translation Table Base Register 0 */ 2619d8415d6SMarc Zyngier TTBR1_EL1, /* Translation Table Base Register 1 */ 2629d8415d6SMarc Zyngier TCR_EL1, /* Translation Control Register */ 2639d8415d6SMarc Zyngier ESR_EL1, /* Exception Syndrome Register */ 264ef769e32SAdam Buchbinder AFSR0_EL1, /* Auxiliary Fault Status Register 0 */ 265ef769e32SAdam Buchbinder AFSR1_EL1, /* Auxiliary Fault Status Register 1 */ 2669d8415d6SMarc Zyngier FAR_EL1, /* Fault Address Register */ 2679d8415d6SMarc Zyngier MAIR_EL1, /* Memory Attribute Indirection Register */ 2689d8415d6SMarc Zyngier VBAR_EL1, /* Vector Base Address Register */ 2699d8415d6SMarc Zyngier CONTEXTIDR_EL1, /* Context ID Register */ 2709d8415d6SMarc Zyngier TPIDR_EL0, /* Thread ID, User R/W */ 2719d8415d6SMarc Zyngier TPIDRRO_EL0, /* Thread ID, User R/O */ 2729d8415d6SMarc Zyngier TPIDR_EL1, /* Thread ID, Privileged */ 2739d8415d6SMarc Zyngier AMAIR_EL1, /* Aux Memory Attribute Indirection Register */ 2749d8415d6SMarc Zyngier CNTKCTL_EL1, /* Timer Control Register (EL1) */ 2759d8415d6SMarc Zyngier PAR_EL1, /* Physical Address Register */ 2769d8415d6SMarc Zyngier MDSCR_EL1, /* Monitor Debug System Control Register */ 2779d8415d6SMarc Zyngier MDCCINT_EL1, /* Monitor Debug Comms Channel Interrupt Enable Reg */ 278d42e2671SOliver Upton OSLSR_EL1, /* OS Lock Status Register */ 279c773ae2bSJames Morse DISR_EL1, /* Deferred Interrupt Status Register */ 2809d8415d6SMarc Zyngier 281ab946834SShannon Zhao /* Performance Monitors Registers */ 282ab946834SShannon Zhao PMCR_EL0, /* Control Register */ 2833965c3ceSShannon Zhao PMSELR_EL0, /* Event Counter Selection Register */ 284051ff581SShannon Zhao PMEVCNTR0_EL0, /* Event Counter Register (0-30) */ 285051ff581SShannon Zhao PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30, 286051ff581SShannon Zhao PMCCNTR_EL0, /* Cycle Counter Register */ 2879feb21acSShannon Zhao PMEVTYPER0_EL0, /* Event Type Register (0-30) */ 2889feb21acSShannon Zhao PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30, 2899feb21acSShannon Zhao PMCCFILTR_EL0, /* Cycle Count Filter Register */ 29096b0eebcSShannon Zhao PMCNTENSET_EL0, /* Count Enable Set Register */ 2919db52c78SShannon Zhao PMINTENSET_EL1, /* Interrupt Enable Set Register */ 29276d883c4SShannon Zhao PMOVSSET_EL0, /* Overflow Flag Status Set Register */ 293d692b8adSShannon Zhao PMUSERENR_EL0, /* User Enable Register */ 294ab946834SShannon Zhao 295384b40caSMark Rutland /* Pointer Authentication Registers in a strict increasing order. */ 296384b40caSMark Rutland APIAKEYLO_EL1, 297384b40caSMark Rutland APIAKEYHI_EL1, 298384b40caSMark Rutland APIBKEYLO_EL1, 299384b40caSMark Rutland APIBKEYHI_EL1, 300384b40caSMark Rutland APDAKEYLO_EL1, 301384b40caSMark Rutland APDAKEYHI_EL1, 302384b40caSMark Rutland APDBKEYLO_EL1, 303384b40caSMark Rutland APDBKEYHI_EL1, 304384b40caSMark Rutland APGAKEYLO_EL1, 305384b40caSMark Rutland APGAKEYHI_EL1, 306384b40caSMark Rutland 30798909e6dSMarc Zyngier ELR_EL1, 3081bded23eSMarc Zyngier SP_EL1, 309710f1982SMarc Zyngier SPSR_EL1, 31098909e6dSMarc Zyngier 31141ce82f6SMarc Zyngier CNTVOFF_EL2, 31241ce82f6SMarc Zyngier CNTV_CVAL_EL0, 31341ce82f6SMarc Zyngier CNTV_CTL_EL0, 31441ce82f6SMarc Zyngier CNTP_CVAL_EL0, 31541ce82f6SMarc Zyngier CNTP_CTL_EL0, 31641ce82f6SMarc Zyngier 317e1f358b5SSteven Price /* Memory Tagging Extension registers */ 318e1f358b5SSteven Price RGSR_EL1, /* Random Allocation Tag Seed Register */ 319e1f358b5SSteven Price GCR_EL1, /* Tag Control Register */ 320e1f358b5SSteven Price TFSR_EL1, /* Tag Fault Status Register (EL1) */ 321e1f358b5SSteven Price TFSRE0_EL1, /* Tag Fault Status Register (EL0) */ 322e1f358b5SSteven Price 3239d8415d6SMarc Zyngier /* 32bit specific registers. Keep them at the end of the range */ 3249d8415d6SMarc Zyngier DACR32_EL2, /* Domain Access Control Register */ 3259d8415d6SMarc Zyngier IFSR32_EL2, /* Instruction Fault Status Register */ 3269d8415d6SMarc Zyngier FPEXC32_EL2, /* Floating-Point Exception Control Register */ 3279d8415d6SMarc Zyngier DBGVCR32_EL2, /* Debug Vector Catch Register */ 3289d8415d6SMarc Zyngier 3299d8415d6SMarc Zyngier NR_SYS_REGS /* Nothing after this line! */ 3309d8415d6SMarc Zyngier }; 3319d8415d6SMarc Zyngier 3324f8d6632SMarc Zyngier struct kvm_cpu_context { 333e47c2055SMarc Zyngier struct user_pt_regs regs; /* sp = sp_el0 */ 334e47c2055SMarc Zyngier 335fd85b667SMarc Zyngier u64 spsr_abt; 336fd85b667SMarc Zyngier u64 spsr_und; 337fd85b667SMarc Zyngier u64 spsr_irq; 338fd85b667SMarc Zyngier u64 spsr_fiq; 339e47c2055SMarc Zyngier 340e47c2055SMarc Zyngier struct user_fpsimd_state fp_regs; 341e47c2055SMarc Zyngier 3424f8d6632SMarc Zyngier u64 sys_regs[NR_SYS_REGS]; 343c97e166eSJames Morse 344c97e166eSJames Morse struct kvm_vcpu *__hyp_running_vcpu; 3454f8d6632SMarc Zyngier }; 3464f8d6632SMarc Zyngier 347630a1685SAndrew Murray struct kvm_host_data { 348630a1685SAndrew Murray struct kvm_cpu_context host_ctxt; 349630a1685SAndrew Murray }; 350630a1685SAndrew Murray 351ff367fe4SDavid Brazdil struct kvm_host_psci_config { 352ff367fe4SDavid Brazdil /* PSCI version used by host. */ 353ff367fe4SDavid Brazdil u32 version; 354ff367fe4SDavid Brazdil 355ff367fe4SDavid Brazdil /* Function IDs used by host if version is v0.1. */ 356ff367fe4SDavid Brazdil struct psci_0_1_function_ids function_ids_0_1; 357ff367fe4SDavid Brazdil 358767c973fSMarc Zyngier bool psci_0_1_cpu_suspend_implemented; 359767c973fSMarc Zyngier bool psci_0_1_cpu_on_implemented; 360767c973fSMarc Zyngier bool psci_0_1_cpu_off_implemented; 361767c973fSMarc Zyngier bool psci_0_1_migrate_implemented; 362ff367fe4SDavid Brazdil }; 363ff367fe4SDavid Brazdil 364ff367fe4SDavid Brazdil extern struct kvm_host_psci_config kvm_nvhe_sym(kvm_host_psci_config); 365ff367fe4SDavid Brazdil #define kvm_host_psci_config CHOOSE_NVHE_SYM(kvm_host_psci_config) 366ff367fe4SDavid Brazdil 36761fe0c37SDavid Brazdil extern s64 kvm_nvhe_sym(hyp_physvirt_offset); 36861fe0c37SDavid Brazdil #define hyp_physvirt_offset CHOOSE_NVHE_SYM(hyp_physvirt_offset) 36961fe0c37SDavid Brazdil 37061fe0c37SDavid Brazdil extern u64 kvm_nvhe_sym(hyp_cpu_logical_map)[NR_CPUS]; 37161fe0c37SDavid Brazdil #define hyp_cpu_logical_map CHOOSE_NVHE_SYM(hyp_cpu_logical_map) 37261fe0c37SDavid Brazdil 373358b28f0SMarc Zyngier struct vcpu_reset_state { 374358b28f0SMarc Zyngier unsigned long pc; 375358b28f0SMarc Zyngier unsigned long r0; 376358b28f0SMarc Zyngier bool be; 377358b28f0SMarc Zyngier bool reset; 378358b28f0SMarc Zyngier }; 379358b28f0SMarc Zyngier 3804f8d6632SMarc Zyngier struct kvm_vcpu_arch { 3814f8d6632SMarc Zyngier struct kvm_cpu_context ctxt; 3820033cd93SMark Brown 383baa85152SMark Brown /* 384baa85152SMark Brown * Guest floating point state 385baa85152SMark Brown * 386baa85152SMark Brown * The architecture has two main floating point extensions, 387baa85152SMark Brown * the original FPSIMD and SVE. These have overlapping 388baa85152SMark Brown * register views, with the FPSIMD V registers occupying the 389baa85152SMark Brown * low 128 bits of the SVE Z registers. When the core 390baa85152SMark Brown * floating point code saves the register state of a task it 391baa85152SMark Brown * records which view it saved in fp_type. 392baa85152SMark Brown */ 393b43b5dd9SDave Martin void *sve_state; 394baa85152SMark Brown enum fp_type fp_type; 395b43b5dd9SDave Martin unsigned int sve_max_vl; 3960033cd93SMark Brown u64 svcr; 3974f8d6632SMarc Zyngier 398a0e50aa3SChristoffer Dall /* Stage 2 paging state used by the hardware on next switch */ 399a0e50aa3SChristoffer Dall struct kvm_s2_mmu *hw_mmu; 400a0e50aa3SChristoffer Dall 4011460b4b2SFuad Tabba /* Values of trap registers for the guest. */ 4024f8d6632SMarc Zyngier u64 hcr_el2; 403d6c850ddSFuad Tabba u64 mdcr_el2; 404cd496228SFuad Tabba u64 cptr_el2; 4054f8d6632SMarc Zyngier 4061460b4b2SFuad Tabba /* Values of trap registers for the host before guest entry. */ 4071460b4b2SFuad Tabba u64 mdcr_el2_host; 4084f8d6632SMarc Zyngier 4094f8d6632SMarc Zyngier /* Exception Information */ 4104f8d6632SMarc Zyngier struct kvm_vcpu_fault_info fault; 4114f8d6632SMarc Zyngier 412f8077b0dSMarc Zyngier /* Ownership of the FP regs */ 413f8077b0dSMarc Zyngier enum { 414f8077b0dSMarc Zyngier FP_STATE_FREE, 415f8077b0dSMarc Zyngier FP_STATE_HOST_OWNED, 416f8077b0dSMarc Zyngier FP_STATE_GUEST_OWNED, 417f8077b0dSMarc Zyngier } fp_state; 418f8077b0dSMarc Zyngier 419690bacb8SMarc Zyngier /* Configuration flags, set once and for all before the vcpu can run */ 42054ddda91SMarc Zyngier u8 cflags; 421690bacb8SMarc Zyngier 422690bacb8SMarc Zyngier /* Input flags to the hypervisor code, potentially cleared after use */ 42354ddda91SMarc Zyngier u8 iflags; 424690bacb8SMarc Zyngier 425690bacb8SMarc Zyngier /* State flags for kernel bookkeeping, unused by the hypervisor code */ 42654ddda91SMarc Zyngier u8 sflags; 427690bacb8SMarc Zyngier 42884e690bfSAlex Bennée /* 4290fa4a313SMarc Zyngier * Don't run the guest (internal implementation need). 4300fa4a313SMarc Zyngier * 4310fa4a313SMarc Zyngier * Contrary to the flags above, this is set/cleared outside of 4320fa4a313SMarc Zyngier * a vcpu context, and thus cannot be mixed with the flags 4330fa4a313SMarc Zyngier * themselves (or the flag accesses need to be made atomic). 4340fa4a313SMarc Zyngier */ 4350fa4a313SMarc Zyngier bool pause; 4360c557ed4SMarc Zyngier 43784e690bfSAlex Bennée /* 43884e690bfSAlex Bennée * We maintain more than a single set of debug registers to support 43984e690bfSAlex Bennée * debugging the guest from the host and to maintain separate host and 44084e690bfSAlex Bennée * guest state during world switches. vcpu_debug_state are the debug 44184e690bfSAlex Bennée * registers of the vcpu as the guest sees them. host_debug_state are 442834bf887SAlex Bennée * the host registers which are saved and restored during 443834bf887SAlex Bennée * world switches. external_debug_state contains the debug 444834bf887SAlex Bennée * values we want to debug the guest. This is set via the 445834bf887SAlex Bennée * KVM_SET_GUEST_DEBUG ioctl. 44684e690bfSAlex Bennée * 44784e690bfSAlex Bennée * debug_ptr points to the set of debug registers that should be loaded 44884e690bfSAlex Bennée * onto the hardware when running the guest. 44984e690bfSAlex Bennée */ 45084e690bfSAlex Bennée struct kvm_guest_debug_arch *debug_ptr; 45184e690bfSAlex Bennée struct kvm_guest_debug_arch vcpu_debug_state; 452834bf887SAlex Bennée struct kvm_guest_debug_arch external_debug_state; 45384e690bfSAlex Bennée 454e6b673b7SDave Martin struct user_fpsimd_state *host_fpsimd_state; /* hyp VA */ 45552b28657SQuentin Perret struct task_struct *parent_task; 456e6b673b7SDave Martin 457f85279b4SWill Deacon struct { 458f85279b4SWill Deacon /* {Break,watch}point registers */ 459f85279b4SWill Deacon struct kvm_guest_debug_arch regs; 460f85279b4SWill Deacon /* Statistical profiling extension */ 461f85279b4SWill Deacon u64 pmscr_el1; 462a1319260SSuzuki K Poulose /* Self-hosted trace */ 463a1319260SSuzuki K Poulose u64 trfcr_el1; 464f85279b4SWill Deacon } host_debug_state; 4654f8d6632SMarc Zyngier 4664f8d6632SMarc Zyngier /* VGIC state */ 4674f8d6632SMarc Zyngier struct vgic_cpu vgic_cpu; 4684f8d6632SMarc Zyngier struct arch_timer_cpu timer_cpu; 46904fe4726SShannon Zhao struct kvm_pmu pmu; 4704f8d6632SMarc Zyngier 4714f8d6632SMarc Zyngier /* 472337b99bfSAlex Bennée * Guest registers we preserve during guest debugging. 473337b99bfSAlex Bennée * 474337b99bfSAlex Bennée * These shadow registers are updated by the kvm_handle_sys_reg 475337b99bfSAlex Bennée * trap handler if the guest accesses or updates them while we 476337b99bfSAlex Bennée * are using guest debug. 477337b99bfSAlex Bennée */ 478337b99bfSAlex Bennée struct { 479337b99bfSAlex Bennée u32 mdscr_el1; 48034fbdee0SReiji Watanabe bool pstate_ss; 481337b99bfSAlex Bennée } guest_debug_preserved; 482337b99bfSAlex Bennée 483b171f9bbSOliver Upton /* vcpu power state */ 484b171f9bbSOliver Upton struct kvm_mp_state mp_state; 4854f8d6632SMarc Zyngier 4864f8d6632SMarc Zyngier /* Cache some mmu pages needed inside spinlock regions */ 4874f8d6632SMarc Zyngier struct kvm_mmu_memory_cache mmu_page_cache; 4884f8d6632SMarc Zyngier 4894f8d6632SMarc Zyngier /* Target CPU and feature flags */ 4906c8c0c4dSChen Gang int target; 4914f8d6632SMarc Zyngier DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES); 4924f8d6632SMarc Zyngier 4934715c14bSJames Morse /* Virtual SError ESR to restore when HCR_EL2.VSE is set */ 4944715c14bSJames Morse u64 vsesr_el2; 495d47533daSChristoffer Dall 496358b28f0SMarc Zyngier /* Additional reset state */ 497358b28f0SMarc Zyngier struct vcpu_reset_state reset_state; 498358b28f0SMarc Zyngier 4998564d637SSteven Price /* Guest PV state */ 5008564d637SSteven Price struct { 5018564d637SSteven Price u64 last_steal; 5028564d637SSteven Price gpa_t base; 5038564d637SSteven Price } steal; 5044f8d6632SMarc Zyngier }; 5054f8d6632SMarc Zyngier 506e87abb73SMarc Zyngier /* 507e87abb73SMarc Zyngier * Each 'flag' is composed of a comma-separated triplet: 508e87abb73SMarc Zyngier * 509e87abb73SMarc Zyngier * - the flag-set it belongs to in the vcpu->arch structure 510e87abb73SMarc Zyngier * - the value for that flag 511e87abb73SMarc Zyngier * - the mask for that flag 512e87abb73SMarc Zyngier * 513e87abb73SMarc Zyngier * __vcpu_single_flag() builds such a triplet for a single-bit flag. 514e87abb73SMarc Zyngier * unpack_vcpu_flag() extract the flag value from the triplet for 515e87abb73SMarc Zyngier * direct use outside of the flag accessors. 516e87abb73SMarc Zyngier */ 517e87abb73SMarc Zyngier #define __vcpu_single_flag(_set, _f) _set, (_f), (_f) 518e87abb73SMarc Zyngier 519e87abb73SMarc Zyngier #define __unpack_flag(_set, _f, _m) _f 520e87abb73SMarc Zyngier #define unpack_vcpu_flag(...) __unpack_flag(__VA_ARGS__) 521e87abb73SMarc Zyngier 5225a3984f4SMarc Zyngier #define __build_check_flag(v, flagset, f, m) \ 5235a3984f4SMarc Zyngier do { \ 5245a3984f4SMarc Zyngier typeof(v->arch.flagset) *_fset; \ 5255a3984f4SMarc Zyngier \ 5265a3984f4SMarc Zyngier /* Check that the flags fit in the mask */ \ 5275a3984f4SMarc Zyngier BUILD_BUG_ON(HWEIGHT(m) != HWEIGHT((f) | (m))); \ 5285a3984f4SMarc Zyngier /* Check that the flags fit in the type */ \ 5295a3984f4SMarc Zyngier BUILD_BUG_ON((sizeof(*_fset) * 8) <= __fls(m)); \ 5305a3984f4SMarc Zyngier } while (0) 5315a3984f4SMarc Zyngier 532e87abb73SMarc Zyngier #define __vcpu_get_flag(v, flagset, f, m) \ 533e87abb73SMarc Zyngier ({ \ 5345a3984f4SMarc Zyngier __build_check_flag(v, flagset, f, m); \ 5355a3984f4SMarc Zyngier \ 536e87abb73SMarc Zyngier v->arch.flagset & (m); \ 537e87abb73SMarc Zyngier }) 538e87abb73SMarc Zyngier 539e87abb73SMarc Zyngier #define __vcpu_set_flag(v, flagset, f, m) \ 540e87abb73SMarc Zyngier do { \ 541e87abb73SMarc Zyngier typeof(v->arch.flagset) *fset; \ 542e87abb73SMarc Zyngier \ 5435a3984f4SMarc Zyngier __build_check_flag(v, flagset, f, m); \ 5445a3984f4SMarc Zyngier \ 545e87abb73SMarc Zyngier fset = &v->arch.flagset; \ 546e87abb73SMarc Zyngier if (HWEIGHT(m) > 1) \ 547e87abb73SMarc Zyngier *fset &= ~(m); \ 548e87abb73SMarc Zyngier *fset |= (f); \ 549e87abb73SMarc Zyngier } while (0) 550e87abb73SMarc Zyngier 551e87abb73SMarc Zyngier #define __vcpu_clear_flag(v, flagset, f, m) \ 552e87abb73SMarc Zyngier do { \ 553e87abb73SMarc Zyngier typeof(v->arch.flagset) *fset; \ 554e87abb73SMarc Zyngier \ 5555a3984f4SMarc Zyngier __build_check_flag(v, flagset, f, m); \ 5565a3984f4SMarc Zyngier \ 557e87abb73SMarc Zyngier fset = &v->arch.flagset; \ 558e87abb73SMarc Zyngier *fset &= ~(m); \ 559e87abb73SMarc Zyngier } while (0) 560e87abb73SMarc Zyngier 561e87abb73SMarc Zyngier #define vcpu_get_flag(v, ...) __vcpu_get_flag((v), __VA_ARGS__) 562e87abb73SMarc Zyngier #define vcpu_set_flag(v, ...) __vcpu_set_flag((v), __VA_ARGS__) 563e87abb73SMarc Zyngier #define vcpu_clear_flag(v, ...) __vcpu_clear_flag((v), __VA_ARGS__) 564e87abb73SMarc Zyngier 5654c0680d3SMarc Zyngier /* SVE exposed to guest */ 5664c0680d3SMarc Zyngier #define GUEST_HAS_SVE __vcpu_single_flag(cflags, BIT(0)) 5674c0680d3SMarc Zyngier /* SVE config completed */ 5684c0680d3SMarc Zyngier #define VCPU_SVE_FINALIZED __vcpu_single_flag(cflags, BIT(1)) 5694c0680d3SMarc Zyngier /* PTRAUTH exposed to guest */ 5704c0680d3SMarc Zyngier #define GUEST_HAS_PTRAUTH __vcpu_single_flag(cflags, BIT(2)) 5714c0680d3SMarc Zyngier 572699bb2e0SMarc Zyngier /* Exception pending */ 573699bb2e0SMarc Zyngier #define PENDING_EXCEPTION __vcpu_single_flag(iflags, BIT(0)) 574699bb2e0SMarc Zyngier /* 575699bb2e0SMarc Zyngier * PC increment. Overlaps with EXCEPT_MASK on purpose so that it can't 576699bb2e0SMarc Zyngier * be set together with an exception... 577699bb2e0SMarc Zyngier */ 578699bb2e0SMarc Zyngier #define INCREMENT_PC __vcpu_single_flag(iflags, BIT(1)) 579699bb2e0SMarc Zyngier /* Target EL/MODE (not a single flag, but let's abuse the macro) */ 580699bb2e0SMarc Zyngier #define EXCEPT_MASK __vcpu_single_flag(iflags, GENMASK(3, 1)) 581699bb2e0SMarc Zyngier 582699bb2e0SMarc Zyngier /* Helpers to encode exceptions with minimum fuss */ 583699bb2e0SMarc Zyngier #define __EXCEPT_MASK_VAL unpack_vcpu_flag(EXCEPT_MASK) 584699bb2e0SMarc Zyngier #define __EXCEPT_SHIFT __builtin_ctzl(__EXCEPT_MASK_VAL) 585699bb2e0SMarc Zyngier #define __vcpu_except_flags(_f) iflags, (_f << __EXCEPT_SHIFT), __EXCEPT_MASK_VAL 586699bb2e0SMarc Zyngier 587699bb2e0SMarc Zyngier /* 588699bb2e0SMarc Zyngier * When PENDING_EXCEPTION is set, EXCEPT_MASK can take the following 589699bb2e0SMarc Zyngier * values: 590699bb2e0SMarc Zyngier * 591699bb2e0SMarc Zyngier * For AArch32 EL1: 592699bb2e0SMarc Zyngier */ 593699bb2e0SMarc Zyngier #define EXCEPT_AA32_UND __vcpu_except_flags(0) 594699bb2e0SMarc Zyngier #define EXCEPT_AA32_IABT __vcpu_except_flags(1) 595699bb2e0SMarc Zyngier #define EXCEPT_AA32_DABT __vcpu_except_flags(2) 596699bb2e0SMarc Zyngier /* For AArch64: */ 597699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_SYNC __vcpu_except_flags(0) 598699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_IRQ __vcpu_except_flags(1) 599699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_FIQ __vcpu_except_flags(2) 600699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_SERR __vcpu_except_flags(3) 601699bb2e0SMarc Zyngier /* For AArch64 with NV (one day): */ 602699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_SYNC __vcpu_except_flags(4) 603699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_IRQ __vcpu_except_flags(5) 604699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_FIQ __vcpu_except_flags(6) 605699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_SERR __vcpu_except_flags(7) 606b1da4908SMarc Zyngier /* Guest debug is live */ 607b1da4908SMarc Zyngier #define DEBUG_DIRTY __vcpu_single_flag(iflags, BIT(4)) 608b1da4908SMarc Zyngier /* Save SPE context if active */ 609b1da4908SMarc Zyngier #define DEBUG_STATE_SAVE_SPE __vcpu_single_flag(iflags, BIT(5)) 610b1da4908SMarc Zyngier /* Save TRBE context if active */ 611b1da4908SMarc Zyngier #define DEBUG_STATE_SAVE_TRBE __vcpu_single_flag(iflags, BIT(6)) 612e87abb73SMarc Zyngier 6130affa37fSMarc Zyngier /* SVE enabled for host EL0 */ 6140affa37fSMarc Zyngier #define HOST_SVE_ENABLED __vcpu_single_flag(sflags, BIT(0)) 6150affa37fSMarc Zyngier /* SME enabled for EL0 */ 6160affa37fSMarc Zyngier #define HOST_SME_ENABLED __vcpu_single_flag(sflags, BIT(1)) 617aff3ccd7SMarc Zyngier /* Physical CPU not in supported_cpus */ 618aff3ccd7SMarc Zyngier #define ON_UNSUPPORTED_CPU __vcpu_single_flag(sflags, BIT(2)) 619eebc538dSMarc Zyngier /* WFIT instruction trapped */ 620eebc538dSMarc Zyngier #define IN_WFIT __vcpu_single_flag(sflags, BIT(3)) 62130b6ab45SMarc Zyngier /* vcpu system registers loaded on physical CPU */ 62230b6ab45SMarc Zyngier #define SYSREGS_ON_CPU __vcpu_single_flag(sflags, BIT(4)) 623370531d1SReiji Watanabe /* Software step state is Active-pending */ 624370531d1SReiji Watanabe #define DBG_SS_ACTIVE_PENDING __vcpu_single_flag(sflags, BIT(5)) 625370531d1SReiji Watanabe 6260affa37fSMarc Zyngier 627b43b5dd9SDave Martin /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ 628985d3a1bSMarc Zyngier #define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) + \ 629985d3a1bSMarc Zyngier sve_ffr_offset((vcpu)->arch.sve_max_vl)) 630b43b5dd9SDave Martin 631468f3477SMarc Zyngier #define vcpu_sve_max_vq(vcpu) sve_vq_from_vl((vcpu)->arch.sve_max_vl) 632b3eb56b6SDave Martin 633e1c9c983SDave Martin #define vcpu_sve_state_size(vcpu) ({ \ 634e1c9c983SDave Martin size_t __size_ret; \ 635e1c9c983SDave Martin unsigned int __vcpu_vq; \ 636e1c9c983SDave Martin \ 637e1c9c983SDave Martin if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) { \ 638e1c9c983SDave Martin __size_ret = 0; \ 639e1c9c983SDave Martin } else { \ 640468f3477SMarc Zyngier __vcpu_vq = vcpu_sve_max_vq(vcpu); \ 641e1c9c983SDave Martin __size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq); \ 642e1c9c983SDave Martin } \ 643e1c9c983SDave Martin \ 644e1c9c983SDave Martin __size_ret; \ 645e1c9c983SDave Martin }) 646e1c9c983SDave Martin 647892fd259SMarc Zyngier #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \ 648892fd259SMarc Zyngier KVM_GUESTDBG_USE_SW_BP | \ 649892fd259SMarc Zyngier KVM_GUESTDBG_USE_HW | \ 650892fd259SMarc Zyngier KVM_GUESTDBG_SINGLESTEP) 6511765edbaSDave Martin 6521765edbaSDave Martin #define vcpu_has_sve(vcpu) (system_supports_sve() && \ 6534c0680d3SMarc Zyngier vcpu_get_flag(vcpu, GUEST_HAS_SVE)) 654fa89d31cSDave Martin 655bf4086b1SMarc Zyngier #ifdef CONFIG_ARM64_PTR_AUTH 656bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) \ 657bf4086b1SMarc Zyngier ((cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) || \ 658bf4086b1SMarc Zyngier cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) && \ 6594c0680d3SMarc Zyngier vcpu_get_flag(vcpu, GUEST_HAS_PTRAUTH)) 660bf4086b1SMarc Zyngier #else 661bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) false 662bf4086b1SMarc Zyngier #endif 663b890d75cSAmit Daniel Kachhap 664583cda1bSAlexandru Elisei #define vcpu_on_unsupported_cpu(vcpu) \ 665aff3ccd7SMarc Zyngier vcpu_get_flag(vcpu, ON_UNSUPPORTED_CPU) 666583cda1bSAlexandru Elisei 667583cda1bSAlexandru Elisei #define vcpu_set_on_unsupported_cpu(vcpu) \ 668aff3ccd7SMarc Zyngier vcpu_set_flag(vcpu, ON_UNSUPPORTED_CPU) 669583cda1bSAlexandru Elisei 670583cda1bSAlexandru Elisei #define vcpu_clear_on_unsupported_cpu(vcpu) \ 671aff3ccd7SMarc Zyngier vcpu_clear_flag(vcpu, ON_UNSUPPORTED_CPU) 672583cda1bSAlexandru Elisei 673e47c2055SMarc Zyngier #define vcpu_gp_regs(v) (&(v)->arch.ctxt.regs) 6748d404c4cSChristoffer Dall 6758d404c4cSChristoffer Dall /* 6761b422dd7SMarc Zyngier * Only use __vcpu_sys_reg/ctxt_sys_reg if you know you want the 6771b422dd7SMarc Zyngier * memory backed version of a register, and not the one most recently 6781b422dd7SMarc Zyngier * accessed by a running VCPU. For example, for userspace access or 6791b422dd7SMarc Zyngier * for system registers that are never context switched, but only 6801b422dd7SMarc Zyngier * emulated. 6818d404c4cSChristoffer Dall */ 6821b422dd7SMarc Zyngier #define __ctxt_sys_reg(c,r) (&(c)->sys_regs[(r)]) 6831b422dd7SMarc Zyngier 6841b422dd7SMarc Zyngier #define ctxt_sys_reg(c,r) (*__ctxt_sys_reg(c,r)) 6851b422dd7SMarc Zyngier 6861b422dd7SMarc Zyngier #define __vcpu_sys_reg(v,r) (ctxt_sys_reg(&(v)->arch.ctxt, (r))) 6878d404c4cSChristoffer Dall 688da6f1666SChristoffer Dall u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg); 689d47533daSChristoffer Dall void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg); 6908d404c4cSChristoffer Dall 69121c81001SMarc Zyngier static inline bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val) 69221c81001SMarc Zyngier { 69321c81001SMarc Zyngier /* 69421c81001SMarc Zyngier * *** VHE ONLY *** 69521c81001SMarc Zyngier * 69621c81001SMarc Zyngier * System registers listed in the switch are not saved on every 69721c81001SMarc Zyngier * exit from the guest but are only saved on vcpu_put. 69821c81001SMarc Zyngier * 69921c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 70021c81001SMarc Zyngier * should never be listed below, because the guest cannot modify its 70121c81001SMarc Zyngier * own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's 70221c81001SMarc Zyngier * thread when emulating cross-VCPU communication. 70321c81001SMarc Zyngier */ 70421c81001SMarc Zyngier if (!has_vhe()) 70521c81001SMarc Zyngier return false; 70621c81001SMarc Zyngier 70721c81001SMarc Zyngier switch (reg) { 70821c81001SMarc Zyngier case CSSELR_EL1: *val = read_sysreg_s(SYS_CSSELR_EL1); break; 70921c81001SMarc Zyngier case SCTLR_EL1: *val = read_sysreg_s(SYS_SCTLR_EL12); break; 71021c81001SMarc Zyngier case CPACR_EL1: *val = read_sysreg_s(SYS_CPACR_EL12); break; 71121c81001SMarc Zyngier case TTBR0_EL1: *val = read_sysreg_s(SYS_TTBR0_EL12); break; 71221c81001SMarc Zyngier case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); break; 71321c81001SMarc Zyngier case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break; 71421c81001SMarc Zyngier case ESR_EL1: *val = read_sysreg_s(SYS_ESR_EL12); break; 71521c81001SMarc Zyngier case AFSR0_EL1: *val = read_sysreg_s(SYS_AFSR0_EL12); break; 71621c81001SMarc Zyngier case AFSR1_EL1: *val = read_sysreg_s(SYS_AFSR1_EL12); break; 71721c81001SMarc Zyngier case FAR_EL1: *val = read_sysreg_s(SYS_FAR_EL12); break; 71821c81001SMarc Zyngier case MAIR_EL1: *val = read_sysreg_s(SYS_MAIR_EL12); break; 71921c81001SMarc Zyngier case VBAR_EL1: *val = read_sysreg_s(SYS_VBAR_EL12); break; 72021c81001SMarc Zyngier case CONTEXTIDR_EL1: *val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break; 72121c81001SMarc Zyngier case TPIDR_EL0: *val = read_sysreg_s(SYS_TPIDR_EL0); break; 72221c81001SMarc Zyngier case TPIDRRO_EL0: *val = read_sysreg_s(SYS_TPIDRRO_EL0); break; 72321c81001SMarc Zyngier case TPIDR_EL1: *val = read_sysreg_s(SYS_TPIDR_EL1); break; 72421c81001SMarc Zyngier case AMAIR_EL1: *val = read_sysreg_s(SYS_AMAIR_EL12); break; 72521c81001SMarc Zyngier case CNTKCTL_EL1: *val = read_sysreg_s(SYS_CNTKCTL_EL12); break; 72621c81001SMarc Zyngier case ELR_EL1: *val = read_sysreg_s(SYS_ELR_EL12); break; 72721c81001SMarc Zyngier case PAR_EL1: *val = read_sysreg_par(); break; 72821c81001SMarc Zyngier case DACR32_EL2: *val = read_sysreg_s(SYS_DACR32_EL2); break; 72921c81001SMarc Zyngier case IFSR32_EL2: *val = read_sysreg_s(SYS_IFSR32_EL2); break; 73021c81001SMarc Zyngier case DBGVCR32_EL2: *val = read_sysreg_s(SYS_DBGVCR32_EL2); break; 73121c81001SMarc Zyngier default: return false; 73221c81001SMarc Zyngier } 73321c81001SMarc Zyngier 73421c81001SMarc Zyngier return true; 73521c81001SMarc Zyngier } 73621c81001SMarc Zyngier 73721c81001SMarc Zyngier static inline bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg) 73821c81001SMarc Zyngier { 73921c81001SMarc Zyngier /* 74021c81001SMarc Zyngier * *** VHE ONLY *** 74121c81001SMarc Zyngier * 74221c81001SMarc Zyngier * System registers listed in the switch are not restored on every 74321c81001SMarc Zyngier * entry to the guest but are only restored on vcpu_load. 74421c81001SMarc Zyngier * 74521c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 74621c81001SMarc Zyngier * should never be listed below, because the MPIDR should only be set 74721c81001SMarc Zyngier * once, before running the VCPU, and never changed later. 74821c81001SMarc Zyngier */ 74921c81001SMarc Zyngier if (!has_vhe()) 75021c81001SMarc Zyngier return false; 75121c81001SMarc Zyngier 75221c81001SMarc Zyngier switch (reg) { 75321c81001SMarc Zyngier case CSSELR_EL1: write_sysreg_s(val, SYS_CSSELR_EL1); break; 75421c81001SMarc Zyngier case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break; 75521c81001SMarc Zyngier case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); break; 75621c81001SMarc Zyngier case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); break; 75721c81001SMarc Zyngier case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break; 75821c81001SMarc Zyngier case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; 75921c81001SMarc Zyngier case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); break; 76021c81001SMarc Zyngier case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); break; 76121c81001SMarc Zyngier case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); break; 76221c81001SMarc Zyngier case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); break; 76321c81001SMarc Zyngier case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); break; 76421c81001SMarc Zyngier case VBAR_EL1: write_sysreg_s(val, SYS_VBAR_EL12); break; 76521c81001SMarc Zyngier case CONTEXTIDR_EL1: write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break; 76621c81001SMarc Zyngier case TPIDR_EL0: write_sysreg_s(val, SYS_TPIDR_EL0); break; 76721c81001SMarc Zyngier case TPIDRRO_EL0: write_sysreg_s(val, SYS_TPIDRRO_EL0); break; 76821c81001SMarc Zyngier case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); break; 76921c81001SMarc Zyngier case AMAIR_EL1: write_sysreg_s(val, SYS_AMAIR_EL12); break; 77021c81001SMarc Zyngier case CNTKCTL_EL1: write_sysreg_s(val, SYS_CNTKCTL_EL12); break; 77121c81001SMarc Zyngier case ELR_EL1: write_sysreg_s(val, SYS_ELR_EL12); break; 77221c81001SMarc Zyngier case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); break; 77321c81001SMarc Zyngier case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); break; 77421c81001SMarc Zyngier case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); break; 77521c81001SMarc Zyngier case DBGVCR32_EL2: write_sysreg_s(val, SYS_DBGVCR32_EL2); break; 77621c81001SMarc Zyngier default: return false; 77721c81001SMarc Zyngier } 77821c81001SMarc Zyngier 77921c81001SMarc Zyngier return true; 78021c81001SMarc Zyngier } 78121c81001SMarc Zyngier 7824f8d6632SMarc Zyngier struct kvm_vm_stat { 7830193cc90SJing Zhang struct kvm_vm_stat_generic generic; 7844f8d6632SMarc Zyngier }; 7854f8d6632SMarc Zyngier 7864f8d6632SMarc Zyngier struct kvm_vcpu_stat { 7870193cc90SJing Zhang struct kvm_vcpu_stat_generic generic; 7888a7e75d4SSuraj Jitindar Singh u64 hvc_exit_stat; 789b19e6892SAmit Tomar u64 wfe_exit_stat; 790b19e6892SAmit Tomar u64 wfi_exit_stat; 791b19e6892SAmit Tomar u64 mmio_exit_user; 792b19e6892SAmit Tomar u64 mmio_exit_kernel; 793fe5161d2SOliver Upton u64 signal_exits; 794b19e6892SAmit Tomar u64 exits; 7954f8d6632SMarc Zyngier }; 7964f8d6632SMarc Zyngier 79708e873cbSYueHaibing void kvm_vcpu_preferred_target(struct kvm_vcpu_init *init); 7984f8d6632SMarc Zyngier unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu); 7994f8d6632SMarc Zyngier int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); 8004f8d6632SMarc Zyngier int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 8014f8d6632SMarc Zyngier int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 8026ac4a5acSMarc Zyngier 8036ac4a5acSMarc Zyngier unsigned long kvm_arm_num_sys_reg_descs(struct kvm_vcpu *vcpu); 8046ac4a5acSMarc Zyngier int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices); 8056ac4a5acSMarc Zyngier 806539aee0eSJames Morse int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 807b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 808b7b27facSDongjiu Geng 809539aee0eSJames Morse int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 810b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 8114f8d6632SMarc Zyngier 8124f8d6632SMarc Zyngier #define KVM_ARCH_WANT_MMU_NOTIFIER 8134f8d6632SMarc Zyngier 814b13216cfSChristoffer Dall void kvm_arm_halt_guest(struct kvm *kvm); 815b13216cfSChristoffer Dall void kvm_arm_resume_guest(struct kvm *kvm); 8164f8d6632SMarc Zyngier 817cc5705fbSMarc Zyngier #define vcpu_has_run_once(vcpu) !!rcu_access_pointer((vcpu)->pid) 818cc5705fbSMarc Zyngier 81940a50853SQuentin Perret #ifndef __KVM_NVHE_HYPERVISOR__ 820f50b6f6aSAndrew Scull #define kvm_call_hyp_nvhe(f, ...) \ 821f50b6f6aSAndrew Scull ({ \ 82205469831SAndrew Scull struct arm_smccc_res res; \ 82305469831SAndrew Scull \ 82405469831SAndrew Scull arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(f), \ 82505469831SAndrew Scull ##__VA_ARGS__, &res); \ 82605469831SAndrew Scull WARN_ON(res.a0 != SMCCC_RET_SUCCESS); \ 82705469831SAndrew Scull \ 82805469831SAndrew Scull res.a1; \ 829f50b6f6aSAndrew Scull }) 830f50b6f6aSAndrew Scull 83118fc7bf8SMarc Zyngier /* 83218fc7bf8SMarc Zyngier * The couple of isb() below are there to guarantee the same behaviour 83318fc7bf8SMarc Zyngier * on VHE as on !VHE, where the eret to EL1 acts as a context 83418fc7bf8SMarc Zyngier * synchronization event. 83518fc7bf8SMarc Zyngier */ 83618fc7bf8SMarc Zyngier #define kvm_call_hyp(f, ...) \ 83718fc7bf8SMarc Zyngier do { \ 83818fc7bf8SMarc Zyngier if (has_vhe()) { \ 83918fc7bf8SMarc Zyngier f(__VA_ARGS__); \ 84018fc7bf8SMarc Zyngier isb(); \ 84118fc7bf8SMarc Zyngier } else { \ 842f50b6f6aSAndrew Scull kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 84318fc7bf8SMarc Zyngier } \ 84418fc7bf8SMarc Zyngier } while(0) 84518fc7bf8SMarc Zyngier 84618fc7bf8SMarc Zyngier #define kvm_call_hyp_ret(f, ...) \ 84718fc7bf8SMarc Zyngier ({ \ 84818fc7bf8SMarc Zyngier typeof(f(__VA_ARGS__)) ret; \ 84918fc7bf8SMarc Zyngier \ 85018fc7bf8SMarc Zyngier if (has_vhe()) { \ 85118fc7bf8SMarc Zyngier ret = f(__VA_ARGS__); \ 85218fc7bf8SMarc Zyngier isb(); \ 85318fc7bf8SMarc Zyngier } else { \ 85405469831SAndrew Scull ret = kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 85518fc7bf8SMarc Zyngier } \ 85618fc7bf8SMarc Zyngier \ 85718fc7bf8SMarc Zyngier ret; \ 85818fc7bf8SMarc Zyngier }) 85940a50853SQuentin Perret #else /* __KVM_NVHE_HYPERVISOR__ */ 86040a50853SQuentin Perret #define kvm_call_hyp(f, ...) f(__VA_ARGS__) 86140a50853SQuentin Perret #define kvm_call_hyp_ret(f, ...) f(__VA_ARGS__) 86240a50853SQuentin Perret #define kvm_call_hyp_nvhe(f, ...) f(__VA_ARGS__) 86340a50853SQuentin Perret #endif /* __KVM_NVHE_HYPERVISOR__ */ 86422b39ca3SMarc Zyngier 865cf5d3188SChristoffer Dall void force_vm_exit(const cpumask_t *mask); 8664f8d6632SMarc Zyngier 86774cc7e0cSTianjia Zhang int handle_exit(struct kvm_vcpu *vcpu, int exception_index); 86874cc7e0cSTianjia Zhang void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index); 8694f8d6632SMarc Zyngier 8706ac4a5acSMarc Zyngier int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu); 8716ac4a5acSMarc Zyngier int kvm_handle_cp14_32(struct kvm_vcpu *vcpu); 8726ac4a5acSMarc Zyngier int kvm_handle_cp14_64(struct kvm_vcpu *vcpu); 8736ac4a5acSMarc Zyngier int kvm_handle_cp15_32(struct kvm_vcpu *vcpu); 8746ac4a5acSMarc Zyngier int kvm_handle_cp15_64(struct kvm_vcpu *vcpu); 8756ac4a5acSMarc Zyngier int kvm_handle_sys_reg(struct kvm_vcpu *vcpu); 8769369bc5cSOliver Upton int kvm_handle_cp10_id(struct kvm_vcpu *vcpu); 8776ac4a5acSMarc Zyngier 8786ac4a5acSMarc Zyngier void kvm_reset_sys_regs(struct kvm_vcpu *vcpu); 8796ac4a5acSMarc Zyngier 880f1f0c0cfSAlexandru Elisei int kvm_sys_reg_table_init(void); 8816ac4a5acSMarc Zyngier 8820e20f5e2SMarc Zyngier /* MMIO helpers */ 8830e20f5e2SMarc Zyngier void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data); 8840e20f5e2SMarc Zyngier unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len); 8850e20f5e2SMarc Zyngier 88674cc7e0cSTianjia Zhang int kvm_handle_mmio_return(struct kvm_vcpu *vcpu); 88774cc7e0cSTianjia Zhang int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa); 8880e20f5e2SMarc Zyngier 889e1bfc245SSean Christopherson /* 890e1bfc245SSean Christopherson * Returns true if a Performance Monitoring Interrupt (PMI), a.k.a. perf event, 891e1bfc245SSean Christopherson * arrived in guest context. For arm64, any event that arrives while a vCPU is 892e1bfc245SSean Christopherson * loaded is considered to be "in guest". 893e1bfc245SSean Christopherson */ 894e1bfc245SSean Christopherson static inline bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu) 895e1bfc245SSean Christopherson { 896e1bfc245SSean Christopherson return IS_ENABLED(CONFIG_GUEST_PERF_EVENTS) && !!vcpu; 897e1bfc245SSean Christopherson } 898e1bfc245SSean Christopherson 899b48c1a45SSteven Price long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu); 9008564d637SSteven Price gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu); 9018564d637SSteven Price void kvm_update_stolen_time(struct kvm_vcpu *vcpu); 9028564d637SSteven Price 903004a0124SAndrew Jones bool kvm_arm_pvtime_supported(void); 90458772e9aSSteven Price int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu, 90558772e9aSSteven Price struct kvm_device_attr *attr); 90658772e9aSSteven Price int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu, 90758772e9aSSteven Price struct kvm_device_attr *attr); 90858772e9aSSteven Price int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu, 90958772e9aSSteven Price struct kvm_device_attr *attr); 91058772e9aSSteven Price 911f8051e96SShameer Kolothum extern unsigned int kvm_arm_vmid_bits; 91241783839SShameer Kolothum int kvm_arm_vmid_alloc_init(void); 91341783839SShameer Kolothum void kvm_arm_vmid_alloc_free(void); 91441783839SShameer Kolothum void kvm_arm_vmid_update(struct kvm_vmid *kvm_vmid); 915100b4f09SShameer Kolothum void kvm_arm_vmid_clear_active(void); 91641783839SShameer Kolothum 9178564d637SSteven Price static inline void kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch *vcpu_arch) 9188564d637SSteven Price { 919*cecafc0aSYu Zhang vcpu_arch->steal.base = INVALID_GPA; 9208564d637SSteven Price } 9218564d637SSteven Price 9228564d637SSteven Price static inline bool kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch *vcpu_arch) 9238564d637SSteven Price { 924*cecafc0aSYu Zhang return (vcpu_arch->steal.base != INVALID_GPA); 9258564d637SSteven Price } 926b48c1a45SSteven Price 927b7b27facSDongjiu Geng void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome); 928b7b27facSDongjiu Geng 9294429fc64SAndre Przywara struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr); 9304429fc64SAndre Przywara 93114ef9d04SMarc Zyngier DECLARE_KVM_HYP_PER_CPU(struct kvm_host_data, kvm_host_data); 9324464e210SChristoffer Dall 9331e0cf16cSMarc Zyngier static inline void kvm_init_host_cpu_context(struct kvm_cpu_context *cpu_ctxt) 93432f13955SMarc Zyngier { 93532f13955SMarc Zyngier /* The host's MPIDR is immutable, so let's set it up at boot time */ 93671071acfSMarc Zyngier ctxt_sys_reg(cpu_ctxt, MPIDR_EL1) = read_cpuid_mpidr(); 93732f13955SMarc Zyngier } 93832f13955SMarc Zyngier 9395bdf3437SJames Morse static inline bool kvm_system_needs_idmapped_vectors(void) 9405bdf3437SJames Morse { 9415bdf3437SJames Morse return cpus_have_const_cap(ARM64_SPECTRE_V3A); 9425bdf3437SJames Morse } 9435bdf3437SJames Morse 944384b40caSMark Rutland void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu); 945384b40caSMark Rutland 9460865e636SRadim Krčmář static inline void kvm_arch_hardware_unsetup(void) {} 9470865e636SRadim Krčmář static inline void kvm_arch_sync_events(struct kvm *kvm) {} 9480865e636SRadim Krčmář static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 9490865e636SRadim Krčmář 95056c7f5e7SAlex Bennée void kvm_arm_init_debug(void); 951263d6287SAlexandru Elisei void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu); 95256c7f5e7SAlex Bennée void kvm_arm_setup_debug(struct kvm_vcpu *vcpu); 95356c7f5e7SAlex Bennée void kvm_arm_clear_debug(struct kvm_vcpu *vcpu); 95484e690bfSAlex Bennée void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu); 9557dabf02fSOliver Upton 9567dabf02fSOliver Upton #define kvm_vcpu_os_lock_enabled(vcpu) \ 9577dabf02fSOliver Upton (!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & SYS_OSLSR_OSLK)) 9587dabf02fSOliver Upton 959bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, 960bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 961bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, 962bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 963bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu, 964bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 96556c7f5e7SAlex Bennée 966f0376edbSSteven Price long kvm_vm_ioctl_mte_copy_tags(struct kvm *kvm, 967f0376edbSSteven Price struct kvm_arm_copy_mte_tags *copy_tags); 968f0376edbSSteven Price 969e6b673b7SDave Martin /* Guest/host FPSIMD coordination helpers */ 970e6b673b7SDave Martin int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu); 971e6b673b7SDave Martin void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu); 972af9a0e21SMarc Zyngier void kvm_arch_vcpu_ctxflush_fp(struct kvm_vcpu *vcpu); 973e6b673b7SDave Martin void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu); 974e6b673b7SDave Martin void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu); 97552b28657SQuentin Perret void kvm_vcpu_unshare_task_fp(struct kvm_vcpu *vcpu); 976e6b673b7SDave Martin 977eb41238cSAndrew Murray static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr) 978eb41238cSAndrew Murray { 979435e53fbSAndrew Murray return (!has_vhe() && attr->exclude_host); 980eb41238cSAndrew Murray } 981eb41238cSAndrew Murray 982d2602bb4SSuzuki K Poulose /* Flags for host debug state */ 983d2602bb4SSuzuki K Poulose void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu); 984d2602bb4SSuzuki K Poulose void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu); 985d2602bb4SSuzuki K Poulose 986052f064dSMarc Zyngier #ifdef CONFIG_KVM 987eb41238cSAndrew Murray void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr); 988eb41238cSAndrew Murray void kvm_clr_pmu_events(u32 clr); 989eb41238cSAndrew Murray #else 990eb41238cSAndrew Murray static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {} 991eb41238cSAndrew Murray static inline void kvm_clr_pmu_events(u32 clr) {} 992e6b673b7SDave Martin #endif 99317eed27bSDave Martin 99413aeb9b4SDavid Brazdil void kvm_vcpu_load_sysregs_vhe(struct kvm_vcpu *vcpu); 99513aeb9b4SDavid Brazdil void kvm_vcpu_put_sysregs_vhe(struct kvm_vcpu *vcpu); 996bc192ceeSChristoffer Dall 997b130a8f7SMarc Zyngier int kvm_set_ipa_limit(void); 9980f62f0e9SSuzuki K Poulose 999d1e5b0e9SMarc Orr #define __KVM_HAVE_ARCH_VM_ALLOC 1000d1e5b0e9SMarc Orr struct kvm *kvm_arch_alloc_vm(void); 1001d1e5b0e9SMarc Orr 10022ea7f655SFuad Tabba static inline bool kvm_vm_is_protected(struct kvm *kvm) 10032ea7f655SFuad Tabba { 10042ea7f655SFuad Tabba return false; 10052ea7f655SFuad Tabba } 10062ea7f655SFuad Tabba 10072a0c3433SFuad Tabba void kvm_init_protected_traps(struct kvm_vcpu *vcpu); 10082a0c3433SFuad Tabba 100992e68b2bSDave Martin int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature); 10109033bba4SDave Martin bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu); 10119033bba4SDave Martin 10124c0680d3SMarc Zyngier #define kvm_arm_vcpu_sve_finalized(vcpu) vcpu_get_flag(vcpu, VCPU_SVE_FINALIZED) 10137dd32a0dSDave Martin 101406394531SMarc Zyngier #define kvm_has_mte(kvm) \ 101506394531SMarc Zyngier (system_supports_mte() && \ 101606394531SMarc Zyngier test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &(kvm)->arch.flags)) 101714bda7a9SMarc Zyngier 1018f3c6efc7SOliver Upton #define kvm_supports_32bit_el0() \ 1019f3c6efc7SOliver Upton (system_supports_32bit_el0() && \ 1020f3c6efc7SOliver Upton !static_branch_unlikely(&arm64_mismatched_32bit_el0)) 1021f3c6efc7SOliver Upton 1022a8e190cdSArd Biesheuvel int kvm_trng_call(struct kvm_vcpu *vcpu); 1023f320bc74SQuentin Perret #ifdef CONFIG_KVM 1024f320bc74SQuentin Perret extern phys_addr_t hyp_mem_base; 1025f320bc74SQuentin Perret extern phys_addr_t hyp_mem_size; 1026f320bc74SQuentin Perret void __init kvm_hyp_reserve(void); 1027f320bc74SQuentin Perret #else 1028f320bc74SQuentin Perret static inline void kvm_hyp_reserve(void) { } 1029f320bc74SQuentin Perret #endif 1030a8e190cdSArd Biesheuvel 10311e579429SOliver Upton void kvm_arm_vcpu_power_off(struct kvm_vcpu *vcpu); 1032b171f9bbSOliver Upton bool kvm_arm_vcpu_stopped(struct kvm_vcpu *vcpu); 10331e579429SOliver Upton 10344f8d6632SMarc Zyngier #endif /* __ARM64_KVM_HOST_H__ */ 1035