14f8d6632SMarc Zyngier /* 24f8d6632SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 34f8d6632SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 44f8d6632SMarc Zyngier * 54f8d6632SMarc Zyngier * Derived from arch/arm/include/asm/kvm_host.h: 64f8d6632SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 74f8d6632SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 84f8d6632SMarc Zyngier * 94f8d6632SMarc Zyngier * This program is free software; you can redistribute it and/or modify 104f8d6632SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 114f8d6632SMarc Zyngier * published by the Free Software Foundation. 124f8d6632SMarc Zyngier * 134f8d6632SMarc Zyngier * This program is distributed in the hope that it will be useful, 144f8d6632SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 154f8d6632SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 164f8d6632SMarc Zyngier * GNU General Public License for more details. 174f8d6632SMarc Zyngier * 184f8d6632SMarc Zyngier * You should have received a copy of the GNU General Public License 194f8d6632SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 204f8d6632SMarc Zyngier */ 214f8d6632SMarc Zyngier 224f8d6632SMarc Zyngier #ifndef __ARM64_KVM_HOST_H__ 234f8d6632SMarc Zyngier #define __ARM64_KVM_HOST_H__ 244f8d6632SMarc Zyngier 2565647300SPaolo Bonzini #include <linux/types.h> 2665647300SPaolo Bonzini #include <linux/kvm_types.h> 2763a1e1c9SMark Rutland #include <asm/cpufeature.h> 284f5abad9SJames Morse #include <asm/daifflags.h> 2917eed27bSDave Martin #include <asm/fpsimd.h> 304f8d6632SMarc Zyngier #include <asm/kvm.h> 313a3604bcSMarc Zyngier #include <asm/kvm_asm.h> 324f8d6632SMarc Zyngier #include <asm/kvm_mmio.h> 334f8d6632SMarc Zyngier 34c1426e4cSEric Auger #define __KVM_HAVE_ARCH_INTC_INITIALIZED 35c1426e4cSEric Auger 36955a3fc6SLinu Cherian #define KVM_USER_MEM_SLOTS 512 37920552b2SDavid Hildenbrand #define KVM_HALT_POLL_NS_DEFAULT 500000 384f8d6632SMarc Zyngier 394f8d6632SMarc Zyngier #include <kvm/arm_vgic.h> 404f8d6632SMarc Zyngier #include <kvm/arm_arch_timer.h> 4104fe4726SShannon Zhao #include <kvm/arm_pmu.h> 424f8d6632SMarc Zyngier 43ef748917SMing Lei #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS 44ef748917SMing Lei 45808e7381SShannon Zhao #define KVM_VCPU_MAX_FEATURES 4 464f8d6632SMarc Zyngier 477b244e2bSAndrew Jones #define KVM_REQ_SLEEP \ 482387149eSAndrew Jones KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 49325f9c64SAndrew Jones #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) 50b13216cfSChristoffer Dall 5161bbe380SChristoffer Dall DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 5261bbe380SChristoffer Dall 536951e48bSWill Deacon int __attribute_const__ kvm_target_cpu(void); 544f8d6632SMarc Zyngier int kvm_reset_vcpu(struct kvm_vcpu *vcpu); 55b46f01ceSAndre Przywara int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext); 56c612505fSJames Morse void __extended_idmap_trampoline(phys_addr_t boot_pgd, phys_addr_t idmap_start); 574f8d6632SMarc Zyngier 584f8d6632SMarc Zyngier struct kvm_arch { 594f8d6632SMarc Zyngier /* The VMID generation used for the virt. memory system */ 604f8d6632SMarc Zyngier u64 vmid_gen; 614f8d6632SMarc Zyngier u32 vmid; 624f8d6632SMarc Zyngier 634f8d6632SMarc Zyngier /* 1-level 2nd stage table and lock */ 644f8d6632SMarc Zyngier spinlock_t pgd_lock; 654f8d6632SMarc Zyngier pgd_t *pgd; 664f8d6632SMarc Zyngier 674f8d6632SMarc Zyngier /* VTTBR value associated with above pgd and vmid */ 684f8d6632SMarc Zyngier u64 vttbr; 694f8d6632SMarc Zyngier 7094d0e598SMarc Zyngier /* The last vcpu id that ran on each physical CPU */ 7194d0e598SMarc Zyngier int __percpu *last_vcpu_ran; 7294d0e598SMarc Zyngier 733caa2d8cSAndre Przywara /* The maximum number of vCPUs depends on the used GIC model */ 743caa2d8cSAndre Przywara int max_vcpus; 753caa2d8cSAndre Przywara 764f8d6632SMarc Zyngier /* Interrupt controller */ 774f8d6632SMarc Zyngier struct vgic_dist vgic; 784f8d6632SMarc Zyngier }; 794f8d6632SMarc Zyngier 804f8d6632SMarc Zyngier #define KVM_NR_MEM_OBJS 40 814f8d6632SMarc Zyngier 824f8d6632SMarc Zyngier /* 834f8d6632SMarc Zyngier * We don't want allocation failures within the mmu code, so we preallocate 844f8d6632SMarc Zyngier * enough memory for a single page fault in a cache. 854f8d6632SMarc Zyngier */ 864f8d6632SMarc Zyngier struct kvm_mmu_memory_cache { 874f8d6632SMarc Zyngier int nobjs; 884f8d6632SMarc Zyngier void *objects[KVM_NR_MEM_OBJS]; 894f8d6632SMarc Zyngier }; 904f8d6632SMarc Zyngier 914f8d6632SMarc Zyngier struct kvm_vcpu_fault_info { 924f8d6632SMarc Zyngier u32 esr_el2; /* Hyp Syndrom Register */ 934f8d6632SMarc Zyngier u64 far_el2; /* Hyp Fault Address Register */ 944f8d6632SMarc Zyngier u64 hpfar_el2; /* Hyp IPA Fault Address Register */ 950067df41SJames Morse u64 disr_el1; /* Deferred [SError] Status Register */ 964f8d6632SMarc Zyngier }; 974f8d6632SMarc Zyngier 989d8415d6SMarc Zyngier /* 999d8415d6SMarc Zyngier * 0 is reserved as an invalid value. 1009d8415d6SMarc Zyngier * Order should be kept in sync with the save/restore code. 1019d8415d6SMarc Zyngier */ 1029d8415d6SMarc Zyngier enum vcpu_sysreg { 1039d8415d6SMarc Zyngier __INVALID_SYSREG__, 1049d8415d6SMarc Zyngier MPIDR_EL1, /* MultiProcessor Affinity Register */ 1059d8415d6SMarc Zyngier CSSELR_EL1, /* Cache Size Selection Register */ 1069d8415d6SMarc Zyngier SCTLR_EL1, /* System Control Register */ 1079d8415d6SMarc Zyngier ACTLR_EL1, /* Auxiliary Control Register */ 1089d8415d6SMarc Zyngier CPACR_EL1, /* Coprocessor Access Control */ 1099d8415d6SMarc Zyngier TTBR0_EL1, /* Translation Table Base Register 0 */ 1109d8415d6SMarc Zyngier TTBR1_EL1, /* Translation Table Base Register 1 */ 1119d8415d6SMarc Zyngier TCR_EL1, /* Translation Control Register */ 1129d8415d6SMarc Zyngier ESR_EL1, /* Exception Syndrome Register */ 113ef769e32SAdam Buchbinder AFSR0_EL1, /* Auxiliary Fault Status Register 0 */ 114ef769e32SAdam Buchbinder AFSR1_EL1, /* Auxiliary Fault Status Register 1 */ 1159d8415d6SMarc Zyngier FAR_EL1, /* Fault Address Register */ 1169d8415d6SMarc Zyngier MAIR_EL1, /* Memory Attribute Indirection Register */ 1179d8415d6SMarc Zyngier VBAR_EL1, /* Vector Base Address Register */ 1189d8415d6SMarc Zyngier CONTEXTIDR_EL1, /* Context ID Register */ 1199d8415d6SMarc Zyngier TPIDR_EL0, /* Thread ID, User R/W */ 1209d8415d6SMarc Zyngier TPIDRRO_EL0, /* Thread ID, User R/O */ 1219d8415d6SMarc Zyngier TPIDR_EL1, /* Thread ID, Privileged */ 1229d8415d6SMarc Zyngier AMAIR_EL1, /* Aux Memory Attribute Indirection Register */ 1239d8415d6SMarc Zyngier CNTKCTL_EL1, /* Timer Control Register (EL1) */ 1249d8415d6SMarc Zyngier PAR_EL1, /* Physical Address Register */ 1259d8415d6SMarc Zyngier MDSCR_EL1, /* Monitor Debug System Control Register */ 1269d8415d6SMarc Zyngier MDCCINT_EL1, /* Monitor Debug Comms Channel Interrupt Enable Reg */ 127c773ae2bSJames Morse DISR_EL1, /* Deferred Interrupt Status Register */ 1289d8415d6SMarc Zyngier 129ab946834SShannon Zhao /* Performance Monitors Registers */ 130ab946834SShannon Zhao PMCR_EL0, /* Control Register */ 1313965c3ceSShannon Zhao PMSELR_EL0, /* Event Counter Selection Register */ 132051ff581SShannon Zhao PMEVCNTR0_EL0, /* Event Counter Register (0-30) */ 133051ff581SShannon Zhao PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30, 134051ff581SShannon Zhao PMCCNTR_EL0, /* Cycle Counter Register */ 1359feb21acSShannon Zhao PMEVTYPER0_EL0, /* Event Type Register (0-30) */ 1369feb21acSShannon Zhao PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30, 1379feb21acSShannon Zhao PMCCFILTR_EL0, /* Cycle Count Filter Register */ 13896b0eebcSShannon Zhao PMCNTENSET_EL0, /* Count Enable Set Register */ 1399db52c78SShannon Zhao PMINTENSET_EL1, /* Interrupt Enable Set Register */ 14076d883c4SShannon Zhao PMOVSSET_EL0, /* Overflow Flag Status Set Register */ 1417a0adc70SShannon Zhao PMSWINC_EL0, /* Software Increment Register */ 142d692b8adSShannon Zhao PMUSERENR_EL0, /* User Enable Register */ 143ab946834SShannon Zhao 1449d8415d6SMarc Zyngier /* 32bit specific registers. Keep them at the end of the range */ 1459d8415d6SMarc Zyngier DACR32_EL2, /* Domain Access Control Register */ 1469d8415d6SMarc Zyngier IFSR32_EL2, /* Instruction Fault Status Register */ 1479d8415d6SMarc Zyngier FPEXC32_EL2, /* Floating-Point Exception Control Register */ 1489d8415d6SMarc Zyngier DBGVCR32_EL2, /* Debug Vector Catch Register */ 1499d8415d6SMarc Zyngier 1509d8415d6SMarc Zyngier NR_SYS_REGS /* Nothing after this line! */ 1519d8415d6SMarc Zyngier }; 1529d8415d6SMarc Zyngier 1539d8415d6SMarc Zyngier /* 32bit mapping */ 1549d8415d6SMarc Zyngier #define c0_MPIDR (MPIDR_EL1 * 2) /* MultiProcessor ID Register */ 1559d8415d6SMarc Zyngier #define c0_CSSELR (CSSELR_EL1 * 2)/* Cache Size Selection Register */ 1569d8415d6SMarc Zyngier #define c1_SCTLR (SCTLR_EL1 * 2) /* System Control Register */ 1579d8415d6SMarc Zyngier #define c1_ACTLR (ACTLR_EL1 * 2) /* Auxiliary Control Register */ 1589d8415d6SMarc Zyngier #define c1_CPACR (CPACR_EL1 * 2) /* Coprocessor Access Control */ 1599d8415d6SMarc Zyngier #define c2_TTBR0 (TTBR0_EL1 * 2) /* Translation Table Base Register 0 */ 1609d8415d6SMarc Zyngier #define c2_TTBR0_high (c2_TTBR0 + 1) /* TTBR0 top 32 bits */ 1619d8415d6SMarc Zyngier #define c2_TTBR1 (TTBR1_EL1 * 2) /* Translation Table Base Register 1 */ 1629d8415d6SMarc Zyngier #define c2_TTBR1_high (c2_TTBR1 + 1) /* TTBR1 top 32 bits */ 1639d8415d6SMarc Zyngier #define c2_TTBCR (TCR_EL1 * 2) /* Translation Table Base Control R. */ 1649d8415d6SMarc Zyngier #define c3_DACR (DACR32_EL2 * 2)/* Domain Access Control Register */ 1659d8415d6SMarc Zyngier #define c5_DFSR (ESR_EL1 * 2) /* Data Fault Status Register */ 1669d8415d6SMarc Zyngier #define c5_IFSR (IFSR32_EL2 * 2)/* Instruction Fault Status Register */ 1679d8415d6SMarc Zyngier #define c5_ADFSR (AFSR0_EL1 * 2) /* Auxiliary Data Fault Status R */ 1689d8415d6SMarc Zyngier #define c5_AIFSR (AFSR1_EL1 * 2) /* Auxiliary Instr Fault Status R */ 1699d8415d6SMarc Zyngier #define c6_DFAR (FAR_EL1 * 2) /* Data Fault Address Register */ 1709d8415d6SMarc Zyngier #define c6_IFAR (c6_DFAR + 1) /* Instruction Fault Address Register */ 1719d8415d6SMarc Zyngier #define c7_PAR (PAR_EL1 * 2) /* Physical Address Register */ 1729d8415d6SMarc Zyngier #define c7_PAR_high (c7_PAR + 1) /* PAR top 32 bits */ 1739d8415d6SMarc Zyngier #define c10_PRRR (MAIR_EL1 * 2) /* Primary Region Remap Register */ 1749d8415d6SMarc Zyngier #define c10_NMRR (c10_PRRR + 1) /* Normal Memory Remap Register */ 1759d8415d6SMarc Zyngier #define c12_VBAR (VBAR_EL1 * 2) /* Vector Base Address Register */ 1769d8415d6SMarc Zyngier #define c13_CID (CONTEXTIDR_EL1 * 2) /* Context ID Register */ 1779d8415d6SMarc Zyngier #define c13_TID_URW (TPIDR_EL0 * 2) /* Thread ID, User R/W */ 1789d8415d6SMarc Zyngier #define c13_TID_URO (TPIDRRO_EL0 * 2)/* Thread ID, User R/O */ 1799d8415d6SMarc Zyngier #define c13_TID_PRIV (TPIDR_EL1 * 2) /* Thread ID, Privileged */ 1809d8415d6SMarc Zyngier #define c10_AMAIR0 (AMAIR_EL1 * 2) /* Aux Memory Attr Indirection Reg */ 1819d8415d6SMarc Zyngier #define c10_AMAIR1 (c10_AMAIR0 + 1)/* Aux Memory Attr Indirection Reg */ 1829d8415d6SMarc Zyngier #define c14_CNTKCTL (CNTKCTL_EL1 * 2) /* Timer Control Register (PL1) */ 1839d8415d6SMarc Zyngier 1849d8415d6SMarc Zyngier #define cp14_DBGDSCRext (MDSCR_EL1 * 2) 1859d8415d6SMarc Zyngier #define cp14_DBGBCR0 (DBGBCR0_EL1 * 2) 1869d8415d6SMarc Zyngier #define cp14_DBGBVR0 (DBGBVR0_EL1 * 2) 1879d8415d6SMarc Zyngier #define cp14_DBGBXVR0 (cp14_DBGBVR0 + 1) 1889d8415d6SMarc Zyngier #define cp14_DBGWCR0 (DBGWCR0_EL1 * 2) 1899d8415d6SMarc Zyngier #define cp14_DBGWVR0 (DBGWVR0_EL1 * 2) 1909d8415d6SMarc Zyngier #define cp14_DBGDCCINT (MDCCINT_EL1 * 2) 1919d8415d6SMarc Zyngier 1929d8415d6SMarc Zyngier #define NR_COPRO_REGS (NR_SYS_REGS * 2) 1939d8415d6SMarc Zyngier 1944f8d6632SMarc Zyngier struct kvm_cpu_context { 1954f8d6632SMarc Zyngier struct kvm_regs gp_regs; 19640033a61SMarc Zyngier union { 1974f8d6632SMarc Zyngier u64 sys_regs[NR_SYS_REGS]; 19872564016SMarc Zyngier u32 copro[NR_COPRO_REGS]; 19940033a61SMarc Zyngier }; 200c97e166eSJames Morse 201c97e166eSJames Morse struct kvm_vcpu *__hyp_running_vcpu; 2024f8d6632SMarc Zyngier }; 2034f8d6632SMarc Zyngier 2044f8d6632SMarc Zyngier typedef struct kvm_cpu_context kvm_cpu_context_t; 2054f8d6632SMarc Zyngier 2064f8d6632SMarc Zyngier struct kvm_vcpu_arch { 2074f8d6632SMarc Zyngier struct kvm_cpu_context ctxt; 2084f8d6632SMarc Zyngier 2094f8d6632SMarc Zyngier /* HYP configuration */ 2104f8d6632SMarc Zyngier u64 hcr_el2; 21156c7f5e7SAlex Bennée u32 mdcr_el2; 2124f8d6632SMarc Zyngier 2134f8d6632SMarc Zyngier /* Exception Information */ 2144f8d6632SMarc Zyngier struct kvm_vcpu_fault_info fault; 2154f8d6632SMarc Zyngier 21684e690bfSAlex Bennée /* Guest debug state */ 2170c557ed4SMarc Zyngier u64 debug_flags; 2180c557ed4SMarc Zyngier 21984e690bfSAlex Bennée /* 22084e690bfSAlex Bennée * We maintain more than a single set of debug registers to support 22184e690bfSAlex Bennée * debugging the guest from the host and to maintain separate host and 22284e690bfSAlex Bennée * guest state during world switches. vcpu_debug_state are the debug 22384e690bfSAlex Bennée * registers of the vcpu as the guest sees them. host_debug_state are 224834bf887SAlex Bennée * the host registers which are saved and restored during 225834bf887SAlex Bennée * world switches. external_debug_state contains the debug 226834bf887SAlex Bennée * values we want to debug the guest. This is set via the 227834bf887SAlex Bennée * KVM_SET_GUEST_DEBUG ioctl. 22884e690bfSAlex Bennée * 22984e690bfSAlex Bennée * debug_ptr points to the set of debug registers that should be loaded 23084e690bfSAlex Bennée * onto the hardware when running the guest. 23184e690bfSAlex Bennée */ 23284e690bfSAlex Bennée struct kvm_guest_debug_arch *debug_ptr; 23384e690bfSAlex Bennée struct kvm_guest_debug_arch vcpu_debug_state; 234834bf887SAlex Bennée struct kvm_guest_debug_arch external_debug_state; 23584e690bfSAlex Bennée 2364f8d6632SMarc Zyngier /* Pointer to host CPU context */ 2374f8d6632SMarc Zyngier kvm_cpu_context_t *host_cpu_context; 238f85279b4SWill Deacon struct { 239f85279b4SWill Deacon /* {Break,watch}point registers */ 240f85279b4SWill Deacon struct kvm_guest_debug_arch regs; 241f85279b4SWill Deacon /* Statistical profiling extension */ 242f85279b4SWill Deacon u64 pmscr_el1; 243f85279b4SWill Deacon } host_debug_state; 2444f8d6632SMarc Zyngier 2454f8d6632SMarc Zyngier /* VGIC state */ 2464f8d6632SMarc Zyngier struct vgic_cpu vgic_cpu; 2474f8d6632SMarc Zyngier struct arch_timer_cpu timer_cpu; 24804fe4726SShannon Zhao struct kvm_pmu pmu; 2494f8d6632SMarc Zyngier 2504f8d6632SMarc Zyngier /* 2514f8d6632SMarc Zyngier * Anything that is not used directly from assembly code goes 2524f8d6632SMarc Zyngier * here. 2534f8d6632SMarc Zyngier */ 2544f8d6632SMarc Zyngier 255337b99bfSAlex Bennée /* 256337b99bfSAlex Bennée * Guest registers we preserve during guest debugging. 257337b99bfSAlex Bennée * 258337b99bfSAlex Bennée * These shadow registers are updated by the kvm_handle_sys_reg 259337b99bfSAlex Bennée * trap handler if the guest accesses or updates them while we 260337b99bfSAlex Bennée * are using guest debug. 261337b99bfSAlex Bennée */ 262337b99bfSAlex Bennée struct { 263337b99bfSAlex Bennée u32 mdscr_el1; 264337b99bfSAlex Bennée } guest_debug_preserved; 265337b99bfSAlex Bennée 2663781528eSEric Auger /* vcpu power-off state */ 2673781528eSEric Auger bool power_off; 2684f8d6632SMarc Zyngier 2693b92830aSEric Auger /* Don't run the guest (internal implementation need) */ 2703b92830aSEric Auger bool pause; 2713b92830aSEric Auger 2724f8d6632SMarc Zyngier /* IO related fields */ 2734f8d6632SMarc Zyngier struct kvm_decode mmio_decode; 2744f8d6632SMarc Zyngier 2754f8d6632SMarc Zyngier /* Cache some mmu pages needed inside spinlock regions */ 2764f8d6632SMarc Zyngier struct kvm_mmu_memory_cache mmu_page_cache; 2774f8d6632SMarc Zyngier 2784f8d6632SMarc Zyngier /* Target CPU and feature flags */ 2796c8c0c4dSChen Gang int target; 2804f8d6632SMarc Zyngier DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES); 2814f8d6632SMarc Zyngier 2824f8d6632SMarc Zyngier /* Detect first run of a vcpu */ 2834f8d6632SMarc Zyngier bool has_run_once; 2844715c14bSJames Morse 2854715c14bSJames Morse /* Virtual SError ESR to restore when HCR_EL2.VSE is set */ 2864715c14bSJames Morse u64 vsesr_el2; 2874f8d6632SMarc Zyngier }; 2884f8d6632SMarc Zyngier 2894f8d6632SMarc Zyngier #define vcpu_gp_regs(v) (&(v)->arch.ctxt.gp_regs) 2904f8d6632SMarc Zyngier #define vcpu_sys_reg(v,r) ((v)->arch.ctxt.sys_regs[(r)]) 29172564016SMarc Zyngier /* 29272564016SMarc Zyngier * CP14 and CP15 live in the same array, as they are backed by the 29372564016SMarc Zyngier * same system registers. 29472564016SMarc Zyngier */ 29572564016SMarc Zyngier #define vcpu_cp14(v,r) ((v)->arch.ctxt.copro[(r)]) 29672564016SMarc Zyngier #define vcpu_cp15(v,r) ((v)->arch.ctxt.copro[(r)]) 2974f8d6632SMarc Zyngier 298f0a3eaffSVictor Kamensky #ifdef CONFIG_CPU_BIG_ENDIAN 299dedf97e8SMarc Zyngier #define vcpu_cp15_64_high(v,r) vcpu_cp15((v),(r)) 300dedf97e8SMarc Zyngier #define vcpu_cp15_64_low(v,r) vcpu_cp15((v),(r) + 1) 301f0a3eaffSVictor Kamensky #else 302dedf97e8SMarc Zyngier #define vcpu_cp15_64_high(v,r) vcpu_cp15((v),(r) + 1) 303dedf97e8SMarc Zyngier #define vcpu_cp15_64_low(v,r) vcpu_cp15((v),(r)) 304f0a3eaffSVictor Kamensky #endif 305f0a3eaffSVictor Kamensky 3064f8d6632SMarc Zyngier struct kvm_vm_stat { 3078a7e75d4SSuraj Jitindar Singh ulong remote_tlb_flush; 3084f8d6632SMarc Zyngier }; 3094f8d6632SMarc Zyngier 3104f8d6632SMarc Zyngier struct kvm_vcpu_stat { 3118a7e75d4SSuraj Jitindar Singh u64 halt_successful_poll; 3128a7e75d4SSuraj Jitindar Singh u64 halt_attempted_poll; 3138a7e75d4SSuraj Jitindar Singh u64 halt_poll_invalid; 3148a7e75d4SSuraj Jitindar Singh u64 halt_wakeup; 3158a7e75d4SSuraj Jitindar Singh u64 hvc_exit_stat; 316b19e6892SAmit Tomar u64 wfe_exit_stat; 317b19e6892SAmit Tomar u64 wfi_exit_stat; 318b19e6892SAmit Tomar u64 mmio_exit_user; 319b19e6892SAmit Tomar u64 mmio_exit_kernel; 320b19e6892SAmit Tomar u64 exits; 3214f8d6632SMarc Zyngier }; 3224f8d6632SMarc Zyngier 323473bdc0eSAnup Patel int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init); 3244f8d6632SMarc Zyngier unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu); 3254f8d6632SMarc Zyngier int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); 3264f8d6632SMarc Zyngier int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 3274f8d6632SMarc Zyngier int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 3284f8d6632SMarc Zyngier 3294f8d6632SMarc Zyngier #define KVM_ARCH_WANT_MMU_NOTIFIER 3304f8d6632SMarc Zyngier int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 3314f8d6632SMarc Zyngier int kvm_unmap_hva_range(struct kvm *kvm, 3324f8d6632SMarc Zyngier unsigned long start, unsigned long end); 3334f8d6632SMarc Zyngier void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 33435307b9aSMarc Zyngier int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 33535307b9aSMarc Zyngier int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 3364f8d6632SMarc Zyngier 3374f8d6632SMarc Zyngier struct kvm_vcpu *kvm_arm_get_running_vcpu(void); 3384000be42SWill Deacon struct kvm_vcpu * __percpu *kvm_get_running_vcpus(void); 339b13216cfSChristoffer Dall void kvm_arm_halt_guest(struct kvm *kvm); 340b13216cfSChristoffer Dall void kvm_arm_resume_guest(struct kvm *kvm); 3414f8d6632SMarc Zyngier 342a0bf9776SArd Biesheuvel u64 __kvm_call_hyp(void *hypfn, ...); 34322b39ca3SMarc Zyngier #define kvm_call_hyp(f, ...) __kvm_call_hyp(kvm_ksym_ref(f), ##__VA_ARGS__) 34422b39ca3SMarc Zyngier 345cf5d3188SChristoffer Dall void force_vm_exit(const cpumask_t *mask); 3468199ed0eSMario Smarduch void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot); 3474f8d6632SMarc Zyngier 3484f8d6632SMarc Zyngier int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, 3494f8d6632SMarc Zyngier int exception_index); 3503368bd80SJames Morse void handle_exit_early(struct kvm_vcpu *vcpu, struct kvm_run *run, 3513368bd80SJames Morse int exception_index); 3524f8d6632SMarc Zyngier 3534f8d6632SMarc Zyngier int kvm_perf_init(void); 3544f8d6632SMarc Zyngier int kvm_perf_teardown(void); 3554f8d6632SMarc Zyngier 3564429fc64SAndre Przywara struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr); 3574429fc64SAndre Przywara 3584464e210SChristoffer Dall void __kvm_set_tpidr_el2(u64 tpidr_el2); 3594464e210SChristoffer Dall DECLARE_PER_CPU(kvm_cpu_context_t, kvm_host_cpu_state); 3604464e210SChristoffer Dall 36112fda812SMarc Zyngier static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr, 362092bd143SMarc Zyngier unsigned long hyp_stack_ptr, 363092bd143SMarc Zyngier unsigned long vector_ptr) 364092bd143SMarc Zyngier { 3654464e210SChristoffer Dall u64 tpidr_el2; 3664464e210SChristoffer Dall 367092bd143SMarc Zyngier /* 36863a1e1c9SMark Rutland * Call initialization code, and switch to the full blown HYP code. 36963a1e1c9SMark Rutland * If the cpucaps haven't been finalized yet, something has gone very 37063a1e1c9SMark Rutland * wrong, and hyp will crash and burn when it uses any 37163a1e1c9SMark Rutland * cpus_have_const_cap() wrapper. 372092bd143SMarc Zyngier */ 37363a1e1c9SMark Rutland BUG_ON(!static_branch_likely(&arm64_const_caps_ready)); 3743421e9d8SMarc Zyngier __kvm_call_hyp((void *)pgd_ptr, hyp_stack_ptr, vector_ptr); 3754464e210SChristoffer Dall 3764464e210SChristoffer Dall /* 3774464e210SChristoffer Dall * Calculate the raw per-cpu offset without a translation from the 3784464e210SChristoffer Dall * kernel's mapping to the linear mapping, and store it in tpidr_el2 3794464e210SChristoffer Dall * so that we can use adr_l to access per-cpu variables in EL2. 3804464e210SChristoffer Dall */ 3814464e210SChristoffer Dall tpidr_el2 = (u64)this_cpu_ptr(&kvm_host_cpu_state) 3824464e210SChristoffer Dall - (u64)kvm_ksym_ref(kvm_host_cpu_state); 3834464e210SChristoffer Dall 3844464e210SChristoffer Dall kvm_call_hyp(__kvm_set_tpidr_el2, tpidr_el2); 385092bd143SMarc Zyngier } 386092bd143SMarc Zyngier 3870865e636SRadim Krčmář static inline void kvm_arch_hardware_unsetup(void) {} 3880865e636SRadim Krčmář static inline void kvm_arch_sync_events(struct kvm *kvm) {} 3890865e636SRadim Krčmář static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {} 3900865e636SRadim Krčmář static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 3913491caf2SChristian Borntraeger static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 3920865e636SRadim Krčmář 39356c7f5e7SAlex Bennée void kvm_arm_init_debug(void); 39456c7f5e7SAlex Bennée void kvm_arm_setup_debug(struct kvm_vcpu *vcpu); 39556c7f5e7SAlex Bennée void kvm_arm_clear_debug(struct kvm_vcpu *vcpu); 39684e690bfSAlex Bennée void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu); 397696673d1SAlex Bennée bool kvm_arm_handle_step_debug(struct kvm_vcpu *vcpu, struct kvm_run *run); 398bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, 399bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 400bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, 401bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 402bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu, 403bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 40456c7f5e7SAlex Bennée 40521a4179cSMarc Zyngier static inline void __cpu_init_stage2(void) 40621a4179cSMarc Zyngier { 4076141570cSMarc Zyngier u32 parange = kvm_call_hyp(__init_stage2_translation); 4086141570cSMarc Zyngier 4096141570cSMarc Zyngier WARN_ONCE(parange < 40, 4106141570cSMarc Zyngier "PARange is %d bits, unsupported configuration!", parange); 41121a4179cSMarc Zyngier } 41221a4179cSMarc Zyngier 41317eed27bSDave Martin /* 41417eed27bSDave Martin * All host FP/SIMD state is restored on guest exit, so nothing needs 41517eed27bSDave Martin * doing here except in the SVE case: 41617eed27bSDave Martin */ 41717eed27bSDave Martin static inline void kvm_fpsimd_flush_cpu_state(void) 41817eed27bSDave Martin { 41917eed27bSDave Martin if (system_supports_sve()) 42017eed27bSDave Martin sve_flush_cpu_state(); 42117eed27bSDave Martin } 42217eed27bSDave Martin 4234f5abad9SJames Morse static inline void kvm_arm_vhe_guest_enter(void) 4244f5abad9SJames Morse { 4254f5abad9SJames Morse local_daif_mask(); 4264f5abad9SJames Morse } 4274f5abad9SJames Morse 4284f5abad9SJames Morse static inline void kvm_arm_vhe_guest_exit(void) 4294f5abad9SJames Morse { 4304f5abad9SJames Morse local_daif_restore(DAIF_PROCCTX_NOIRQ); 4314f5abad9SJames Morse } 4326167ec5cSMarc Zyngier 4336167ec5cSMarc Zyngier static inline bool kvm_arm_harden_branch_predictor(void) 4346167ec5cSMarc Zyngier { 4356167ec5cSMarc Zyngier return cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR); 4366167ec5cSMarc Zyngier } 4376167ec5cSMarc Zyngier 438bc192ceeSChristoffer Dall void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu); 439bc192ceeSChristoffer Dall void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu); 440bc192ceeSChristoffer Dall 4414f8d6632SMarc Zyngier #endif /* __ARM64_KVM_HOST_H__ */ 442