1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 24f8d6632SMarc Zyngier /* 34f8d6632SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 44f8d6632SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 54f8d6632SMarc Zyngier * 64f8d6632SMarc Zyngier * Derived from arch/arm/include/asm/kvm_host.h: 74f8d6632SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 84f8d6632SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 94f8d6632SMarc Zyngier */ 104f8d6632SMarc Zyngier 114f8d6632SMarc Zyngier #ifndef __ARM64_KVM_HOST_H__ 124f8d6632SMarc Zyngier #define __ARM64_KVM_HOST_H__ 134f8d6632SMarc Zyngier 1405469831SAndrew Scull #include <linux/arm-smccc.h> 153f61f409SDave Martin #include <linux/bitmap.h> 1665647300SPaolo Bonzini #include <linux/types.h> 173f61f409SDave Martin #include <linux/jump_label.h> 1865647300SPaolo Bonzini #include <linux/kvm_types.h> 193f61f409SDave Martin #include <linux/percpu.h> 20ff367fe4SDavid Brazdil #include <linux/psci.h> 2185738e05SJulien Thierry #include <asm/arch_gicv3.h> 223f61f409SDave Martin #include <asm/barrier.h> 2363a1e1c9SMark Rutland #include <asm/cpufeature.h> 241e0cf16cSMarc Zyngier #include <asm/cputype.h> 254f5abad9SJames Morse #include <asm/daifflags.h> 2617eed27bSDave Martin #include <asm/fpsimd.h> 274f8d6632SMarc Zyngier #include <asm/kvm.h> 283a3604bcSMarc Zyngier #include <asm/kvm_asm.h> 294f8d6632SMarc Zyngier 30c1426e4cSEric Auger #define __KVM_HAVE_ARCH_INTC_INITIALIZED 31c1426e4cSEric Auger 32920552b2SDavid Hildenbrand #define KVM_HALT_POLL_NS_DEFAULT 500000 334f8d6632SMarc Zyngier 344f8d6632SMarc Zyngier #include <kvm/arm_vgic.h> 354f8d6632SMarc Zyngier #include <kvm/arm_arch_timer.h> 3604fe4726SShannon Zhao #include <kvm/arm_pmu.h> 374f8d6632SMarc Zyngier 38ef748917SMing Lei #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS 39ef748917SMing Lei 40a22fa321SAmit Daniel Kachhap #define KVM_VCPU_MAX_FEATURES 7 414f8d6632SMarc Zyngier 427b244e2bSAndrew Jones #define KVM_REQ_SLEEP \ 432387149eSAndrew Jones KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 44325f9c64SAndrew Jones #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) 45358b28f0SMarc Zyngier #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2) 468564d637SSteven Price #define KVM_REQ_RECORD_STEAL KVM_ARCH_REQ(3) 47d9c3872cSMarc Zyngier #define KVM_REQ_RELOAD_GICv4 KVM_ARCH_REQ(4) 48d0c94c49SMarc Zyngier #define KVM_REQ_RELOAD_PMU KVM_ARCH_REQ(5) 497b33a09dSOliver Upton #define KVM_REQ_SUSPEND KVM_ARCH_REQ(6) 50b13216cfSChristoffer Dall 51c862626eSKeqian Zhu #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 52c862626eSKeqian Zhu KVM_DIRTY_LOG_INITIALLY_SET) 53c862626eSKeqian Zhu 54fcc5bf89SJing Zhang #define KVM_HAVE_MMU_RWLOCK 55fcc5bf89SJing Zhang 56d8b369c4SDavid Brazdil /* 57d8b369c4SDavid Brazdil * Mode of operation configurable with kvm-arm.mode early param. 58d8b369c4SDavid Brazdil * See Documentation/admin-guide/kernel-parameters.txt for more information. 59d8b369c4SDavid Brazdil */ 60d8b369c4SDavid Brazdil enum kvm_mode { 61d8b369c4SDavid Brazdil KVM_MODE_DEFAULT, 62d8b369c4SDavid Brazdil KVM_MODE_PROTECTED, 63675cabc8SJintack Lim KVM_MODE_NV, 64b6a68b97SMarc Zyngier KVM_MODE_NONE, 65d8b369c4SDavid Brazdil }; 66675cabc8SJintack Lim #ifdef CONFIG_KVM 673eb681fbSDavid Brazdil enum kvm_mode kvm_get_mode(void); 68675cabc8SJintack Lim #else 69675cabc8SJintack Lim static inline enum kvm_mode kvm_get_mode(void) { return KVM_MODE_NONE; }; 70675cabc8SJintack Lim #endif 71d8b369c4SDavid Brazdil 7261bbe380SChristoffer Dall DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 7361bbe380SChristoffer Dall 748d20bd63SSean Christopherson extern unsigned int __ro_after_init kvm_sve_max_vl; 758d20bd63SSean Christopherson int __init kvm_arm_init_sve(void); 760f062bfeSDave Martin 776b7982feSAnshuman Khandual u32 __attribute_const__ kvm_target_cpu(void); 784f8d6632SMarc Zyngier int kvm_reset_vcpu(struct kvm_vcpu *vcpu); 7919bcc89eSSean Christopherson void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu); 804f8d6632SMarc Zyngier 81717a7eebSQuentin Perret struct kvm_hyp_memcache { 82717a7eebSQuentin Perret phys_addr_t head; 83717a7eebSQuentin Perret unsigned long nr_pages; 84717a7eebSQuentin Perret }; 85717a7eebSQuentin Perret 86717a7eebSQuentin Perret static inline void push_hyp_memcache(struct kvm_hyp_memcache *mc, 87717a7eebSQuentin Perret phys_addr_t *p, 88717a7eebSQuentin Perret phys_addr_t (*to_pa)(void *virt)) 89717a7eebSQuentin Perret { 90717a7eebSQuentin Perret *p = mc->head; 91717a7eebSQuentin Perret mc->head = to_pa(p); 92717a7eebSQuentin Perret mc->nr_pages++; 93717a7eebSQuentin Perret } 94717a7eebSQuentin Perret 95717a7eebSQuentin Perret static inline void *pop_hyp_memcache(struct kvm_hyp_memcache *mc, 96717a7eebSQuentin Perret void *(*to_va)(phys_addr_t phys)) 97717a7eebSQuentin Perret { 98717a7eebSQuentin Perret phys_addr_t *p = to_va(mc->head); 99717a7eebSQuentin Perret 100717a7eebSQuentin Perret if (!mc->nr_pages) 101717a7eebSQuentin Perret return NULL; 102717a7eebSQuentin Perret 103717a7eebSQuentin Perret mc->head = *p; 104717a7eebSQuentin Perret mc->nr_pages--; 105717a7eebSQuentin Perret 106717a7eebSQuentin Perret return p; 107717a7eebSQuentin Perret } 108717a7eebSQuentin Perret 109717a7eebSQuentin Perret static inline int __topup_hyp_memcache(struct kvm_hyp_memcache *mc, 110717a7eebSQuentin Perret unsigned long min_pages, 111717a7eebSQuentin Perret void *(*alloc_fn)(void *arg), 112717a7eebSQuentin Perret phys_addr_t (*to_pa)(void *virt), 113717a7eebSQuentin Perret void *arg) 114717a7eebSQuentin Perret { 115717a7eebSQuentin Perret while (mc->nr_pages < min_pages) { 116717a7eebSQuentin Perret phys_addr_t *p = alloc_fn(arg); 117717a7eebSQuentin Perret 118717a7eebSQuentin Perret if (!p) 119717a7eebSQuentin Perret return -ENOMEM; 120717a7eebSQuentin Perret push_hyp_memcache(mc, p, to_pa); 121717a7eebSQuentin Perret } 122717a7eebSQuentin Perret 123717a7eebSQuentin Perret return 0; 124717a7eebSQuentin Perret } 125717a7eebSQuentin Perret 126717a7eebSQuentin Perret static inline void __free_hyp_memcache(struct kvm_hyp_memcache *mc, 127717a7eebSQuentin Perret void (*free_fn)(void *virt, void *arg), 128717a7eebSQuentin Perret void *(*to_va)(phys_addr_t phys), 129717a7eebSQuentin Perret void *arg) 130717a7eebSQuentin Perret { 131717a7eebSQuentin Perret while (mc->nr_pages) 132717a7eebSQuentin Perret free_fn(pop_hyp_memcache(mc, to_va), arg); 133717a7eebSQuentin Perret } 134717a7eebSQuentin Perret 135717a7eebSQuentin Perret void free_hyp_memcache(struct kvm_hyp_memcache *mc); 136717a7eebSQuentin Perret int topup_hyp_memcache(struct kvm_hyp_memcache *mc, unsigned long min_pages); 137717a7eebSQuentin Perret 138e329fb75SChristoffer Dall struct kvm_vmid { 1393248136bSJulien Grall atomic64_t id; 140e329fb75SChristoffer Dall }; 141e329fb75SChristoffer Dall 142a0e50aa3SChristoffer Dall struct kvm_s2_mmu { 143e329fb75SChristoffer Dall struct kvm_vmid vmid; 1444f8d6632SMarc Zyngier 145a0e50aa3SChristoffer Dall /* 146a0e50aa3SChristoffer Dall * stage2 entry level table 147a0e50aa3SChristoffer Dall * 148a0e50aa3SChristoffer Dall * Two kvm_s2_mmu structures in the same VM can point to the same 149a0e50aa3SChristoffer Dall * pgd here. This happens when running a guest using a 150a0e50aa3SChristoffer Dall * translation regime that isn't affected by its own stage-2 151a0e50aa3SChristoffer Dall * translation, such as a non-VHE hypervisor running at vEL2, or 152a0e50aa3SChristoffer Dall * for vEL1/EL0 with vHCR_EL2.VM == 0. In that case, we use the 153a0e50aa3SChristoffer Dall * canonical stage-2 page tables. 154a0e50aa3SChristoffer Dall */ 155e329fb75SChristoffer Dall phys_addr_t pgd_phys; 15671233d05SWill Deacon struct kvm_pgtable *pgt; 1574f8d6632SMarc Zyngier 15894d0e598SMarc Zyngier /* The last vcpu id that ran on each physical CPU */ 15994d0e598SMarc Zyngier int __percpu *last_vcpu_ran; 16094d0e598SMarc Zyngier 161cfb1a98dSQuentin Perret struct kvm_arch *arch; 162a0e50aa3SChristoffer Dall }; 163a0e50aa3SChristoffer Dall 1648d14797bSWill Deacon struct kvm_arch_memory_slot { 1658d14797bSWill Deacon }; 1668d14797bSWill Deacon 16705714cabSRaghavendra Rao Ananta /** 16805714cabSRaghavendra Rao Ananta * struct kvm_smccc_features: Descriptor of the hypercall services exposed to the guests 16905714cabSRaghavendra Rao Ananta * 17005714cabSRaghavendra Rao Ananta * @std_bmap: Bitmap of standard secure service calls 171428fd678SRaghavendra Rao Ananta * @std_hyp_bmap: Bitmap of standard hypervisor service calls 172b22216e1SRaghavendra Rao Ananta * @vendor_hyp_bmap: Bitmap of vendor specific hypervisor service calls 17305714cabSRaghavendra Rao Ananta */ 17405714cabSRaghavendra Rao Ananta struct kvm_smccc_features { 17505714cabSRaghavendra Rao Ananta unsigned long std_bmap; 176428fd678SRaghavendra Rao Ananta unsigned long std_hyp_bmap; 177b22216e1SRaghavendra Rao Ananta unsigned long vendor_hyp_bmap; 17805714cabSRaghavendra Rao Ananta }; 17905714cabSRaghavendra Rao Ananta 180a1ec5c70SFuad Tabba typedef unsigned int pkvm_handle_t; 181a1ec5c70SFuad Tabba 1829d0c063aSFuad Tabba struct kvm_protected_vm { 1839d0c063aSFuad Tabba pkvm_handle_t handle; 184f41dff4eSQuentin Perret struct kvm_hyp_memcache teardown_mc; 1859d0c063aSFuad Tabba }; 1869d0c063aSFuad Tabba 187a0e50aa3SChristoffer Dall struct kvm_arch { 188a0e50aa3SChristoffer Dall struct kvm_s2_mmu mmu; 189a0e50aa3SChristoffer Dall 190a0e50aa3SChristoffer Dall /* VTCR_EL2 value for this VM */ 191a0e50aa3SChristoffer Dall u64 vtcr; 192a0e50aa3SChristoffer Dall 1934f8d6632SMarc Zyngier /* Interrupt controller */ 1944f8d6632SMarc Zyngier struct vgic_dist vgic; 19585bd0ba1SMarc Zyngier 19647053904SMarc Zyngier /* Timers */ 19747053904SMarc Zyngier struct arch_timer_vm_data timer_data; 19847053904SMarc Zyngier 19985bd0ba1SMarc Zyngier /* Mandated version of PSCI */ 20085bd0ba1SMarc Zyngier u32 psci_version; 201c726200dSChristoffer Dall 202c726200dSChristoffer Dall /* 203c726200dSChristoffer Dall * If we encounter a data abort without valid instruction syndrome 204c726200dSChristoffer Dall * information, report this to user space. User space can (and 205c726200dSChristoffer Dall * should) opt in to this feature if KVM_CAP_ARM_NISV_TO_USER is 206c726200dSChristoffer Dall * supported. 207c726200dSChristoffer Dall */ 20806394531SMarc Zyngier #define KVM_ARCH_FLAG_RETURN_NISV_IO_ABORT_TO_USER 0 20906394531SMarc Zyngier /* Memory Tagging Extension enabled for the guest */ 21006394531SMarc Zyngier #define KVM_ARCH_FLAG_MTE_ENABLED 1 21106394531SMarc Zyngier /* At least one vCPU has ran in the VM */ 21206394531SMarc Zyngier #define KVM_ARCH_FLAG_HAS_RAN_ONCE 2 21326bf74bdSReiji Watanabe /* 21426bf74bdSReiji Watanabe * The following two bits are used to indicate the guest's EL1 21526bf74bdSReiji Watanabe * register width configuration. A value of KVM_ARCH_FLAG_EL1_32BIT 21626bf74bdSReiji Watanabe * bit is valid only when KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED is set. 21726bf74bdSReiji Watanabe * Otherwise, the guest's EL1 register width has not yet been 21826bf74bdSReiji Watanabe * determined yet. 21926bf74bdSReiji Watanabe */ 22026bf74bdSReiji Watanabe #define KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED 3 22126bf74bdSReiji Watanabe #define KVM_ARCH_FLAG_EL1_32BIT 4 222bfbab445SOliver Upton /* PSCI SYSTEM_SUSPEND enabled for the guest */ 223bfbab445SOliver Upton #define KVM_ARCH_FLAG_SYSTEM_SUSPEND_ENABLED 5 22430ec7997SMarc Zyngier /* VM counter offset */ 22530ec7997SMarc Zyngier #define KVM_ARCH_FLAG_VM_COUNTER_OFFSET 6 2268a5eb2d2SMarc Zyngier /* Timer PPIs made immutable */ 2278a5eb2d2SMarc Zyngier #define KVM_ARCH_FLAG_TIMER_PPIS_IMMUTABLE 7 22826bf74bdSReiji Watanabe 22906394531SMarc Zyngier unsigned long flags; 230fd65a3b5SMarc Zyngier 231d7eec236SMarc Zyngier /* 232d7eec236SMarc Zyngier * VM-wide PMU filter, implemented as a bitmap and big enough for 233d7eec236SMarc Zyngier * up to 2^10 events (ARMv8.0) or 2^16 events (ARMv8.1+). 234d7eec236SMarc Zyngier */ 235d7eec236SMarc Zyngier unsigned long *pmu_filter; 23646b18782SMarc Zyngier struct arm_pmu *arm_pmu; 23723711a5eSMarc Zyngier 238583cda1bSAlexandru Elisei cpumask_var_t supported_cpus; 23923711a5eSMarc Zyngier 24023711a5eSMarc Zyngier u8 pfr0_csv2; 2414f1df628SMarc Zyngier u8 pfr0_csv3; 2423d0dba57SMarc Zyngier struct { 2433d0dba57SMarc Zyngier u8 imp:4; 2443d0dba57SMarc Zyngier u8 unimp:4; 2453d0dba57SMarc Zyngier } dfr0_pmuver; 24605714cabSRaghavendra Rao Ananta 24705714cabSRaghavendra Rao Ananta /* Hypercall features firmware registers' descriptor */ 24805714cabSRaghavendra Rao Ananta struct kvm_smccc_features smccc_feat; 249a1ec5c70SFuad Tabba 250a1ec5c70SFuad Tabba /* 2519d0c063aSFuad Tabba * For an untrusted host VM, 'pkvm.handle' is used to lookup 252a1ec5c70SFuad Tabba * the associated pKVM instance in the hypervisor. 253a1ec5c70SFuad Tabba */ 2549d0c063aSFuad Tabba struct kvm_protected_vm pkvm; 2554f8d6632SMarc Zyngier }; 2564f8d6632SMarc Zyngier 2574f8d6632SMarc Zyngier struct kvm_vcpu_fault_info { 2580b12620fSAlexandru Elisei u64 esr_el2; /* Hyp Syndrom Register */ 2594f8d6632SMarc Zyngier u64 far_el2; /* Hyp Fault Address Register */ 2604f8d6632SMarc Zyngier u64 hpfar_el2; /* Hyp IPA Fault Address Register */ 2610067df41SJames Morse u64 disr_el1; /* Deferred [SError] Status Register */ 2624f8d6632SMarc Zyngier }; 2634f8d6632SMarc Zyngier 2649d8415d6SMarc Zyngier enum vcpu_sysreg { 2658f7f4fe7SMarc Zyngier __INVALID_SYSREG__, /* 0 is reserved as an invalid value */ 2669d8415d6SMarc Zyngier MPIDR_EL1, /* MultiProcessor Affinity Register */ 2677af0c253SAkihiko Odaki CLIDR_EL1, /* Cache Level ID Register */ 2689d8415d6SMarc Zyngier CSSELR_EL1, /* Cache Size Selection Register */ 2699d8415d6SMarc Zyngier SCTLR_EL1, /* System Control Register */ 2709d8415d6SMarc Zyngier ACTLR_EL1, /* Auxiliary Control Register */ 2719d8415d6SMarc Zyngier CPACR_EL1, /* Coprocessor Access Control */ 27273433762SDave Martin ZCR_EL1, /* SVE Control */ 2739d8415d6SMarc Zyngier TTBR0_EL1, /* Translation Table Base Register 0 */ 2749d8415d6SMarc Zyngier TTBR1_EL1, /* Translation Table Base Register 1 */ 2759d8415d6SMarc Zyngier TCR_EL1, /* Translation Control Register */ 2769d8415d6SMarc Zyngier ESR_EL1, /* Exception Syndrome Register */ 277ef769e32SAdam Buchbinder AFSR0_EL1, /* Auxiliary Fault Status Register 0 */ 278ef769e32SAdam Buchbinder AFSR1_EL1, /* Auxiliary Fault Status Register 1 */ 2799d8415d6SMarc Zyngier FAR_EL1, /* Fault Address Register */ 2809d8415d6SMarc Zyngier MAIR_EL1, /* Memory Attribute Indirection Register */ 2819d8415d6SMarc Zyngier VBAR_EL1, /* Vector Base Address Register */ 2829d8415d6SMarc Zyngier CONTEXTIDR_EL1, /* Context ID Register */ 2839d8415d6SMarc Zyngier TPIDR_EL0, /* Thread ID, User R/W */ 2849d8415d6SMarc Zyngier TPIDRRO_EL0, /* Thread ID, User R/O */ 2859d8415d6SMarc Zyngier TPIDR_EL1, /* Thread ID, Privileged */ 2869d8415d6SMarc Zyngier AMAIR_EL1, /* Aux Memory Attribute Indirection Register */ 2879d8415d6SMarc Zyngier CNTKCTL_EL1, /* Timer Control Register (EL1) */ 2889d8415d6SMarc Zyngier PAR_EL1, /* Physical Address Register */ 2899d8415d6SMarc Zyngier MDSCR_EL1, /* Monitor Debug System Control Register */ 2909d8415d6SMarc Zyngier MDCCINT_EL1, /* Monitor Debug Comms Channel Interrupt Enable Reg */ 291d42e2671SOliver Upton OSLSR_EL1, /* OS Lock Status Register */ 292c773ae2bSJames Morse DISR_EL1, /* Deferred Interrupt Status Register */ 2939d8415d6SMarc Zyngier 294ab946834SShannon Zhao /* Performance Monitors Registers */ 295ab946834SShannon Zhao PMCR_EL0, /* Control Register */ 2963965c3ceSShannon Zhao PMSELR_EL0, /* Event Counter Selection Register */ 297051ff581SShannon Zhao PMEVCNTR0_EL0, /* Event Counter Register (0-30) */ 298051ff581SShannon Zhao PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30, 299051ff581SShannon Zhao PMCCNTR_EL0, /* Cycle Counter Register */ 3009feb21acSShannon Zhao PMEVTYPER0_EL0, /* Event Type Register (0-30) */ 3019feb21acSShannon Zhao PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30, 3029feb21acSShannon Zhao PMCCFILTR_EL0, /* Cycle Count Filter Register */ 30396b0eebcSShannon Zhao PMCNTENSET_EL0, /* Count Enable Set Register */ 3049db52c78SShannon Zhao PMINTENSET_EL1, /* Interrupt Enable Set Register */ 30576d883c4SShannon Zhao PMOVSSET_EL0, /* Overflow Flag Status Set Register */ 306d692b8adSShannon Zhao PMUSERENR_EL0, /* User Enable Register */ 307ab946834SShannon Zhao 308384b40caSMark Rutland /* Pointer Authentication Registers in a strict increasing order. */ 309384b40caSMark Rutland APIAKEYLO_EL1, 310384b40caSMark Rutland APIAKEYHI_EL1, 311384b40caSMark Rutland APIBKEYLO_EL1, 312384b40caSMark Rutland APIBKEYHI_EL1, 313384b40caSMark Rutland APDAKEYLO_EL1, 314384b40caSMark Rutland APDAKEYHI_EL1, 315384b40caSMark Rutland APDBKEYLO_EL1, 316384b40caSMark Rutland APDBKEYHI_EL1, 317384b40caSMark Rutland APGAKEYLO_EL1, 318384b40caSMark Rutland APGAKEYHI_EL1, 319384b40caSMark Rutland 32098909e6dSMarc Zyngier ELR_EL1, 3211bded23eSMarc Zyngier SP_EL1, 322710f1982SMarc Zyngier SPSR_EL1, 32398909e6dSMarc Zyngier 32441ce82f6SMarc Zyngier CNTVOFF_EL2, 32541ce82f6SMarc Zyngier CNTV_CVAL_EL0, 32641ce82f6SMarc Zyngier CNTV_CTL_EL0, 32741ce82f6SMarc Zyngier CNTP_CVAL_EL0, 32841ce82f6SMarc Zyngier CNTP_CTL_EL0, 32941ce82f6SMarc Zyngier 330e1f358b5SSteven Price /* Memory Tagging Extension registers */ 331e1f358b5SSteven Price RGSR_EL1, /* Random Allocation Tag Seed Register */ 332e1f358b5SSteven Price GCR_EL1, /* Tag Control Register */ 333e1f358b5SSteven Price TFSR_EL1, /* Tag Fault Status Register (EL1) */ 334e1f358b5SSteven Price TFSRE0_EL1, /* Tag Fault Status Register (EL0) */ 335e1f358b5SSteven Price 3365305cc2cSMarc Zyngier /* 32bit specific registers. */ 3379d8415d6SMarc Zyngier DACR32_EL2, /* Domain Access Control Register */ 3389d8415d6SMarc Zyngier IFSR32_EL2, /* Instruction Fault Status Register */ 3399d8415d6SMarc Zyngier FPEXC32_EL2, /* Floating-Point Exception Control Register */ 3409d8415d6SMarc Zyngier DBGVCR32_EL2, /* Debug Vector Catch Register */ 3419d8415d6SMarc Zyngier 3425305cc2cSMarc Zyngier /* EL2 registers */ 3435305cc2cSMarc Zyngier VPIDR_EL2, /* Virtualization Processor ID Register */ 3445305cc2cSMarc Zyngier VMPIDR_EL2, /* Virtualization Multiprocessor ID Register */ 3455305cc2cSMarc Zyngier SCTLR_EL2, /* System Control Register (EL2) */ 3465305cc2cSMarc Zyngier ACTLR_EL2, /* Auxiliary Control Register (EL2) */ 3475305cc2cSMarc Zyngier HCR_EL2, /* Hypervisor Configuration Register */ 3485305cc2cSMarc Zyngier MDCR_EL2, /* Monitor Debug Configuration Register (EL2) */ 3495305cc2cSMarc Zyngier CPTR_EL2, /* Architectural Feature Trap Register (EL2) */ 3505305cc2cSMarc Zyngier HSTR_EL2, /* Hypervisor System Trap Register */ 3515305cc2cSMarc Zyngier HACR_EL2, /* Hypervisor Auxiliary Control Register */ 3525305cc2cSMarc Zyngier TTBR0_EL2, /* Translation Table Base Register 0 (EL2) */ 3535305cc2cSMarc Zyngier TTBR1_EL2, /* Translation Table Base Register 1 (EL2) */ 3545305cc2cSMarc Zyngier TCR_EL2, /* Translation Control Register (EL2) */ 3555305cc2cSMarc Zyngier VTTBR_EL2, /* Virtualization Translation Table Base Register */ 3565305cc2cSMarc Zyngier VTCR_EL2, /* Virtualization Translation Control Register */ 3575305cc2cSMarc Zyngier SPSR_EL2, /* EL2 saved program status register */ 3585305cc2cSMarc Zyngier ELR_EL2, /* EL2 exception link register */ 3595305cc2cSMarc Zyngier AFSR0_EL2, /* Auxiliary Fault Status Register 0 (EL2) */ 3605305cc2cSMarc Zyngier AFSR1_EL2, /* Auxiliary Fault Status Register 1 (EL2) */ 3615305cc2cSMarc Zyngier ESR_EL2, /* Exception Syndrome Register (EL2) */ 3625305cc2cSMarc Zyngier FAR_EL2, /* Fault Address Register (EL2) */ 3635305cc2cSMarc Zyngier HPFAR_EL2, /* Hypervisor IPA Fault Address Register */ 3645305cc2cSMarc Zyngier MAIR_EL2, /* Memory Attribute Indirection Register (EL2) */ 3655305cc2cSMarc Zyngier AMAIR_EL2, /* Auxiliary Memory Attribute Indirection Register (EL2) */ 3665305cc2cSMarc Zyngier VBAR_EL2, /* Vector Base Address Register (EL2) */ 3675305cc2cSMarc Zyngier RVBAR_EL2, /* Reset Vector Base Address Register */ 3685305cc2cSMarc Zyngier CONTEXTIDR_EL2, /* Context ID Register (EL2) */ 3695305cc2cSMarc Zyngier TPIDR_EL2, /* EL2 Software Thread ID Register */ 3705305cc2cSMarc Zyngier CNTHCTL_EL2, /* Counter-timer Hypervisor Control register */ 3715305cc2cSMarc Zyngier SP_EL2, /* EL2 Stack Pointer */ 372*81dc9504SMarc Zyngier CNTHP_CTL_EL2, 373*81dc9504SMarc Zyngier CNTHP_CVAL_EL2, 374*81dc9504SMarc Zyngier CNTHV_CTL_EL2, 375*81dc9504SMarc Zyngier CNTHV_CVAL_EL2, 3765305cc2cSMarc Zyngier 3779d8415d6SMarc Zyngier NR_SYS_REGS /* Nothing after this line! */ 3789d8415d6SMarc Zyngier }; 3799d8415d6SMarc Zyngier 3804f8d6632SMarc Zyngier struct kvm_cpu_context { 381e47c2055SMarc Zyngier struct user_pt_regs regs; /* sp = sp_el0 */ 382e47c2055SMarc Zyngier 383fd85b667SMarc Zyngier u64 spsr_abt; 384fd85b667SMarc Zyngier u64 spsr_und; 385fd85b667SMarc Zyngier u64 spsr_irq; 386fd85b667SMarc Zyngier u64 spsr_fiq; 387e47c2055SMarc Zyngier 388e47c2055SMarc Zyngier struct user_fpsimd_state fp_regs; 389e47c2055SMarc Zyngier 3904f8d6632SMarc Zyngier u64 sys_regs[NR_SYS_REGS]; 391c97e166eSJames Morse 392c97e166eSJames Morse struct kvm_vcpu *__hyp_running_vcpu; 3934f8d6632SMarc Zyngier }; 3944f8d6632SMarc Zyngier 395630a1685SAndrew Murray struct kvm_host_data { 396630a1685SAndrew Murray struct kvm_cpu_context host_ctxt; 397630a1685SAndrew Murray }; 398630a1685SAndrew Murray 399ff367fe4SDavid Brazdil struct kvm_host_psci_config { 400ff367fe4SDavid Brazdil /* PSCI version used by host. */ 401ff367fe4SDavid Brazdil u32 version; 402ff367fe4SDavid Brazdil 403ff367fe4SDavid Brazdil /* Function IDs used by host if version is v0.1. */ 404ff367fe4SDavid Brazdil struct psci_0_1_function_ids function_ids_0_1; 405ff367fe4SDavid Brazdil 406767c973fSMarc Zyngier bool psci_0_1_cpu_suspend_implemented; 407767c973fSMarc Zyngier bool psci_0_1_cpu_on_implemented; 408767c973fSMarc Zyngier bool psci_0_1_cpu_off_implemented; 409767c973fSMarc Zyngier bool psci_0_1_migrate_implemented; 410ff367fe4SDavid Brazdil }; 411ff367fe4SDavid Brazdil 412ff367fe4SDavid Brazdil extern struct kvm_host_psci_config kvm_nvhe_sym(kvm_host_psci_config); 413ff367fe4SDavid Brazdil #define kvm_host_psci_config CHOOSE_NVHE_SYM(kvm_host_psci_config) 414ff367fe4SDavid Brazdil 41561fe0c37SDavid Brazdil extern s64 kvm_nvhe_sym(hyp_physvirt_offset); 41661fe0c37SDavid Brazdil #define hyp_physvirt_offset CHOOSE_NVHE_SYM(hyp_physvirt_offset) 41761fe0c37SDavid Brazdil 41861fe0c37SDavid Brazdil extern u64 kvm_nvhe_sym(hyp_cpu_logical_map)[NR_CPUS]; 41961fe0c37SDavid Brazdil #define hyp_cpu_logical_map CHOOSE_NVHE_SYM(hyp_cpu_logical_map) 42061fe0c37SDavid Brazdil 421358b28f0SMarc Zyngier struct vcpu_reset_state { 422358b28f0SMarc Zyngier unsigned long pc; 423358b28f0SMarc Zyngier unsigned long r0; 424358b28f0SMarc Zyngier bool be; 425358b28f0SMarc Zyngier bool reset; 426358b28f0SMarc Zyngier }; 427358b28f0SMarc Zyngier 4284f8d6632SMarc Zyngier struct kvm_vcpu_arch { 4294f8d6632SMarc Zyngier struct kvm_cpu_context ctxt; 4300033cd93SMark Brown 431baa85152SMark Brown /* 432baa85152SMark Brown * Guest floating point state 433baa85152SMark Brown * 434baa85152SMark Brown * The architecture has two main floating point extensions, 435baa85152SMark Brown * the original FPSIMD and SVE. These have overlapping 436baa85152SMark Brown * register views, with the FPSIMD V registers occupying the 437baa85152SMark Brown * low 128 bits of the SVE Z registers. When the core 438baa85152SMark Brown * floating point code saves the register state of a task it 439baa85152SMark Brown * records which view it saved in fp_type. 440baa85152SMark Brown */ 441b43b5dd9SDave Martin void *sve_state; 442baa85152SMark Brown enum fp_type fp_type; 443b43b5dd9SDave Martin unsigned int sve_max_vl; 4440033cd93SMark Brown u64 svcr; 4454f8d6632SMarc Zyngier 446a0e50aa3SChristoffer Dall /* Stage 2 paging state used by the hardware on next switch */ 447a0e50aa3SChristoffer Dall struct kvm_s2_mmu *hw_mmu; 448a0e50aa3SChristoffer Dall 4491460b4b2SFuad Tabba /* Values of trap registers for the guest. */ 4504f8d6632SMarc Zyngier u64 hcr_el2; 451d6c850ddSFuad Tabba u64 mdcr_el2; 452cd496228SFuad Tabba u64 cptr_el2; 4534f8d6632SMarc Zyngier 4541460b4b2SFuad Tabba /* Values of trap registers for the host before guest entry. */ 4551460b4b2SFuad Tabba u64 mdcr_el2_host; 4564f8d6632SMarc Zyngier 4574f8d6632SMarc Zyngier /* Exception Information */ 4584f8d6632SMarc Zyngier struct kvm_vcpu_fault_info fault; 4594f8d6632SMarc Zyngier 460f8077b0dSMarc Zyngier /* Ownership of the FP regs */ 461f8077b0dSMarc Zyngier enum { 462f8077b0dSMarc Zyngier FP_STATE_FREE, 463f8077b0dSMarc Zyngier FP_STATE_HOST_OWNED, 464f8077b0dSMarc Zyngier FP_STATE_GUEST_OWNED, 465f8077b0dSMarc Zyngier } fp_state; 466f8077b0dSMarc Zyngier 467690bacb8SMarc Zyngier /* Configuration flags, set once and for all before the vcpu can run */ 46854ddda91SMarc Zyngier u8 cflags; 469690bacb8SMarc Zyngier 470690bacb8SMarc Zyngier /* Input flags to the hypervisor code, potentially cleared after use */ 47154ddda91SMarc Zyngier u8 iflags; 472690bacb8SMarc Zyngier 473690bacb8SMarc Zyngier /* State flags for kernel bookkeeping, unused by the hypervisor code */ 47454ddda91SMarc Zyngier u8 sflags; 475690bacb8SMarc Zyngier 47684e690bfSAlex Bennée /* 4770fa4a313SMarc Zyngier * Don't run the guest (internal implementation need). 4780fa4a313SMarc Zyngier * 4790fa4a313SMarc Zyngier * Contrary to the flags above, this is set/cleared outside of 4800fa4a313SMarc Zyngier * a vcpu context, and thus cannot be mixed with the flags 4810fa4a313SMarc Zyngier * themselves (or the flag accesses need to be made atomic). 4820fa4a313SMarc Zyngier */ 4830fa4a313SMarc Zyngier bool pause; 4840c557ed4SMarc Zyngier 48584e690bfSAlex Bennée /* 48684e690bfSAlex Bennée * We maintain more than a single set of debug registers to support 48784e690bfSAlex Bennée * debugging the guest from the host and to maintain separate host and 48884e690bfSAlex Bennée * guest state during world switches. vcpu_debug_state are the debug 48984e690bfSAlex Bennée * registers of the vcpu as the guest sees them. host_debug_state are 490834bf887SAlex Bennée * the host registers which are saved and restored during 491834bf887SAlex Bennée * world switches. external_debug_state contains the debug 492834bf887SAlex Bennée * values we want to debug the guest. This is set via the 493834bf887SAlex Bennée * KVM_SET_GUEST_DEBUG ioctl. 49484e690bfSAlex Bennée * 49584e690bfSAlex Bennée * debug_ptr points to the set of debug registers that should be loaded 49684e690bfSAlex Bennée * onto the hardware when running the guest. 49784e690bfSAlex Bennée */ 49884e690bfSAlex Bennée struct kvm_guest_debug_arch *debug_ptr; 49984e690bfSAlex Bennée struct kvm_guest_debug_arch vcpu_debug_state; 500834bf887SAlex Bennée struct kvm_guest_debug_arch external_debug_state; 50184e690bfSAlex Bennée 502e6b673b7SDave Martin struct user_fpsimd_state *host_fpsimd_state; /* hyp VA */ 50352b28657SQuentin Perret struct task_struct *parent_task; 504e6b673b7SDave Martin 505f85279b4SWill Deacon struct { 506f85279b4SWill Deacon /* {Break,watch}point registers */ 507f85279b4SWill Deacon struct kvm_guest_debug_arch regs; 508f85279b4SWill Deacon /* Statistical profiling extension */ 509f85279b4SWill Deacon u64 pmscr_el1; 510a1319260SSuzuki K Poulose /* Self-hosted trace */ 511a1319260SSuzuki K Poulose u64 trfcr_el1; 512f85279b4SWill Deacon } host_debug_state; 5134f8d6632SMarc Zyngier 5144f8d6632SMarc Zyngier /* VGIC state */ 5154f8d6632SMarc Zyngier struct vgic_cpu vgic_cpu; 5164f8d6632SMarc Zyngier struct arch_timer_cpu timer_cpu; 51704fe4726SShannon Zhao struct kvm_pmu pmu; 5184f8d6632SMarc Zyngier 5194f8d6632SMarc Zyngier /* 520337b99bfSAlex Bennée * Guest registers we preserve during guest debugging. 521337b99bfSAlex Bennée * 522337b99bfSAlex Bennée * These shadow registers are updated by the kvm_handle_sys_reg 523337b99bfSAlex Bennée * trap handler if the guest accesses or updates them while we 524337b99bfSAlex Bennée * are using guest debug. 525337b99bfSAlex Bennée */ 526337b99bfSAlex Bennée struct { 527337b99bfSAlex Bennée u32 mdscr_el1; 52834fbdee0SReiji Watanabe bool pstate_ss; 529337b99bfSAlex Bennée } guest_debug_preserved; 530337b99bfSAlex Bennée 531b171f9bbSOliver Upton /* vcpu power state */ 532b171f9bbSOliver Upton struct kvm_mp_state mp_state; 5334f8d6632SMarc Zyngier 5344f8d6632SMarc Zyngier /* Cache some mmu pages needed inside spinlock regions */ 5354f8d6632SMarc Zyngier struct kvm_mmu_memory_cache mmu_page_cache; 5364f8d6632SMarc Zyngier 5374f8d6632SMarc Zyngier /* Target CPU and feature flags */ 5386c8c0c4dSChen Gang int target; 5394f8d6632SMarc Zyngier DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES); 5404f8d6632SMarc Zyngier 5414715c14bSJames Morse /* Virtual SError ESR to restore when HCR_EL2.VSE is set */ 5424715c14bSJames Morse u64 vsesr_el2; 543d47533daSChristoffer Dall 544358b28f0SMarc Zyngier /* Additional reset state */ 545358b28f0SMarc Zyngier struct vcpu_reset_state reset_state; 546358b28f0SMarc Zyngier 5478564d637SSteven Price /* Guest PV state */ 5488564d637SSteven Price struct { 5498564d637SSteven Price u64 last_steal; 5508564d637SSteven Price gpa_t base; 5518564d637SSteven Price } steal; 5527af0c253SAkihiko Odaki 5537af0c253SAkihiko Odaki /* Per-vcpu CCSIDR override or NULL */ 5547af0c253SAkihiko Odaki u32 *ccsidr; 5554f8d6632SMarc Zyngier }; 5564f8d6632SMarc Zyngier 557e87abb73SMarc Zyngier /* 558e87abb73SMarc Zyngier * Each 'flag' is composed of a comma-separated triplet: 559e87abb73SMarc Zyngier * 560e87abb73SMarc Zyngier * - the flag-set it belongs to in the vcpu->arch structure 561e87abb73SMarc Zyngier * - the value for that flag 562e87abb73SMarc Zyngier * - the mask for that flag 563e87abb73SMarc Zyngier * 564e87abb73SMarc Zyngier * __vcpu_single_flag() builds such a triplet for a single-bit flag. 565e87abb73SMarc Zyngier * unpack_vcpu_flag() extract the flag value from the triplet for 566e87abb73SMarc Zyngier * direct use outside of the flag accessors. 567e87abb73SMarc Zyngier */ 568e87abb73SMarc Zyngier #define __vcpu_single_flag(_set, _f) _set, (_f), (_f) 569e87abb73SMarc Zyngier 570e87abb73SMarc Zyngier #define __unpack_flag(_set, _f, _m) _f 571e87abb73SMarc Zyngier #define unpack_vcpu_flag(...) __unpack_flag(__VA_ARGS__) 572e87abb73SMarc Zyngier 5735a3984f4SMarc Zyngier #define __build_check_flag(v, flagset, f, m) \ 5745a3984f4SMarc Zyngier do { \ 5755a3984f4SMarc Zyngier typeof(v->arch.flagset) *_fset; \ 5765a3984f4SMarc Zyngier \ 5775a3984f4SMarc Zyngier /* Check that the flags fit in the mask */ \ 5785a3984f4SMarc Zyngier BUILD_BUG_ON(HWEIGHT(m) != HWEIGHT((f) | (m))); \ 5795a3984f4SMarc Zyngier /* Check that the flags fit in the type */ \ 5805a3984f4SMarc Zyngier BUILD_BUG_ON((sizeof(*_fset) * 8) <= __fls(m)); \ 5815a3984f4SMarc Zyngier } while (0) 5825a3984f4SMarc Zyngier 583e87abb73SMarc Zyngier #define __vcpu_get_flag(v, flagset, f, m) \ 584e87abb73SMarc Zyngier ({ \ 5855a3984f4SMarc Zyngier __build_check_flag(v, flagset, f, m); \ 5865a3984f4SMarc Zyngier \ 587e87abb73SMarc Zyngier v->arch.flagset & (m); \ 588e87abb73SMarc Zyngier }) 589e87abb73SMarc Zyngier 590e87abb73SMarc Zyngier #define __vcpu_set_flag(v, flagset, f, m) \ 591e87abb73SMarc Zyngier do { \ 592e87abb73SMarc Zyngier typeof(v->arch.flagset) *fset; \ 593e87abb73SMarc Zyngier \ 5945a3984f4SMarc Zyngier __build_check_flag(v, flagset, f, m); \ 5955a3984f4SMarc Zyngier \ 596e87abb73SMarc Zyngier fset = &v->arch.flagset; \ 597e87abb73SMarc Zyngier if (HWEIGHT(m) > 1) \ 598e87abb73SMarc Zyngier *fset &= ~(m); \ 599e87abb73SMarc Zyngier *fset |= (f); \ 600e87abb73SMarc Zyngier } while (0) 601e87abb73SMarc Zyngier 602e87abb73SMarc Zyngier #define __vcpu_clear_flag(v, flagset, f, m) \ 603e87abb73SMarc Zyngier do { \ 604e87abb73SMarc Zyngier typeof(v->arch.flagset) *fset; \ 605e87abb73SMarc Zyngier \ 6065a3984f4SMarc Zyngier __build_check_flag(v, flagset, f, m); \ 6075a3984f4SMarc Zyngier \ 608e87abb73SMarc Zyngier fset = &v->arch.flagset; \ 609e87abb73SMarc Zyngier *fset &= ~(m); \ 610e87abb73SMarc Zyngier } while (0) 611e87abb73SMarc Zyngier 612e87abb73SMarc Zyngier #define vcpu_get_flag(v, ...) __vcpu_get_flag((v), __VA_ARGS__) 613e87abb73SMarc Zyngier #define vcpu_set_flag(v, ...) __vcpu_set_flag((v), __VA_ARGS__) 614e87abb73SMarc Zyngier #define vcpu_clear_flag(v, ...) __vcpu_clear_flag((v), __VA_ARGS__) 615e87abb73SMarc Zyngier 6164c0680d3SMarc Zyngier /* SVE exposed to guest */ 6174c0680d3SMarc Zyngier #define GUEST_HAS_SVE __vcpu_single_flag(cflags, BIT(0)) 6184c0680d3SMarc Zyngier /* SVE config completed */ 6194c0680d3SMarc Zyngier #define VCPU_SVE_FINALIZED __vcpu_single_flag(cflags, BIT(1)) 6204c0680d3SMarc Zyngier /* PTRAUTH exposed to guest */ 6214c0680d3SMarc Zyngier #define GUEST_HAS_PTRAUTH __vcpu_single_flag(cflags, BIT(2)) 6224c0680d3SMarc Zyngier 623699bb2e0SMarc Zyngier /* Exception pending */ 624699bb2e0SMarc Zyngier #define PENDING_EXCEPTION __vcpu_single_flag(iflags, BIT(0)) 625699bb2e0SMarc Zyngier /* 626699bb2e0SMarc Zyngier * PC increment. Overlaps with EXCEPT_MASK on purpose so that it can't 627699bb2e0SMarc Zyngier * be set together with an exception... 628699bb2e0SMarc Zyngier */ 629699bb2e0SMarc Zyngier #define INCREMENT_PC __vcpu_single_flag(iflags, BIT(1)) 630699bb2e0SMarc Zyngier /* Target EL/MODE (not a single flag, but let's abuse the macro) */ 631699bb2e0SMarc Zyngier #define EXCEPT_MASK __vcpu_single_flag(iflags, GENMASK(3, 1)) 632699bb2e0SMarc Zyngier 633699bb2e0SMarc Zyngier /* Helpers to encode exceptions with minimum fuss */ 634699bb2e0SMarc Zyngier #define __EXCEPT_MASK_VAL unpack_vcpu_flag(EXCEPT_MASK) 635699bb2e0SMarc Zyngier #define __EXCEPT_SHIFT __builtin_ctzl(__EXCEPT_MASK_VAL) 636699bb2e0SMarc Zyngier #define __vcpu_except_flags(_f) iflags, (_f << __EXCEPT_SHIFT), __EXCEPT_MASK_VAL 637699bb2e0SMarc Zyngier 638699bb2e0SMarc Zyngier /* 639699bb2e0SMarc Zyngier * When PENDING_EXCEPTION is set, EXCEPT_MASK can take the following 640699bb2e0SMarc Zyngier * values: 641699bb2e0SMarc Zyngier * 642699bb2e0SMarc Zyngier * For AArch32 EL1: 643699bb2e0SMarc Zyngier */ 644699bb2e0SMarc Zyngier #define EXCEPT_AA32_UND __vcpu_except_flags(0) 645699bb2e0SMarc Zyngier #define EXCEPT_AA32_IABT __vcpu_except_flags(1) 646699bb2e0SMarc Zyngier #define EXCEPT_AA32_DABT __vcpu_except_flags(2) 647699bb2e0SMarc Zyngier /* For AArch64: */ 648699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_SYNC __vcpu_except_flags(0) 649699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_IRQ __vcpu_except_flags(1) 650699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_FIQ __vcpu_except_flags(2) 651699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_SERR __vcpu_except_flags(3) 65247f3a2fcSJintack Lim /* For AArch64 with NV: */ 653699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_SYNC __vcpu_except_flags(4) 654699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_IRQ __vcpu_except_flags(5) 655699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_FIQ __vcpu_except_flags(6) 656699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_SERR __vcpu_except_flags(7) 657b1da4908SMarc Zyngier /* Guest debug is live */ 658b1da4908SMarc Zyngier #define DEBUG_DIRTY __vcpu_single_flag(iflags, BIT(4)) 659b1da4908SMarc Zyngier /* Save SPE context if active */ 660b1da4908SMarc Zyngier #define DEBUG_STATE_SAVE_SPE __vcpu_single_flag(iflags, BIT(5)) 661b1da4908SMarc Zyngier /* Save TRBE context if active */ 662b1da4908SMarc Zyngier #define DEBUG_STATE_SAVE_TRBE __vcpu_single_flag(iflags, BIT(6)) 663d9552fe1SMarc Zyngier /* vcpu running in HYP context */ 664d9552fe1SMarc Zyngier #define VCPU_HYP_CONTEXT __vcpu_single_flag(iflags, BIT(7)) 665e87abb73SMarc Zyngier 6660affa37fSMarc Zyngier /* SVE enabled for host EL0 */ 6670affa37fSMarc Zyngier #define HOST_SVE_ENABLED __vcpu_single_flag(sflags, BIT(0)) 6680affa37fSMarc Zyngier /* SME enabled for EL0 */ 6690affa37fSMarc Zyngier #define HOST_SME_ENABLED __vcpu_single_flag(sflags, BIT(1)) 670aff3ccd7SMarc Zyngier /* Physical CPU not in supported_cpus */ 671aff3ccd7SMarc Zyngier #define ON_UNSUPPORTED_CPU __vcpu_single_flag(sflags, BIT(2)) 672eebc538dSMarc Zyngier /* WFIT instruction trapped */ 673eebc538dSMarc Zyngier #define IN_WFIT __vcpu_single_flag(sflags, BIT(3)) 67430b6ab45SMarc Zyngier /* vcpu system registers loaded on physical CPU */ 67530b6ab45SMarc Zyngier #define SYSREGS_ON_CPU __vcpu_single_flag(sflags, BIT(4)) 676370531d1SReiji Watanabe /* Software step state is Active-pending */ 677370531d1SReiji Watanabe #define DBG_SS_ACTIVE_PENDING __vcpu_single_flag(sflags, BIT(5)) 678370531d1SReiji Watanabe 6790affa37fSMarc Zyngier 680b43b5dd9SDave Martin /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ 681985d3a1bSMarc Zyngier #define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) + \ 682985d3a1bSMarc Zyngier sve_ffr_offset((vcpu)->arch.sve_max_vl)) 683b43b5dd9SDave Martin 684468f3477SMarc Zyngier #define vcpu_sve_max_vq(vcpu) sve_vq_from_vl((vcpu)->arch.sve_max_vl) 685b3eb56b6SDave Martin 686e1c9c983SDave Martin #define vcpu_sve_state_size(vcpu) ({ \ 687e1c9c983SDave Martin size_t __size_ret; \ 688e1c9c983SDave Martin unsigned int __vcpu_vq; \ 689e1c9c983SDave Martin \ 690e1c9c983SDave Martin if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) { \ 691e1c9c983SDave Martin __size_ret = 0; \ 692e1c9c983SDave Martin } else { \ 693468f3477SMarc Zyngier __vcpu_vq = vcpu_sve_max_vq(vcpu); \ 694e1c9c983SDave Martin __size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq); \ 695e1c9c983SDave Martin } \ 696e1c9c983SDave Martin \ 697e1c9c983SDave Martin __size_ret; \ 698e1c9c983SDave Martin }) 699e1c9c983SDave Martin 700892fd259SMarc Zyngier #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \ 701892fd259SMarc Zyngier KVM_GUESTDBG_USE_SW_BP | \ 702892fd259SMarc Zyngier KVM_GUESTDBG_USE_HW | \ 703892fd259SMarc Zyngier KVM_GUESTDBG_SINGLESTEP) 7041765edbaSDave Martin 7051765edbaSDave Martin #define vcpu_has_sve(vcpu) (system_supports_sve() && \ 7064c0680d3SMarc Zyngier vcpu_get_flag(vcpu, GUEST_HAS_SVE)) 707fa89d31cSDave Martin 708bf4086b1SMarc Zyngier #ifdef CONFIG_ARM64_PTR_AUTH 709bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) \ 710bf4086b1SMarc Zyngier ((cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) || \ 711bf4086b1SMarc Zyngier cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) && \ 7124c0680d3SMarc Zyngier vcpu_get_flag(vcpu, GUEST_HAS_PTRAUTH)) 713bf4086b1SMarc Zyngier #else 714bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) false 715bf4086b1SMarc Zyngier #endif 716b890d75cSAmit Daniel Kachhap 717583cda1bSAlexandru Elisei #define vcpu_on_unsupported_cpu(vcpu) \ 718aff3ccd7SMarc Zyngier vcpu_get_flag(vcpu, ON_UNSUPPORTED_CPU) 719583cda1bSAlexandru Elisei 720583cda1bSAlexandru Elisei #define vcpu_set_on_unsupported_cpu(vcpu) \ 721aff3ccd7SMarc Zyngier vcpu_set_flag(vcpu, ON_UNSUPPORTED_CPU) 722583cda1bSAlexandru Elisei 723583cda1bSAlexandru Elisei #define vcpu_clear_on_unsupported_cpu(vcpu) \ 724aff3ccd7SMarc Zyngier vcpu_clear_flag(vcpu, ON_UNSUPPORTED_CPU) 725583cda1bSAlexandru Elisei 726e47c2055SMarc Zyngier #define vcpu_gp_regs(v) (&(v)->arch.ctxt.regs) 7278d404c4cSChristoffer Dall 7288d404c4cSChristoffer Dall /* 7291b422dd7SMarc Zyngier * Only use __vcpu_sys_reg/ctxt_sys_reg if you know you want the 7301b422dd7SMarc Zyngier * memory backed version of a register, and not the one most recently 7311b422dd7SMarc Zyngier * accessed by a running VCPU. For example, for userspace access or 7321b422dd7SMarc Zyngier * for system registers that are never context switched, but only 7331b422dd7SMarc Zyngier * emulated. 7348d404c4cSChristoffer Dall */ 7351b422dd7SMarc Zyngier #define __ctxt_sys_reg(c,r) (&(c)->sys_regs[(r)]) 7361b422dd7SMarc Zyngier 7371b422dd7SMarc Zyngier #define ctxt_sys_reg(c,r) (*__ctxt_sys_reg(c,r)) 7381b422dd7SMarc Zyngier 7391b422dd7SMarc Zyngier #define __vcpu_sys_reg(v,r) (ctxt_sys_reg(&(v)->arch.ctxt, (r))) 7408d404c4cSChristoffer Dall 741da6f1666SChristoffer Dall u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg); 742d47533daSChristoffer Dall void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg); 7438d404c4cSChristoffer Dall 74421c81001SMarc Zyngier static inline bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val) 74521c81001SMarc Zyngier { 74621c81001SMarc Zyngier /* 74721c81001SMarc Zyngier * *** VHE ONLY *** 74821c81001SMarc Zyngier * 74921c81001SMarc Zyngier * System registers listed in the switch are not saved on every 75021c81001SMarc Zyngier * exit from the guest but are only saved on vcpu_put. 75121c81001SMarc Zyngier * 75221c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 75321c81001SMarc Zyngier * should never be listed below, because the guest cannot modify its 75421c81001SMarc Zyngier * own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's 75521c81001SMarc Zyngier * thread when emulating cross-VCPU communication. 75621c81001SMarc Zyngier */ 75721c81001SMarc Zyngier if (!has_vhe()) 75821c81001SMarc Zyngier return false; 75921c81001SMarc Zyngier 76021c81001SMarc Zyngier switch (reg) { 76121c81001SMarc Zyngier case SCTLR_EL1: *val = read_sysreg_s(SYS_SCTLR_EL12); break; 76221c81001SMarc Zyngier case CPACR_EL1: *val = read_sysreg_s(SYS_CPACR_EL12); break; 76321c81001SMarc Zyngier case TTBR0_EL1: *val = read_sysreg_s(SYS_TTBR0_EL12); break; 76421c81001SMarc Zyngier case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); break; 76521c81001SMarc Zyngier case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break; 76621c81001SMarc Zyngier case ESR_EL1: *val = read_sysreg_s(SYS_ESR_EL12); break; 76721c81001SMarc Zyngier case AFSR0_EL1: *val = read_sysreg_s(SYS_AFSR0_EL12); break; 76821c81001SMarc Zyngier case AFSR1_EL1: *val = read_sysreg_s(SYS_AFSR1_EL12); break; 76921c81001SMarc Zyngier case FAR_EL1: *val = read_sysreg_s(SYS_FAR_EL12); break; 77021c81001SMarc Zyngier case MAIR_EL1: *val = read_sysreg_s(SYS_MAIR_EL12); break; 77121c81001SMarc Zyngier case VBAR_EL1: *val = read_sysreg_s(SYS_VBAR_EL12); break; 77221c81001SMarc Zyngier case CONTEXTIDR_EL1: *val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break; 77321c81001SMarc Zyngier case TPIDR_EL0: *val = read_sysreg_s(SYS_TPIDR_EL0); break; 77421c81001SMarc Zyngier case TPIDRRO_EL0: *val = read_sysreg_s(SYS_TPIDRRO_EL0); break; 77521c81001SMarc Zyngier case TPIDR_EL1: *val = read_sysreg_s(SYS_TPIDR_EL1); break; 77621c81001SMarc Zyngier case AMAIR_EL1: *val = read_sysreg_s(SYS_AMAIR_EL12); break; 77721c81001SMarc Zyngier case CNTKCTL_EL1: *val = read_sysreg_s(SYS_CNTKCTL_EL12); break; 77821c81001SMarc Zyngier case ELR_EL1: *val = read_sysreg_s(SYS_ELR_EL12); break; 77921c81001SMarc Zyngier case PAR_EL1: *val = read_sysreg_par(); break; 78021c81001SMarc Zyngier case DACR32_EL2: *val = read_sysreg_s(SYS_DACR32_EL2); break; 78121c81001SMarc Zyngier case IFSR32_EL2: *val = read_sysreg_s(SYS_IFSR32_EL2); break; 78221c81001SMarc Zyngier case DBGVCR32_EL2: *val = read_sysreg_s(SYS_DBGVCR32_EL2); break; 78321c81001SMarc Zyngier default: return false; 78421c81001SMarc Zyngier } 78521c81001SMarc Zyngier 78621c81001SMarc Zyngier return true; 78721c81001SMarc Zyngier } 78821c81001SMarc Zyngier 78921c81001SMarc Zyngier static inline bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg) 79021c81001SMarc Zyngier { 79121c81001SMarc Zyngier /* 79221c81001SMarc Zyngier * *** VHE ONLY *** 79321c81001SMarc Zyngier * 79421c81001SMarc Zyngier * System registers listed in the switch are not restored on every 79521c81001SMarc Zyngier * entry to the guest but are only restored on vcpu_load. 79621c81001SMarc Zyngier * 79721c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 79821c81001SMarc Zyngier * should never be listed below, because the MPIDR should only be set 79921c81001SMarc Zyngier * once, before running the VCPU, and never changed later. 80021c81001SMarc Zyngier */ 80121c81001SMarc Zyngier if (!has_vhe()) 80221c81001SMarc Zyngier return false; 80321c81001SMarc Zyngier 80421c81001SMarc Zyngier switch (reg) { 80521c81001SMarc Zyngier case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break; 80621c81001SMarc Zyngier case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); break; 80721c81001SMarc Zyngier case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); break; 80821c81001SMarc Zyngier case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break; 80921c81001SMarc Zyngier case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; 81021c81001SMarc Zyngier case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); break; 81121c81001SMarc Zyngier case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); break; 81221c81001SMarc Zyngier case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); break; 81321c81001SMarc Zyngier case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); break; 81421c81001SMarc Zyngier case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); break; 81521c81001SMarc Zyngier case VBAR_EL1: write_sysreg_s(val, SYS_VBAR_EL12); break; 81621c81001SMarc Zyngier case CONTEXTIDR_EL1: write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break; 81721c81001SMarc Zyngier case TPIDR_EL0: write_sysreg_s(val, SYS_TPIDR_EL0); break; 81821c81001SMarc Zyngier case TPIDRRO_EL0: write_sysreg_s(val, SYS_TPIDRRO_EL0); break; 81921c81001SMarc Zyngier case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); break; 82021c81001SMarc Zyngier case AMAIR_EL1: write_sysreg_s(val, SYS_AMAIR_EL12); break; 82121c81001SMarc Zyngier case CNTKCTL_EL1: write_sysreg_s(val, SYS_CNTKCTL_EL12); break; 82221c81001SMarc Zyngier case ELR_EL1: write_sysreg_s(val, SYS_ELR_EL12); break; 82321c81001SMarc Zyngier case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); break; 82421c81001SMarc Zyngier case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); break; 82521c81001SMarc Zyngier case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); break; 82621c81001SMarc Zyngier case DBGVCR32_EL2: write_sysreg_s(val, SYS_DBGVCR32_EL2); break; 82721c81001SMarc Zyngier default: return false; 82821c81001SMarc Zyngier } 82921c81001SMarc Zyngier 83021c81001SMarc Zyngier return true; 83121c81001SMarc Zyngier } 83221c81001SMarc Zyngier 8334f8d6632SMarc Zyngier struct kvm_vm_stat { 8340193cc90SJing Zhang struct kvm_vm_stat_generic generic; 8354f8d6632SMarc Zyngier }; 8364f8d6632SMarc Zyngier 8374f8d6632SMarc Zyngier struct kvm_vcpu_stat { 8380193cc90SJing Zhang struct kvm_vcpu_stat_generic generic; 8398a7e75d4SSuraj Jitindar Singh u64 hvc_exit_stat; 840b19e6892SAmit Tomar u64 wfe_exit_stat; 841b19e6892SAmit Tomar u64 wfi_exit_stat; 842b19e6892SAmit Tomar u64 mmio_exit_user; 843b19e6892SAmit Tomar u64 mmio_exit_kernel; 844fe5161d2SOliver Upton u64 signal_exits; 845b19e6892SAmit Tomar u64 exits; 8464f8d6632SMarc Zyngier }; 8474f8d6632SMarc Zyngier 84808e873cbSYueHaibing void kvm_vcpu_preferred_target(struct kvm_vcpu_init *init); 8494f8d6632SMarc Zyngier unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu); 8504f8d6632SMarc Zyngier int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); 8514f8d6632SMarc Zyngier int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 8524f8d6632SMarc Zyngier int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 8536ac4a5acSMarc Zyngier 8546ac4a5acSMarc Zyngier unsigned long kvm_arm_num_sys_reg_descs(struct kvm_vcpu *vcpu); 8556ac4a5acSMarc Zyngier int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices); 8566ac4a5acSMarc Zyngier 857539aee0eSJames Morse int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 858b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 859b7b27facSDongjiu Geng 860539aee0eSJames Morse int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 861b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 8624f8d6632SMarc Zyngier 8634f8d6632SMarc Zyngier #define KVM_ARCH_WANT_MMU_NOTIFIER 8644f8d6632SMarc Zyngier 865b13216cfSChristoffer Dall void kvm_arm_halt_guest(struct kvm *kvm); 866b13216cfSChristoffer Dall void kvm_arm_resume_guest(struct kvm *kvm); 8674f8d6632SMarc Zyngier 868cc5705fbSMarc Zyngier #define vcpu_has_run_once(vcpu) !!rcu_access_pointer((vcpu)->pid) 869cc5705fbSMarc Zyngier 87040a50853SQuentin Perret #ifndef __KVM_NVHE_HYPERVISOR__ 871f50b6f6aSAndrew Scull #define kvm_call_hyp_nvhe(f, ...) \ 872f50b6f6aSAndrew Scull ({ \ 87305469831SAndrew Scull struct arm_smccc_res res; \ 87405469831SAndrew Scull \ 87505469831SAndrew Scull arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(f), \ 87605469831SAndrew Scull ##__VA_ARGS__, &res); \ 87705469831SAndrew Scull WARN_ON(res.a0 != SMCCC_RET_SUCCESS); \ 87805469831SAndrew Scull \ 87905469831SAndrew Scull res.a1; \ 880f50b6f6aSAndrew Scull }) 881f50b6f6aSAndrew Scull 88218fc7bf8SMarc Zyngier /* 88318fc7bf8SMarc Zyngier * The couple of isb() below are there to guarantee the same behaviour 88418fc7bf8SMarc Zyngier * on VHE as on !VHE, where the eret to EL1 acts as a context 88518fc7bf8SMarc Zyngier * synchronization event. 88618fc7bf8SMarc Zyngier */ 88718fc7bf8SMarc Zyngier #define kvm_call_hyp(f, ...) \ 88818fc7bf8SMarc Zyngier do { \ 88918fc7bf8SMarc Zyngier if (has_vhe()) { \ 89018fc7bf8SMarc Zyngier f(__VA_ARGS__); \ 89118fc7bf8SMarc Zyngier isb(); \ 89218fc7bf8SMarc Zyngier } else { \ 893f50b6f6aSAndrew Scull kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 89418fc7bf8SMarc Zyngier } \ 89518fc7bf8SMarc Zyngier } while(0) 89618fc7bf8SMarc Zyngier 89718fc7bf8SMarc Zyngier #define kvm_call_hyp_ret(f, ...) \ 89818fc7bf8SMarc Zyngier ({ \ 89918fc7bf8SMarc Zyngier typeof(f(__VA_ARGS__)) ret; \ 90018fc7bf8SMarc Zyngier \ 90118fc7bf8SMarc Zyngier if (has_vhe()) { \ 90218fc7bf8SMarc Zyngier ret = f(__VA_ARGS__); \ 90318fc7bf8SMarc Zyngier isb(); \ 90418fc7bf8SMarc Zyngier } else { \ 90505469831SAndrew Scull ret = kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 90618fc7bf8SMarc Zyngier } \ 90718fc7bf8SMarc Zyngier \ 90818fc7bf8SMarc Zyngier ret; \ 90918fc7bf8SMarc Zyngier }) 91040a50853SQuentin Perret #else /* __KVM_NVHE_HYPERVISOR__ */ 91140a50853SQuentin Perret #define kvm_call_hyp(f, ...) f(__VA_ARGS__) 91240a50853SQuentin Perret #define kvm_call_hyp_ret(f, ...) f(__VA_ARGS__) 91340a50853SQuentin Perret #define kvm_call_hyp_nvhe(f, ...) f(__VA_ARGS__) 91440a50853SQuentin Perret #endif /* __KVM_NVHE_HYPERVISOR__ */ 91522b39ca3SMarc Zyngier 916cf5d3188SChristoffer Dall void force_vm_exit(const cpumask_t *mask); 9174f8d6632SMarc Zyngier 91874cc7e0cSTianjia Zhang int handle_exit(struct kvm_vcpu *vcpu, int exception_index); 91974cc7e0cSTianjia Zhang void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index); 9204f8d6632SMarc Zyngier 9216ac4a5acSMarc Zyngier int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu); 9226ac4a5acSMarc Zyngier int kvm_handle_cp14_32(struct kvm_vcpu *vcpu); 9236ac4a5acSMarc Zyngier int kvm_handle_cp14_64(struct kvm_vcpu *vcpu); 9246ac4a5acSMarc Zyngier int kvm_handle_cp15_32(struct kvm_vcpu *vcpu); 9256ac4a5acSMarc Zyngier int kvm_handle_cp15_64(struct kvm_vcpu *vcpu); 9266ac4a5acSMarc Zyngier int kvm_handle_sys_reg(struct kvm_vcpu *vcpu); 9279369bc5cSOliver Upton int kvm_handle_cp10_id(struct kvm_vcpu *vcpu); 9286ac4a5acSMarc Zyngier 9296ac4a5acSMarc Zyngier void kvm_reset_sys_regs(struct kvm_vcpu *vcpu); 9306ac4a5acSMarc Zyngier 9318d20bd63SSean Christopherson int __init kvm_sys_reg_table_init(void); 9326ac4a5acSMarc Zyngier 93396906a91SMarc Zyngier bool lock_all_vcpus(struct kvm *kvm); 93496906a91SMarc Zyngier void unlock_all_vcpus(struct kvm *kvm); 93596906a91SMarc Zyngier 9360e20f5e2SMarc Zyngier /* MMIO helpers */ 9370e20f5e2SMarc Zyngier void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data); 9380e20f5e2SMarc Zyngier unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len); 9390e20f5e2SMarc Zyngier 94074cc7e0cSTianjia Zhang int kvm_handle_mmio_return(struct kvm_vcpu *vcpu); 94174cc7e0cSTianjia Zhang int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa); 9420e20f5e2SMarc Zyngier 943e1bfc245SSean Christopherson /* 944e1bfc245SSean Christopherson * Returns true if a Performance Monitoring Interrupt (PMI), a.k.a. perf event, 945e1bfc245SSean Christopherson * arrived in guest context. For arm64, any event that arrives while a vCPU is 946e1bfc245SSean Christopherson * loaded is considered to be "in guest". 947e1bfc245SSean Christopherson */ 948e1bfc245SSean Christopherson static inline bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu) 949e1bfc245SSean Christopherson { 950e1bfc245SSean Christopherson return IS_ENABLED(CONFIG_GUEST_PERF_EVENTS) && !!vcpu; 951e1bfc245SSean Christopherson } 952e1bfc245SSean Christopherson 953b48c1a45SSteven Price long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu); 9548564d637SSteven Price gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu); 9558564d637SSteven Price void kvm_update_stolen_time(struct kvm_vcpu *vcpu); 9568564d637SSteven Price 957004a0124SAndrew Jones bool kvm_arm_pvtime_supported(void); 95858772e9aSSteven Price int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu, 95958772e9aSSteven Price struct kvm_device_attr *attr); 96058772e9aSSteven Price int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu, 96158772e9aSSteven Price struct kvm_device_attr *attr); 96258772e9aSSteven Price int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu, 96358772e9aSSteven Price struct kvm_device_attr *attr); 96458772e9aSSteven Price 9658d20bd63SSean Christopherson extern unsigned int __ro_after_init kvm_arm_vmid_bits; 9668d20bd63SSean Christopherson int __init kvm_arm_vmid_alloc_init(void); 9678d20bd63SSean Christopherson void __init kvm_arm_vmid_alloc_free(void); 96841783839SShameer Kolothum void kvm_arm_vmid_update(struct kvm_vmid *kvm_vmid); 969100b4f09SShameer Kolothum void kvm_arm_vmid_clear_active(void); 97041783839SShameer Kolothum 9718564d637SSteven Price static inline void kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch *vcpu_arch) 9728564d637SSteven Price { 973cecafc0aSYu Zhang vcpu_arch->steal.base = INVALID_GPA; 9748564d637SSteven Price } 9758564d637SSteven Price 9768564d637SSteven Price static inline bool kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch *vcpu_arch) 9778564d637SSteven Price { 978cecafc0aSYu Zhang return (vcpu_arch->steal.base != INVALID_GPA); 9798564d637SSteven Price } 980b48c1a45SSteven Price 981b7b27facSDongjiu Geng void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome); 982b7b27facSDongjiu Geng 9834429fc64SAndre Przywara struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr); 9844429fc64SAndre Przywara 98514ef9d04SMarc Zyngier DECLARE_KVM_HYP_PER_CPU(struct kvm_host_data, kvm_host_data); 9864464e210SChristoffer Dall 9871e0cf16cSMarc Zyngier static inline void kvm_init_host_cpu_context(struct kvm_cpu_context *cpu_ctxt) 98832f13955SMarc Zyngier { 98932f13955SMarc Zyngier /* The host's MPIDR is immutable, so let's set it up at boot time */ 99071071acfSMarc Zyngier ctxt_sys_reg(cpu_ctxt, MPIDR_EL1) = read_cpuid_mpidr(); 99132f13955SMarc Zyngier } 99232f13955SMarc Zyngier 9935bdf3437SJames Morse static inline bool kvm_system_needs_idmapped_vectors(void) 9945bdf3437SJames Morse { 9955bdf3437SJames Morse return cpus_have_const_cap(ARM64_SPECTRE_V3A); 9965bdf3437SJames Morse } 9975bdf3437SJames Morse 998384b40caSMark Rutland void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu); 999384b40caSMark Rutland 10000865e636SRadim Krčmář static inline void kvm_arch_sync_events(struct kvm *kvm) {} 10010865e636SRadim Krčmář static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 10020865e636SRadim Krčmář 100356c7f5e7SAlex Bennée void kvm_arm_init_debug(void); 1004263d6287SAlexandru Elisei void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu); 100556c7f5e7SAlex Bennée void kvm_arm_setup_debug(struct kvm_vcpu *vcpu); 100656c7f5e7SAlex Bennée void kvm_arm_clear_debug(struct kvm_vcpu *vcpu); 100784e690bfSAlex Bennée void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu); 10087dabf02fSOliver Upton 10097dabf02fSOliver Upton #define kvm_vcpu_os_lock_enabled(vcpu) \ 10107dabf02fSOliver Upton (!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & SYS_OSLSR_OSLK)) 10117dabf02fSOliver Upton 1012bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, 1013bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 1014bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, 1015bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 1016bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu, 1017bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 101856c7f5e7SAlex Bennée 1019f0376edbSSteven Price long kvm_vm_ioctl_mte_copy_tags(struct kvm *kvm, 1020f0376edbSSteven Price struct kvm_arm_copy_mte_tags *copy_tags); 102130ec7997SMarc Zyngier int kvm_vm_ioctl_set_counter_offset(struct kvm *kvm, 102230ec7997SMarc Zyngier struct kvm_arm_counter_offset *offset); 1023f0376edbSSteven Price 1024e6b673b7SDave Martin /* Guest/host FPSIMD coordination helpers */ 1025e6b673b7SDave Martin int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu); 1026e6b673b7SDave Martin void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu); 1027af9a0e21SMarc Zyngier void kvm_arch_vcpu_ctxflush_fp(struct kvm_vcpu *vcpu); 1028e6b673b7SDave Martin void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu); 1029e6b673b7SDave Martin void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu); 103052b28657SQuentin Perret void kvm_vcpu_unshare_task_fp(struct kvm_vcpu *vcpu); 1031e6b673b7SDave Martin 1032eb41238cSAndrew Murray static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr) 1033eb41238cSAndrew Murray { 1034435e53fbSAndrew Murray return (!has_vhe() && attr->exclude_host); 1035eb41238cSAndrew Murray } 1036eb41238cSAndrew Murray 1037d2602bb4SSuzuki K Poulose /* Flags for host debug state */ 1038d2602bb4SSuzuki K Poulose void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu); 1039d2602bb4SSuzuki K Poulose void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu); 1040d2602bb4SSuzuki K Poulose 1041052f064dSMarc Zyngier #ifdef CONFIG_KVM 1042eb41238cSAndrew Murray void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr); 1043eb41238cSAndrew Murray void kvm_clr_pmu_events(u32 clr); 1044eb41238cSAndrew Murray #else 1045eb41238cSAndrew Murray static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {} 1046eb41238cSAndrew Murray static inline void kvm_clr_pmu_events(u32 clr) {} 1047e6b673b7SDave Martin #endif 104817eed27bSDave Martin 104913aeb9b4SDavid Brazdil void kvm_vcpu_load_sysregs_vhe(struct kvm_vcpu *vcpu); 105013aeb9b4SDavid Brazdil void kvm_vcpu_put_sysregs_vhe(struct kvm_vcpu *vcpu); 1051bc192ceeSChristoffer Dall 10528d20bd63SSean Christopherson int __init kvm_set_ipa_limit(void); 10530f62f0e9SSuzuki K Poulose 1054d1e5b0e9SMarc Orr #define __KVM_HAVE_ARCH_VM_ALLOC 1055d1e5b0e9SMarc Orr struct kvm *kvm_arch_alloc_vm(void); 1056d1e5b0e9SMarc Orr 10572ea7f655SFuad Tabba static inline bool kvm_vm_is_protected(struct kvm *kvm) 10582ea7f655SFuad Tabba { 10592ea7f655SFuad Tabba return false; 10602ea7f655SFuad Tabba } 10612ea7f655SFuad Tabba 10622a0c3433SFuad Tabba void kvm_init_protected_traps(struct kvm_vcpu *vcpu); 10632a0c3433SFuad Tabba 106492e68b2bSDave Martin int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature); 10659033bba4SDave Martin bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu); 10669033bba4SDave Martin 10674c0680d3SMarc Zyngier #define kvm_arm_vcpu_sve_finalized(vcpu) vcpu_get_flag(vcpu, VCPU_SVE_FINALIZED) 10687dd32a0dSDave Martin 106906394531SMarc Zyngier #define kvm_has_mte(kvm) \ 107006394531SMarc Zyngier (system_supports_mte() && \ 107106394531SMarc Zyngier test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &(kvm)->arch.flags)) 107214bda7a9SMarc Zyngier 1073f3c6efc7SOliver Upton #define kvm_supports_32bit_el0() \ 1074f3c6efc7SOliver Upton (system_supports_32bit_el0() && \ 1075f3c6efc7SOliver Upton !static_branch_unlikely(&arm64_mismatched_32bit_el0)) 1076f3c6efc7SOliver Upton 1077a8e190cdSArd Biesheuvel int kvm_trng_call(struct kvm_vcpu *vcpu); 1078f320bc74SQuentin Perret #ifdef CONFIG_KVM 1079f320bc74SQuentin Perret extern phys_addr_t hyp_mem_base; 1080f320bc74SQuentin Perret extern phys_addr_t hyp_mem_size; 1081f320bc74SQuentin Perret void __init kvm_hyp_reserve(void); 1082f320bc74SQuentin Perret #else 1083f320bc74SQuentin Perret static inline void kvm_hyp_reserve(void) { } 1084f320bc74SQuentin Perret #endif 1085a8e190cdSArd Biesheuvel 10861e579429SOliver Upton void kvm_arm_vcpu_power_off(struct kvm_vcpu *vcpu); 1087b171f9bbSOliver Upton bool kvm_arm_vcpu_stopped(struct kvm_vcpu *vcpu); 10881e579429SOliver Upton 10894f8d6632SMarc Zyngier #endif /* __ARM64_KVM_HOST_H__ */ 1090