1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 24f8d6632SMarc Zyngier /* 34f8d6632SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 44f8d6632SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 54f8d6632SMarc Zyngier * 64f8d6632SMarc Zyngier * Derived from arch/arm/include/asm/kvm_host.h: 74f8d6632SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 84f8d6632SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 94f8d6632SMarc Zyngier */ 104f8d6632SMarc Zyngier 114f8d6632SMarc Zyngier #ifndef __ARM64_KVM_HOST_H__ 124f8d6632SMarc Zyngier #define __ARM64_KVM_HOST_H__ 134f8d6632SMarc Zyngier 1405469831SAndrew Scull #include <linux/arm-smccc.h> 153f61f409SDave Martin #include <linux/bitmap.h> 1665647300SPaolo Bonzini #include <linux/types.h> 173f61f409SDave Martin #include <linux/jump_label.h> 1865647300SPaolo Bonzini #include <linux/kvm_types.h> 193f61f409SDave Martin #include <linux/percpu.h> 20ff367fe4SDavid Brazdil #include <linux/psci.h> 2185738e05SJulien Thierry #include <asm/arch_gicv3.h> 223f61f409SDave Martin #include <asm/barrier.h> 2363a1e1c9SMark Rutland #include <asm/cpufeature.h> 241e0cf16cSMarc Zyngier #include <asm/cputype.h> 254f5abad9SJames Morse #include <asm/daifflags.h> 2617eed27bSDave Martin #include <asm/fpsimd.h> 274f8d6632SMarc Zyngier #include <asm/kvm.h> 283a3604bcSMarc Zyngier #include <asm/kvm_asm.h> 294f8d6632SMarc Zyngier 30c1426e4cSEric Auger #define __KVM_HAVE_ARCH_INTC_INITIALIZED 31c1426e4cSEric Auger 32920552b2SDavid Hildenbrand #define KVM_HALT_POLL_NS_DEFAULT 500000 334f8d6632SMarc Zyngier 344f8d6632SMarc Zyngier #include <kvm/arm_vgic.h> 354f8d6632SMarc Zyngier #include <kvm/arm_arch_timer.h> 3604fe4726SShannon Zhao #include <kvm/arm_pmu.h> 374f8d6632SMarc Zyngier 38ef748917SMing Lei #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS 39ef748917SMing Lei 40a22fa321SAmit Daniel Kachhap #define KVM_VCPU_MAX_FEATURES 7 414f8d6632SMarc Zyngier 427b244e2bSAndrew Jones #define KVM_REQ_SLEEP \ 432387149eSAndrew Jones KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 44325f9c64SAndrew Jones #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) 45358b28f0SMarc Zyngier #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2) 468564d637SSteven Price #define KVM_REQ_RECORD_STEAL KVM_ARCH_REQ(3) 47d9c3872cSMarc Zyngier #define KVM_REQ_RELOAD_GICv4 KVM_ARCH_REQ(4) 48d0c94c49SMarc Zyngier #define KVM_REQ_RELOAD_PMU KVM_ARCH_REQ(5) 49*7b33a09dSOliver Upton #define KVM_REQ_SUSPEND KVM_ARCH_REQ(6) 50b13216cfSChristoffer Dall 51c862626eSKeqian Zhu #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 52c862626eSKeqian Zhu KVM_DIRTY_LOG_INITIALLY_SET) 53c862626eSKeqian Zhu 54fcc5bf89SJing Zhang #define KVM_HAVE_MMU_RWLOCK 55fcc5bf89SJing Zhang 56d8b369c4SDavid Brazdil /* 57d8b369c4SDavid Brazdil * Mode of operation configurable with kvm-arm.mode early param. 58d8b369c4SDavid Brazdil * See Documentation/admin-guide/kernel-parameters.txt for more information. 59d8b369c4SDavid Brazdil */ 60d8b369c4SDavid Brazdil enum kvm_mode { 61d8b369c4SDavid Brazdil KVM_MODE_DEFAULT, 62d8b369c4SDavid Brazdil KVM_MODE_PROTECTED, 63b6a68b97SMarc Zyngier KVM_MODE_NONE, 64d8b369c4SDavid Brazdil }; 653eb681fbSDavid Brazdil enum kvm_mode kvm_get_mode(void); 66d8b369c4SDavid Brazdil 6761bbe380SChristoffer Dall DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 6861bbe380SChristoffer Dall 699033bba4SDave Martin extern unsigned int kvm_sve_max_vl; 70a3be836dSDave Martin int kvm_arm_init_sve(void); 710f062bfeSDave Martin 726b7982feSAnshuman Khandual u32 __attribute_const__ kvm_target_cpu(void); 734f8d6632SMarc Zyngier int kvm_reset_vcpu(struct kvm_vcpu *vcpu); 7419bcc89eSSean Christopherson void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu); 754f8d6632SMarc Zyngier 76e329fb75SChristoffer Dall struct kvm_vmid { 773248136bSJulien Grall atomic64_t id; 78e329fb75SChristoffer Dall }; 79e329fb75SChristoffer Dall 80a0e50aa3SChristoffer Dall struct kvm_s2_mmu { 81e329fb75SChristoffer Dall struct kvm_vmid vmid; 824f8d6632SMarc Zyngier 83a0e50aa3SChristoffer Dall /* 84a0e50aa3SChristoffer Dall * stage2 entry level table 85a0e50aa3SChristoffer Dall * 86a0e50aa3SChristoffer Dall * Two kvm_s2_mmu structures in the same VM can point to the same 87a0e50aa3SChristoffer Dall * pgd here. This happens when running a guest using a 88a0e50aa3SChristoffer Dall * translation regime that isn't affected by its own stage-2 89a0e50aa3SChristoffer Dall * translation, such as a non-VHE hypervisor running at vEL2, or 90a0e50aa3SChristoffer Dall * for vEL1/EL0 with vHCR_EL2.VM == 0. In that case, we use the 91a0e50aa3SChristoffer Dall * canonical stage-2 page tables. 92a0e50aa3SChristoffer Dall */ 93e329fb75SChristoffer Dall phys_addr_t pgd_phys; 9471233d05SWill Deacon struct kvm_pgtable *pgt; 954f8d6632SMarc Zyngier 9694d0e598SMarc Zyngier /* The last vcpu id that ran on each physical CPU */ 9794d0e598SMarc Zyngier int __percpu *last_vcpu_ran; 9894d0e598SMarc Zyngier 99cfb1a98dSQuentin Perret struct kvm_arch *arch; 100a0e50aa3SChristoffer Dall }; 101a0e50aa3SChristoffer Dall 1028d14797bSWill Deacon struct kvm_arch_memory_slot { 1038d14797bSWill Deacon }; 1048d14797bSWill Deacon 105a0e50aa3SChristoffer Dall struct kvm_arch { 106a0e50aa3SChristoffer Dall struct kvm_s2_mmu mmu; 107a0e50aa3SChristoffer Dall 108a0e50aa3SChristoffer Dall /* VTCR_EL2 value for this VM */ 109a0e50aa3SChristoffer Dall u64 vtcr; 110a0e50aa3SChristoffer Dall 1113caa2d8cSAndre Przywara /* The maximum number of vCPUs depends on the used GIC model */ 1123caa2d8cSAndre Przywara int max_vcpus; 1133caa2d8cSAndre Przywara 1144f8d6632SMarc Zyngier /* Interrupt controller */ 1154f8d6632SMarc Zyngier struct vgic_dist vgic; 11685bd0ba1SMarc Zyngier 11785bd0ba1SMarc Zyngier /* Mandated version of PSCI */ 11885bd0ba1SMarc Zyngier u32 psci_version; 119c726200dSChristoffer Dall 120c726200dSChristoffer Dall /* 121c726200dSChristoffer Dall * If we encounter a data abort without valid instruction syndrome 122c726200dSChristoffer Dall * information, report this to user space. User space can (and 123c726200dSChristoffer Dall * should) opt in to this feature if KVM_CAP_ARM_NISV_TO_USER is 124c726200dSChristoffer Dall * supported. 125c726200dSChristoffer Dall */ 12606394531SMarc Zyngier #define KVM_ARCH_FLAG_RETURN_NISV_IO_ABORT_TO_USER 0 12706394531SMarc Zyngier /* Memory Tagging Extension enabled for the guest */ 12806394531SMarc Zyngier #define KVM_ARCH_FLAG_MTE_ENABLED 1 12906394531SMarc Zyngier /* At least one vCPU has ran in the VM */ 13006394531SMarc Zyngier #define KVM_ARCH_FLAG_HAS_RAN_ONCE 2 13126bf74bdSReiji Watanabe /* 13226bf74bdSReiji Watanabe * The following two bits are used to indicate the guest's EL1 13326bf74bdSReiji Watanabe * register width configuration. A value of KVM_ARCH_FLAG_EL1_32BIT 13426bf74bdSReiji Watanabe * bit is valid only when KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED is set. 13526bf74bdSReiji Watanabe * Otherwise, the guest's EL1 register width has not yet been 13626bf74bdSReiji Watanabe * determined yet. 13726bf74bdSReiji Watanabe */ 13826bf74bdSReiji Watanabe #define KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED 3 13926bf74bdSReiji Watanabe #define KVM_ARCH_FLAG_EL1_32BIT 4 14026bf74bdSReiji Watanabe 14106394531SMarc Zyngier unsigned long flags; 142fd65a3b5SMarc Zyngier 143d7eec236SMarc Zyngier /* 144d7eec236SMarc Zyngier * VM-wide PMU filter, implemented as a bitmap and big enough for 145d7eec236SMarc Zyngier * up to 2^10 events (ARMv8.0) or 2^16 events (ARMv8.1+). 146d7eec236SMarc Zyngier */ 147d7eec236SMarc Zyngier unsigned long *pmu_filter; 14846b18782SMarc Zyngier struct arm_pmu *arm_pmu; 14923711a5eSMarc Zyngier 150583cda1bSAlexandru Elisei cpumask_var_t supported_cpus; 15123711a5eSMarc Zyngier 15223711a5eSMarc Zyngier u8 pfr0_csv2; 1534f1df628SMarc Zyngier u8 pfr0_csv3; 1544f8d6632SMarc Zyngier }; 1554f8d6632SMarc Zyngier 1564f8d6632SMarc Zyngier struct kvm_vcpu_fault_info { 1574f8d6632SMarc Zyngier u32 esr_el2; /* Hyp Syndrom Register */ 1584f8d6632SMarc Zyngier u64 far_el2; /* Hyp Fault Address Register */ 1594f8d6632SMarc Zyngier u64 hpfar_el2; /* Hyp IPA Fault Address Register */ 1600067df41SJames Morse u64 disr_el1; /* Deferred [SError] Status Register */ 1614f8d6632SMarc Zyngier }; 1624f8d6632SMarc Zyngier 1639d8415d6SMarc Zyngier enum vcpu_sysreg { 1648f7f4fe7SMarc Zyngier __INVALID_SYSREG__, /* 0 is reserved as an invalid value */ 1659d8415d6SMarc Zyngier MPIDR_EL1, /* MultiProcessor Affinity Register */ 1669d8415d6SMarc Zyngier CSSELR_EL1, /* Cache Size Selection Register */ 1679d8415d6SMarc Zyngier SCTLR_EL1, /* System Control Register */ 1689d8415d6SMarc Zyngier ACTLR_EL1, /* Auxiliary Control Register */ 1699d8415d6SMarc Zyngier CPACR_EL1, /* Coprocessor Access Control */ 17073433762SDave Martin ZCR_EL1, /* SVE Control */ 1719d8415d6SMarc Zyngier TTBR0_EL1, /* Translation Table Base Register 0 */ 1729d8415d6SMarc Zyngier TTBR1_EL1, /* Translation Table Base Register 1 */ 1739d8415d6SMarc Zyngier TCR_EL1, /* Translation Control Register */ 1749d8415d6SMarc Zyngier ESR_EL1, /* Exception Syndrome Register */ 175ef769e32SAdam Buchbinder AFSR0_EL1, /* Auxiliary Fault Status Register 0 */ 176ef769e32SAdam Buchbinder AFSR1_EL1, /* Auxiliary Fault Status Register 1 */ 1779d8415d6SMarc Zyngier FAR_EL1, /* Fault Address Register */ 1789d8415d6SMarc Zyngier MAIR_EL1, /* Memory Attribute Indirection Register */ 1799d8415d6SMarc Zyngier VBAR_EL1, /* Vector Base Address Register */ 1809d8415d6SMarc Zyngier CONTEXTIDR_EL1, /* Context ID Register */ 1819d8415d6SMarc Zyngier TPIDR_EL0, /* Thread ID, User R/W */ 1829d8415d6SMarc Zyngier TPIDRRO_EL0, /* Thread ID, User R/O */ 1839d8415d6SMarc Zyngier TPIDR_EL1, /* Thread ID, Privileged */ 1849d8415d6SMarc Zyngier AMAIR_EL1, /* Aux Memory Attribute Indirection Register */ 1859d8415d6SMarc Zyngier CNTKCTL_EL1, /* Timer Control Register (EL1) */ 1869d8415d6SMarc Zyngier PAR_EL1, /* Physical Address Register */ 1879d8415d6SMarc Zyngier MDSCR_EL1, /* Monitor Debug System Control Register */ 1889d8415d6SMarc Zyngier MDCCINT_EL1, /* Monitor Debug Comms Channel Interrupt Enable Reg */ 189d42e2671SOliver Upton OSLSR_EL1, /* OS Lock Status Register */ 190c773ae2bSJames Morse DISR_EL1, /* Deferred Interrupt Status Register */ 1919d8415d6SMarc Zyngier 192ab946834SShannon Zhao /* Performance Monitors Registers */ 193ab946834SShannon Zhao PMCR_EL0, /* Control Register */ 1943965c3ceSShannon Zhao PMSELR_EL0, /* Event Counter Selection Register */ 195051ff581SShannon Zhao PMEVCNTR0_EL0, /* Event Counter Register (0-30) */ 196051ff581SShannon Zhao PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30, 197051ff581SShannon Zhao PMCCNTR_EL0, /* Cycle Counter Register */ 1989feb21acSShannon Zhao PMEVTYPER0_EL0, /* Event Type Register (0-30) */ 1999feb21acSShannon Zhao PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30, 2009feb21acSShannon Zhao PMCCFILTR_EL0, /* Cycle Count Filter Register */ 20196b0eebcSShannon Zhao PMCNTENSET_EL0, /* Count Enable Set Register */ 2029db52c78SShannon Zhao PMINTENSET_EL1, /* Interrupt Enable Set Register */ 20376d883c4SShannon Zhao PMOVSSET_EL0, /* Overflow Flag Status Set Register */ 204d692b8adSShannon Zhao PMUSERENR_EL0, /* User Enable Register */ 205ab946834SShannon Zhao 206384b40caSMark Rutland /* Pointer Authentication Registers in a strict increasing order. */ 207384b40caSMark Rutland APIAKEYLO_EL1, 208384b40caSMark Rutland APIAKEYHI_EL1, 209384b40caSMark Rutland APIBKEYLO_EL1, 210384b40caSMark Rutland APIBKEYHI_EL1, 211384b40caSMark Rutland APDAKEYLO_EL1, 212384b40caSMark Rutland APDAKEYHI_EL1, 213384b40caSMark Rutland APDBKEYLO_EL1, 214384b40caSMark Rutland APDBKEYHI_EL1, 215384b40caSMark Rutland APGAKEYLO_EL1, 216384b40caSMark Rutland APGAKEYHI_EL1, 217384b40caSMark Rutland 21898909e6dSMarc Zyngier ELR_EL1, 2191bded23eSMarc Zyngier SP_EL1, 220710f1982SMarc Zyngier SPSR_EL1, 22198909e6dSMarc Zyngier 22241ce82f6SMarc Zyngier CNTVOFF_EL2, 22341ce82f6SMarc Zyngier CNTV_CVAL_EL0, 22441ce82f6SMarc Zyngier CNTV_CTL_EL0, 22541ce82f6SMarc Zyngier CNTP_CVAL_EL0, 22641ce82f6SMarc Zyngier CNTP_CTL_EL0, 22741ce82f6SMarc Zyngier 228e1f358b5SSteven Price /* Memory Tagging Extension registers */ 229e1f358b5SSteven Price RGSR_EL1, /* Random Allocation Tag Seed Register */ 230e1f358b5SSteven Price GCR_EL1, /* Tag Control Register */ 231e1f358b5SSteven Price TFSR_EL1, /* Tag Fault Status Register (EL1) */ 232e1f358b5SSteven Price TFSRE0_EL1, /* Tag Fault Status Register (EL0) */ 233e1f358b5SSteven Price 2349d8415d6SMarc Zyngier /* 32bit specific registers. Keep them at the end of the range */ 2359d8415d6SMarc Zyngier DACR32_EL2, /* Domain Access Control Register */ 2369d8415d6SMarc Zyngier IFSR32_EL2, /* Instruction Fault Status Register */ 2379d8415d6SMarc Zyngier FPEXC32_EL2, /* Floating-Point Exception Control Register */ 2389d8415d6SMarc Zyngier DBGVCR32_EL2, /* Debug Vector Catch Register */ 2399d8415d6SMarc Zyngier 2409d8415d6SMarc Zyngier NR_SYS_REGS /* Nothing after this line! */ 2419d8415d6SMarc Zyngier }; 2429d8415d6SMarc Zyngier 2434f8d6632SMarc Zyngier struct kvm_cpu_context { 244e47c2055SMarc Zyngier struct user_pt_regs regs; /* sp = sp_el0 */ 245e47c2055SMarc Zyngier 246fd85b667SMarc Zyngier u64 spsr_abt; 247fd85b667SMarc Zyngier u64 spsr_und; 248fd85b667SMarc Zyngier u64 spsr_irq; 249fd85b667SMarc Zyngier u64 spsr_fiq; 250e47c2055SMarc Zyngier 251e47c2055SMarc Zyngier struct user_fpsimd_state fp_regs; 252e47c2055SMarc Zyngier 2534f8d6632SMarc Zyngier u64 sys_regs[NR_SYS_REGS]; 254c97e166eSJames Morse 255c97e166eSJames Morse struct kvm_vcpu *__hyp_running_vcpu; 2564f8d6632SMarc Zyngier }; 2574f8d6632SMarc Zyngier 258eb41238cSAndrew Murray struct kvm_pmu_events { 259eb41238cSAndrew Murray u32 events_host; 260eb41238cSAndrew Murray u32 events_guest; 261eb41238cSAndrew Murray }; 262eb41238cSAndrew Murray 263630a1685SAndrew Murray struct kvm_host_data { 264630a1685SAndrew Murray struct kvm_cpu_context host_ctxt; 265eb41238cSAndrew Murray struct kvm_pmu_events pmu_events; 266630a1685SAndrew Murray }; 267630a1685SAndrew Murray 268ff367fe4SDavid Brazdil struct kvm_host_psci_config { 269ff367fe4SDavid Brazdil /* PSCI version used by host. */ 270ff367fe4SDavid Brazdil u32 version; 271ff367fe4SDavid Brazdil 272ff367fe4SDavid Brazdil /* Function IDs used by host if version is v0.1. */ 273ff367fe4SDavid Brazdil struct psci_0_1_function_ids function_ids_0_1; 274ff367fe4SDavid Brazdil 275767c973fSMarc Zyngier bool psci_0_1_cpu_suspend_implemented; 276767c973fSMarc Zyngier bool psci_0_1_cpu_on_implemented; 277767c973fSMarc Zyngier bool psci_0_1_cpu_off_implemented; 278767c973fSMarc Zyngier bool psci_0_1_migrate_implemented; 279ff367fe4SDavid Brazdil }; 280ff367fe4SDavid Brazdil 281ff367fe4SDavid Brazdil extern struct kvm_host_psci_config kvm_nvhe_sym(kvm_host_psci_config); 282ff367fe4SDavid Brazdil #define kvm_host_psci_config CHOOSE_NVHE_SYM(kvm_host_psci_config) 283ff367fe4SDavid Brazdil 28461fe0c37SDavid Brazdil extern s64 kvm_nvhe_sym(hyp_physvirt_offset); 28561fe0c37SDavid Brazdil #define hyp_physvirt_offset CHOOSE_NVHE_SYM(hyp_physvirt_offset) 28661fe0c37SDavid Brazdil 28761fe0c37SDavid Brazdil extern u64 kvm_nvhe_sym(hyp_cpu_logical_map)[NR_CPUS]; 28861fe0c37SDavid Brazdil #define hyp_cpu_logical_map CHOOSE_NVHE_SYM(hyp_cpu_logical_map) 28961fe0c37SDavid Brazdil 290358b28f0SMarc Zyngier struct vcpu_reset_state { 291358b28f0SMarc Zyngier unsigned long pc; 292358b28f0SMarc Zyngier unsigned long r0; 293358b28f0SMarc Zyngier bool be; 294358b28f0SMarc Zyngier bool reset; 295358b28f0SMarc Zyngier }; 296358b28f0SMarc Zyngier 2974f8d6632SMarc Zyngier struct kvm_vcpu_arch { 2984f8d6632SMarc Zyngier struct kvm_cpu_context ctxt; 299b43b5dd9SDave Martin void *sve_state; 300b43b5dd9SDave Martin unsigned int sve_max_vl; 3014f8d6632SMarc Zyngier 302a0e50aa3SChristoffer Dall /* Stage 2 paging state used by the hardware on next switch */ 303a0e50aa3SChristoffer Dall struct kvm_s2_mmu *hw_mmu; 304a0e50aa3SChristoffer Dall 3051460b4b2SFuad Tabba /* Values of trap registers for the guest. */ 3064f8d6632SMarc Zyngier u64 hcr_el2; 307d6c850ddSFuad Tabba u64 mdcr_el2; 308cd496228SFuad Tabba u64 cptr_el2; 3094f8d6632SMarc Zyngier 3101460b4b2SFuad Tabba /* Values of trap registers for the host before guest entry. */ 3111460b4b2SFuad Tabba u64 mdcr_el2_host; 3124f8d6632SMarc Zyngier 3134f8d6632SMarc Zyngier /* Exception Information */ 3144f8d6632SMarc Zyngier struct kvm_vcpu_fault_info fault; 3154f8d6632SMarc Zyngier 316fa89d31cSDave Martin /* Miscellaneous vcpu state flags */ 317fa89d31cSDave Martin u64 flags; 3180c557ed4SMarc Zyngier 31984e690bfSAlex Bennée /* 32084e690bfSAlex Bennée * We maintain more than a single set of debug registers to support 32184e690bfSAlex Bennée * debugging the guest from the host and to maintain separate host and 32284e690bfSAlex Bennée * guest state during world switches. vcpu_debug_state are the debug 32384e690bfSAlex Bennée * registers of the vcpu as the guest sees them. host_debug_state are 324834bf887SAlex Bennée * the host registers which are saved and restored during 325834bf887SAlex Bennée * world switches. external_debug_state contains the debug 326834bf887SAlex Bennée * values we want to debug the guest. This is set via the 327834bf887SAlex Bennée * KVM_SET_GUEST_DEBUG ioctl. 32884e690bfSAlex Bennée * 32984e690bfSAlex Bennée * debug_ptr points to the set of debug registers that should be loaded 33084e690bfSAlex Bennée * onto the hardware when running the guest. 33184e690bfSAlex Bennée */ 33284e690bfSAlex Bennée struct kvm_guest_debug_arch *debug_ptr; 33384e690bfSAlex Bennée struct kvm_guest_debug_arch vcpu_debug_state; 334834bf887SAlex Bennée struct kvm_guest_debug_arch external_debug_state; 33584e690bfSAlex Bennée 336e6b673b7SDave Martin struct user_fpsimd_state *host_fpsimd_state; /* hyp VA */ 33752b28657SQuentin Perret struct task_struct *parent_task; 338e6b673b7SDave Martin 339f85279b4SWill Deacon struct { 340f85279b4SWill Deacon /* {Break,watch}point registers */ 341f85279b4SWill Deacon struct kvm_guest_debug_arch regs; 342f85279b4SWill Deacon /* Statistical profiling extension */ 343f85279b4SWill Deacon u64 pmscr_el1; 344a1319260SSuzuki K Poulose /* Self-hosted trace */ 345a1319260SSuzuki K Poulose u64 trfcr_el1; 346f85279b4SWill Deacon } host_debug_state; 3474f8d6632SMarc Zyngier 3484f8d6632SMarc Zyngier /* VGIC state */ 3494f8d6632SMarc Zyngier struct vgic_cpu vgic_cpu; 3504f8d6632SMarc Zyngier struct arch_timer_cpu timer_cpu; 35104fe4726SShannon Zhao struct kvm_pmu pmu; 3524f8d6632SMarc Zyngier 3534f8d6632SMarc Zyngier /* 3544f8d6632SMarc Zyngier * Anything that is not used directly from assembly code goes 3554f8d6632SMarc Zyngier * here. 3564f8d6632SMarc Zyngier */ 3574f8d6632SMarc Zyngier 358337b99bfSAlex Bennée /* 359337b99bfSAlex Bennée * Guest registers we preserve during guest debugging. 360337b99bfSAlex Bennée * 361337b99bfSAlex Bennée * These shadow registers are updated by the kvm_handle_sys_reg 362337b99bfSAlex Bennée * trap handler if the guest accesses or updates them while we 363337b99bfSAlex Bennée * are using guest debug. 364337b99bfSAlex Bennée */ 365337b99bfSAlex Bennée struct { 366337b99bfSAlex Bennée u32 mdscr_el1; 367337b99bfSAlex Bennée } guest_debug_preserved; 368337b99bfSAlex Bennée 369b171f9bbSOliver Upton /* vcpu power state */ 370b171f9bbSOliver Upton struct kvm_mp_state mp_state; 3714f8d6632SMarc Zyngier 3723b92830aSEric Auger /* Don't run the guest (internal implementation need) */ 3733b92830aSEric Auger bool pause; 3743b92830aSEric Auger 3754f8d6632SMarc Zyngier /* Cache some mmu pages needed inside spinlock regions */ 3764f8d6632SMarc Zyngier struct kvm_mmu_memory_cache mmu_page_cache; 3774f8d6632SMarc Zyngier 3784f8d6632SMarc Zyngier /* Target CPU and feature flags */ 3796c8c0c4dSChen Gang int target; 3804f8d6632SMarc Zyngier DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES); 3814f8d6632SMarc Zyngier 3824715c14bSJames Morse /* Virtual SError ESR to restore when HCR_EL2.VSE is set */ 3834715c14bSJames Morse u64 vsesr_el2; 384d47533daSChristoffer Dall 385358b28f0SMarc Zyngier /* Additional reset state */ 386358b28f0SMarc Zyngier struct vcpu_reset_state reset_state; 387358b28f0SMarc Zyngier 388d47533daSChristoffer Dall /* True when deferrable sysregs are loaded on the physical CPU, 38913aeb9b4SDavid Brazdil * see kvm_vcpu_load_sysregs_vhe and kvm_vcpu_put_sysregs_vhe. */ 390d47533daSChristoffer Dall bool sysregs_loaded_on_cpu; 3918564d637SSteven Price 3928564d637SSteven Price /* Guest PV state */ 3938564d637SSteven Price struct { 3948564d637SSteven Price u64 last_steal; 3958564d637SSteven Price gpa_t base; 3968564d637SSteven Price } steal; 3974f8d6632SMarc Zyngier }; 3984f8d6632SMarc Zyngier 399b43b5dd9SDave Martin /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ 400985d3a1bSMarc Zyngier #define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) + \ 401985d3a1bSMarc Zyngier sve_ffr_offset((vcpu)->arch.sve_max_vl)) 402b43b5dd9SDave Martin 403468f3477SMarc Zyngier #define vcpu_sve_max_vq(vcpu) sve_vq_from_vl((vcpu)->arch.sve_max_vl) 404b3eb56b6SDave Martin 405e1c9c983SDave Martin #define vcpu_sve_state_size(vcpu) ({ \ 406e1c9c983SDave Martin size_t __size_ret; \ 407e1c9c983SDave Martin unsigned int __vcpu_vq; \ 408e1c9c983SDave Martin \ 409e1c9c983SDave Martin if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) { \ 410e1c9c983SDave Martin __size_ret = 0; \ 411e1c9c983SDave Martin } else { \ 412468f3477SMarc Zyngier __vcpu_vq = vcpu_sve_max_vq(vcpu); \ 413e1c9c983SDave Martin __size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq); \ 414e1c9c983SDave Martin } \ 415e1c9c983SDave Martin \ 416e1c9c983SDave Martin __size_ret; \ 417e1c9c983SDave Martin }) 418e1c9c983SDave Martin 419fa89d31cSDave Martin /* vcpu_arch flags field values: */ 420fa89d31cSDave Martin #define KVM_ARM64_DEBUG_DIRTY (1 << 0) 421e6b673b7SDave Martin #define KVM_ARM64_FP_ENABLED (1 << 1) /* guest FP regs loaded */ 422e6b673b7SDave Martin #define KVM_ARM64_FP_HOST (1 << 2) /* host FP regs loaded */ 423fa89d31cSDave Martin #define KVM_ARM64_HOST_SVE_ENABLED (1 << 4) /* SVE enabled for EL0 */ 4241765edbaSDave Martin #define KVM_ARM64_GUEST_HAS_SVE (1 << 5) /* SVE exposed to guest */ 4259033bba4SDave Martin #define KVM_ARM64_VCPU_SVE_FINALIZED (1 << 6) /* SVE config completed */ 426b890d75cSAmit Daniel Kachhap #define KVM_ARM64_GUEST_HAS_PTRAUTH (1 << 7) /* PTRAUTH exposed to guest */ 427e650b64fSMarc Zyngier #define KVM_ARM64_PENDING_EXCEPTION (1 << 8) /* Exception pending */ 428892fd259SMarc Zyngier /* 429892fd259SMarc Zyngier * Overlaps with KVM_ARM64_EXCEPT_MASK on purpose so that it can't be 430892fd259SMarc Zyngier * set together with an exception... 431892fd259SMarc Zyngier */ 432892fd259SMarc Zyngier #define KVM_ARM64_INCREMENT_PC (1 << 9) /* Increment PC */ 433e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_MASK (7 << 9) /* Target EL/MODE */ 434e650b64fSMarc Zyngier /* 435e650b64fSMarc Zyngier * When KVM_ARM64_PENDING_EXCEPTION is set, KVM_ARM64_EXCEPT_MASK can 436e650b64fSMarc Zyngier * take the following values: 437e650b64fSMarc Zyngier * 438e650b64fSMarc Zyngier * For AArch32 EL1: 439e650b64fSMarc Zyngier */ 440e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA32_UND (0 << 9) 441e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA32_IABT (1 << 9) 442e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA32_DABT (2 << 9) 443e650b64fSMarc Zyngier /* For AArch64: */ 444e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_SYNC (0 << 9) 445e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_IRQ (1 << 9) 446e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_FIQ (2 << 9) 447e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_SERR (3 << 9) 448e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_EL1 (0 << 11) 449e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_EL2 (1 << 11) 450e650b64fSMarc Zyngier 451892fd259SMarc Zyngier #define KVM_ARM64_DEBUG_STATE_SAVE_SPE (1 << 12) /* Save SPE context if active */ 452892fd259SMarc Zyngier #define KVM_ARM64_DEBUG_STATE_SAVE_TRBE (1 << 13) /* Save TRBE context if active */ 453af9a0e21SMarc Zyngier #define KVM_ARM64_FP_FOREIGN_FPSTATE (1 << 14) 454583cda1bSAlexandru Elisei #define KVM_ARM64_ON_UNSUPPORTED_CPU (1 << 15) /* Physical CPU not in supported_cpus */ 455892fd259SMarc Zyngier 456892fd259SMarc Zyngier #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \ 457892fd259SMarc Zyngier KVM_GUESTDBG_USE_SW_BP | \ 458892fd259SMarc Zyngier KVM_GUESTDBG_USE_HW | \ 459892fd259SMarc Zyngier KVM_GUESTDBG_SINGLESTEP) 4601765edbaSDave Martin 4611765edbaSDave Martin #define vcpu_has_sve(vcpu) (system_supports_sve() && \ 4621765edbaSDave Martin ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_SVE)) 4634f8d6632SMarc Zyngier 464bf4086b1SMarc Zyngier #ifdef CONFIG_ARM64_PTR_AUTH 465bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) \ 466bf4086b1SMarc Zyngier ((cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) || \ 467bf4086b1SMarc Zyngier cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) && \ 468bf4086b1SMarc Zyngier (vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_PTRAUTH) 469bf4086b1SMarc Zyngier #else 470bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) false 471bf4086b1SMarc Zyngier #endif 472b890d75cSAmit Daniel Kachhap 473583cda1bSAlexandru Elisei #define vcpu_on_unsupported_cpu(vcpu) \ 474583cda1bSAlexandru Elisei ((vcpu)->arch.flags & KVM_ARM64_ON_UNSUPPORTED_CPU) 475583cda1bSAlexandru Elisei 476583cda1bSAlexandru Elisei #define vcpu_set_on_unsupported_cpu(vcpu) \ 477583cda1bSAlexandru Elisei ((vcpu)->arch.flags |= KVM_ARM64_ON_UNSUPPORTED_CPU) 478583cda1bSAlexandru Elisei 479583cda1bSAlexandru Elisei #define vcpu_clear_on_unsupported_cpu(vcpu) \ 480583cda1bSAlexandru Elisei ((vcpu)->arch.flags &= ~KVM_ARM64_ON_UNSUPPORTED_CPU) 481583cda1bSAlexandru Elisei 482e47c2055SMarc Zyngier #define vcpu_gp_regs(v) (&(v)->arch.ctxt.regs) 4838d404c4cSChristoffer Dall 4848d404c4cSChristoffer Dall /* 4851b422dd7SMarc Zyngier * Only use __vcpu_sys_reg/ctxt_sys_reg if you know you want the 4861b422dd7SMarc Zyngier * memory backed version of a register, and not the one most recently 4871b422dd7SMarc Zyngier * accessed by a running VCPU. For example, for userspace access or 4881b422dd7SMarc Zyngier * for system registers that are never context switched, but only 4891b422dd7SMarc Zyngier * emulated. 4908d404c4cSChristoffer Dall */ 4911b422dd7SMarc Zyngier #define __ctxt_sys_reg(c,r) (&(c)->sys_regs[(r)]) 4921b422dd7SMarc Zyngier 4931b422dd7SMarc Zyngier #define ctxt_sys_reg(c,r) (*__ctxt_sys_reg(c,r)) 4941b422dd7SMarc Zyngier 4951b422dd7SMarc Zyngier #define __vcpu_sys_reg(v,r) (ctxt_sys_reg(&(v)->arch.ctxt, (r))) 4968d404c4cSChristoffer Dall 497da6f1666SChristoffer Dall u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg); 498d47533daSChristoffer Dall void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg); 4998d404c4cSChristoffer Dall 50021c81001SMarc Zyngier static inline bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val) 50121c81001SMarc Zyngier { 50221c81001SMarc Zyngier /* 50321c81001SMarc Zyngier * *** VHE ONLY *** 50421c81001SMarc Zyngier * 50521c81001SMarc Zyngier * System registers listed in the switch are not saved on every 50621c81001SMarc Zyngier * exit from the guest but are only saved on vcpu_put. 50721c81001SMarc Zyngier * 50821c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 50921c81001SMarc Zyngier * should never be listed below, because the guest cannot modify its 51021c81001SMarc Zyngier * own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's 51121c81001SMarc Zyngier * thread when emulating cross-VCPU communication. 51221c81001SMarc Zyngier */ 51321c81001SMarc Zyngier if (!has_vhe()) 51421c81001SMarc Zyngier return false; 51521c81001SMarc Zyngier 51621c81001SMarc Zyngier switch (reg) { 51721c81001SMarc Zyngier case CSSELR_EL1: *val = read_sysreg_s(SYS_CSSELR_EL1); break; 51821c81001SMarc Zyngier case SCTLR_EL1: *val = read_sysreg_s(SYS_SCTLR_EL12); break; 51921c81001SMarc Zyngier case CPACR_EL1: *val = read_sysreg_s(SYS_CPACR_EL12); break; 52021c81001SMarc Zyngier case TTBR0_EL1: *val = read_sysreg_s(SYS_TTBR0_EL12); break; 52121c81001SMarc Zyngier case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); break; 52221c81001SMarc Zyngier case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break; 52321c81001SMarc Zyngier case ESR_EL1: *val = read_sysreg_s(SYS_ESR_EL12); break; 52421c81001SMarc Zyngier case AFSR0_EL1: *val = read_sysreg_s(SYS_AFSR0_EL12); break; 52521c81001SMarc Zyngier case AFSR1_EL1: *val = read_sysreg_s(SYS_AFSR1_EL12); break; 52621c81001SMarc Zyngier case FAR_EL1: *val = read_sysreg_s(SYS_FAR_EL12); break; 52721c81001SMarc Zyngier case MAIR_EL1: *val = read_sysreg_s(SYS_MAIR_EL12); break; 52821c81001SMarc Zyngier case VBAR_EL1: *val = read_sysreg_s(SYS_VBAR_EL12); break; 52921c81001SMarc Zyngier case CONTEXTIDR_EL1: *val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break; 53021c81001SMarc Zyngier case TPIDR_EL0: *val = read_sysreg_s(SYS_TPIDR_EL0); break; 53121c81001SMarc Zyngier case TPIDRRO_EL0: *val = read_sysreg_s(SYS_TPIDRRO_EL0); break; 53221c81001SMarc Zyngier case TPIDR_EL1: *val = read_sysreg_s(SYS_TPIDR_EL1); break; 53321c81001SMarc Zyngier case AMAIR_EL1: *val = read_sysreg_s(SYS_AMAIR_EL12); break; 53421c81001SMarc Zyngier case CNTKCTL_EL1: *val = read_sysreg_s(SYS_CNTKCTL_EL12); break; 53521c81001SMarc Zyngier case ELR_EL1: *val = read_sysreg_s(SYS_ELR_EL12); break; 53621c81001SMarc Zyngier case PAR_EL1: *val = read_sysreg_par(); break; 53721c81001SMarc Zyngier case DACR32_EL2: *val = read_sysreg_s(SYS_DACR32_EL2); break; 53821c81001SMarc Zyngier case IFSR32_EL2: *val = read_sysreg_s(SYS_IFSR32_EL2); break; 53921c81001SMarc Zyngier case DBGVCR32_EL2: *val = read_sysreg_s(SYS_DBGVCR32_EL2); break; 54021c81001SMarc Zyngier default: return false; 54121c81001SMarc Zyngier } 54221c81001SMarc Zyngier 54321c81001SMarc Zyngier return true; 54421c81001SMarc Zyngier } 54521c81001SMarc Zyngier 54621c81001SMarc Zyngier static inline bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg) 54721c81001SMarc Zyngier { 54821c81001SMarc Zyngier /* 54921c81001SMarc Zyngier * *** VHE ONLY *** 55021c81001SMarc Zyngier * 55121c81001SMarc Zyngier * System registers listed in the switch are not restored on every 55221c81001SMarc Zyngier * entry to the guest but are only restored on vcpu_load. 55321c81001SMarc Zyngier * 55421c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 55521c81001SMarc Zyngier * should never be listed below, because the MPIDR should only be set 55621c81001SMarc Zyngier * once, before running the VCPU, and never changed later. 55721c81001SMarc Zyngier */ 55821c81001SMarc Zyngier if (!has_vhe()) 55921c81001SMarc Zyngier return false; 56021c81001SMarc Zyngier 56121c81001SMarc Zyngier switch (reg) { 56221c81001SMarc Zyngier case CSSELR_EL1: write_sysreg_s(val, SYS_CSSELR_EL1); break; 56321c81001SMarc Zyngier case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break; 56421c81001SMarc Zyngier case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); break; 56521c81001SMarc Zyngier case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); break; 56621c81001SMarc Zyngier case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break; 56721c81001SMarc Zyngier case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; 56821c81001SMarc Zyngier case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); break; 56921c81001SMarc Zyngier case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); break; 57021c81001SMarc Zyngier case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); break; 57121c81001SMarc Zyngier case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); break; 57221c81001SMarc Zyngier case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); break; 57321c81001SMarc Zyngier case VBAR_EL1: write_sysreg_s(val, SYS_VBAR_EL12); break; 57421c81001SMarc Zyngier case CONTEXTIDR_EL1: write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break; 57521c81001SMarc Zyngier case TPIDR_EL0: write_sysreg_s(val, SYS_TPIDR_EL0); break; 57621c81001SMarc Zyngier case TPIDRRO_EL0: write_sysreg_s(val, SYS_TPIDRRO_EL0); break; 57721c81001SMarc Zyngier case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); break; 57821c81001SMarc Zyngier case AMAIR_EL1: write_sysreg_s(val, SYS_AMAIR_EL12); break; 57921c81001SMarc Zyngier case CNTKCTL_EL1: write_sysreg_s(val, SYS_CNTKCTL_EL12); break; 58021c81001SMarc Zyngier case ELR_EL1: write_sysreg_s(val, SYS_ELR_EL12); break; 58121c81001SMarc Zyngier case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); break; 58221c81001SMarc Zyngier case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); break; 58321c81001SMarc Zyngier case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); break; 58421c81001SMarc Zyngier case DBGVCR32_EL2: write_sysreg_s(val, SYS_DBGVCR32_EL2); break; 58521c81001SMarc Zyngier default: return false; 58621c81001SMarc Zyngier } 58721c81001SMarc Zyngier 58821c81001SMarc Zyngier return true; 58921c81001SMarc Zyngier } 59021c81001SMarc Zyngier 5914f8d6632SMarc Zyngier struct kvm_vm_stat { 5920193cc90SJing Zhang struct kvm_vm_stat_generic generic; 5934f8d6632SMarc Zyngier }; 5944f8d6632SMarc Zyngier 5954f8d6632SMarc Zyngier struct kvm_vcpu_stat { 5960193cc90SJing Zhang struct kvm_vcpu_stat_generic generic; 5978a7e75d4SSuraj Jitindar Singh u64 hvc_exit_stat; 598b19e6892SAmit Tomar u64 wfe_exit_stat; 599b19e6892SAmit Tomar u64 wfi_exit_stat; 600b19e6892SAmit Tomar u64 mmio_exit_user; 601b19e6892SAmit Tomar u64 mmio_exit_kernel; 602fe5161d2SOliver Upton u64 signal_exits; 603b19e6892SAmit Tomar u64 exits; 6044f8d6632SMarc Zyngier }; 6054f8d6632SMarc Zyngier 60608e873cbSYueHaibing void kvm_vcpu_preferred_target(struct kvm_vcpu_init *init); 6074f8d6632SMarc Zyngier unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu); 6084f8d6632SMarc Zyngier int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); 6094f8d6632SMarc Zyngier int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 6104f8d6632SMarc Zyngier int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 6116ac4a5acSMarc Zyngier 6126ac4a5acSMarc Zyngier unsigned long kvm_arm_num_sys_reg_descs(struct kvm_vcpu *vcpu); 6136ac4a5acSMarc Zyngier int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices); 6146ac4a5acSMarc Zyngier int kvm_arm_sys_reg_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *); 6156ac4a5acSMarc Zyngier int kvm_arm_sys_reg_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *); 6166ac4a5acSMarc Zyngier 617539aee0eSJames Morse int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 618b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 619b7b27facSDongjiu Geng 620539aee0eSJames Morse int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 621b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 6224f8d6632SMarc Zyngier 6234f8d6632SMarc Zyngier #define KVM_ARCH_WANT_MMU_NOTIFIER 6244f8d6632SMarc Zyngier 625b13216cfSChristoffer Dall void kvm_arm_halt_guest(struct kvm *kvm); 626b13216cfSChristoffer Dall void kvm_arm_resume_guest(struct kvm *kvm); 6274f8d6632SMarc Zyngier 628cc5705fbSMarc Zyngier #define vcpu_has_run_once(vcpu) !!rcu_access_pointer((vcpu)->pid) 629cc5705fbSMarc Zyngier 63040a50853SQuentin Perret #ifndef __KVM_NVHE_HYPERVISOR__ 631f50b6f6aSAndrew Scull #define kvm_call_hyp_nvhe(f, ...) \ 632f50b6f6aSAndrew Scull ({ \ 63305469831SAndrew Scull struct arm_smccc_res res; \ 63405469831SAndrew Scull \ 63505469831SAndrew Scull arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(f), \ 63605469831SAndrew Scull ##__VA_ARGS__, &res); \ 63705469831SAndrew Scull WARN_ON(res.a0 != SMCCC_RET_SUCCESS); \ 63805469831SAndrew Scull \ 63905469831SAndrew Scull res.a1; \ 640f50b6f6aSAndrew Scull }) 641f50b6f6aSAndrew Scull 64218fc7bf8SMarc Zyngier /* 64318fc7bf8SMarc Zyngier * The couple of isb() below are there to guarantee the same behaviour 64418fc7bf8SMarc Zyngier * on VHE as on !VHE, where the eret to EL1 acts as a context 64518fc7bf8SMarc Zyngier * synchronization event. 64618fc7bf8SMarc Zyngier */ 64718fc7bf8SMarc Zyngier #define kvm_call_hyp(f, ...) \ 64818fc7bf8SMarc Zyngier do { \ 64918fc7bf8SMarc Zyngier if (has_vhe()) { \ 65018fc7bf8SMarc Zyngier f(__VA_ARGS__); \ 65118fc7bf8SMarc Zyngier isb(); \ 65218fc7bf8SMarc Zyngier } else { \ 653f50b6f6aSAndrew Scull kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 65418fc7bf8SMarc Zyngier } \ 65518fc7bf8SMarc Zyngier } while(0) 65618fc7bf8SMarc Zyngier 65718fc7bf8SMarc Zyngier #define kvm_call_hyp_ret(f, ...) \ 65818fc7bf8SMarc Zyngier ({ \ 65918fc7bf8SMarc Zyngier typeof(f(__VA_ARGS__)) ret; \ 66018fc7bf8SMarc Zyngier \ 66118fc7bf8SMarc Zyngier if (has_vhe()) { \ 66218fc7bf8SMarc Zyngier ret = f(__VA_ARGS__); \ 66318fc7bf8SMarc Zyngier isb(); \ 66418fc7bf8SMarc Zyngier } else { \ 66505469831SAndrew Scull ret = kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 66618fc7bf8SMarc Zyngier } \ 66718fc7bf8SMarc Zyngier \ 66818fc7bf8SMarc Zyngier ret; \ 66918fc7bf8SMarc Zyngier }) 67040a50853SQuentin Perret #else /* __KVM_NVHE_HYPERVISOR__ */ 67140a50853SQuentin Perret #define kvm_call_hyp(f, ...) f(__VA_ARGS__) 67240a50853SQuentin Perret #define kvm_call_hyp_ret(f, ...) f(__VA_ARGS__) 67340a50853SQuentin Perret #define kvm_call_hyp_nvhe(f, ...) f(__VA_ARGS__) 67440a50853SQuentin Perret #endif /* __KVM_NVHE_HYPERVISOR__ */ 67522b39ca3SMarc Zyngier 676cf5d3188SChristoffer Dall void force_vm_exit(const cpumask_t *mask); 6774f8d6632SMarc Zyngier 67874cc7e0cSTianjia Zhang int handle_exit(struct kvm_vcpu *vcpu, int exception_index); 67974cc7e0cSTianjia Zhang void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index); 6804f8d6632SMarc Zyngier 6816ac4a5acSMarc Zyngier int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu); 6826ac4a5acSMarc Zyngier int kvm_handle_cp14_32(struct kvm_vcpu *vcpu); 6836ac4a5acSMarc Zyngier int kvm_handle_cp14_64(struct kvm_vcpu *vcpu); 6846ac4a5acSMarc Zyngier int kvm_handle_cp15_32(struct kvm_vcpu *vcpu); 6856ac4a5acSMarc Zyngier int kvm_handle_cp15_64(struct kvm_vcpu *vcpu); 6866ac4a5acSMarc Zyngier int kvm_handle_sys_reg(struct kvm_vcpu *vcpu); 6876ac4a5acSMarc Zyngier 6886ac4a5acSMarc Zyngier void kvm_reset_sys_regs(struct kvm_vcpu *vcpu); 6896ac4a5acSMarc Zyngier 6906ac4a5acSMarc Zyngier void kvm_sys_reg_table_init(void); 6916ac4a5acSMarc Zyngier 6920e20f5e2SMarc Zyngier /* MMIO helpers */ 6930e20f5e2SMarc Zyngier void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data); 6940e20f5e2SMarc Zyngier unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len); 6950e20f5e2SMarc Zyngier 69674cc7e0cSTianjia Zhang int kvm_handle_mmio_return(struct kvm_vcpu *vcpu); 69774cc7e0cSTianjia Zhang int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa); 6980e20f5e2SMarc Zyngier 699e1bfc245SSean Christopherson /* 700e1bfc245SSean Christopherson * Returns true if a Performance Monitoring Interrupt (PMI), a.k.a. perf event, 701e1bfc245SSean Christopherson * arrived in guest context. For arm64, any event that arrives while a vCPU is 702e1bfc245SSean Christopherson * loaded is considered to be "in guest". 703e1bfc245SSean Christopherson */ 704e1bfc245SSean Christopherson static inline bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu) 705e1bfc245SSean Christopherson { 706e1bfc245SSean Christopherson return IS_ENABLED(CONFIG_GUEST_PERF_EVENTS) && !!vcpu; 707e1bfc245SSean Christopherson } 708e1bfc245SSean Christopherson 709b48c1a45SSteven Price long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu); 7108564d637SSteven Price gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu); 7118564d637SSteven Price void kvm_update_stolen_time(struct kvm_vcpu *vcpu); 7128564d637SSteven Price 713004a0124SAndrew Jones bool kvm_arm_pvtime_supported(void); 71458772e9aSSteven Price int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu, 71558772e9aSSteven Price struct kvm_device_attr *attr); 71658772e9aSSteven Price int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu, 71758772e9aSSteven Price struct kvm_device_attr *attr); 71858772e9aSSteven Price int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu, 71958772e9aSSteven Price struct kvm_device_attr *attr); 72058772e9aSSteven Price 721f8051e96SShameer Kolothum extern unsigned int kvm_arm_vmid_bits; 72241783839SShameer Kolothum int kvm_arm_vmid_alloc_init(void); 72341783839SShameer Kolothum void kvm_arm_vmid_alloc_free(void); 72441783839SShameer Kolothum void kvm_arm_vmid_update(struct kvm_vmid *kvm_vmid); 725100b4f09SShameer Kolothum void kvm_arm_vmid_clear_active(void); 72641783839SShameer Kolothum 7278564d637SSteven Price static inline void kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch *vcpu_arch) 7288564d637SSteven Price { 7298564d637SSteven Price vcpu_arch->steal.base = GPA_INVALID; 7308564d637SSteven Price } 7318564d637SSteven Price 7328564d637SSteven Price static inline bool kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch *vcpu_arch) 7338564d637SSteven Price { 7348564d637SSteven Price return (vcpu_arch->steal.base != GPA_INVALID); 7358564d637SSteven Price } 736b48c1a45SSteven Price 737b7b27facSDongjiu Geng void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome); 738b7b27facSDongjiu Geng 7394429fc64SAndre Przywara struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr); 7404429fc64SAndre Przywara 74114ef9d04SMarc Zyngier DECLARE_KVM_HYP_PER_CPU(struct kvm_host_data, kvm_host_data); 7424464e210SChristoffer Dall 7431e0cf16cSMarc Zyngier static inline void kvm_init_host_cpu_context(struct kvm_cpu_context *cpu_ctxt) 74432f13955SMarc Zyngier { 74532f13955SMarc Zyngier /* The host's MPIDR is immutable, so let's set it up at boot time */ 74671071acfSMarc Zyngier ctxt_sys_reg(cpu_ctxt, MPIDR_EL1) = read_cpuid_mpidr(); 74732f13955SMarc Zyngier } 74832f13955SMarc Zyngier 7495bdf3437SJames Morse static inline bool kvm_system_needs_idmapped_vectors(void) 7505bdf3437SJames Morse { 7515bdf3437SJames Morse return cpus_have_const_cap(ARM64_SPECTRE_V3A); 7525bdf3437SJames Morse } 7535bdf3437SJames Morse 754384b40caSMark Rutland void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu); 755384b40caSMark Rutland 7560865e636SRadim Krčmář static inline void kvm_arch_hardware_unsetup(void) {} 7570865e636SRadim Krčmář static inline void kvm_arch_sync_events(struct kvm *kvm) {} 7580865e636SRadim Krčmář static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 7590865e636SRadim Krčmář 76056c7f5e7SAlex Bennée void kvm_arm_init_debug(void); 761263d6287SAlexandru Elisei void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu); 76256c7f5e7SAlex Bennée void kvm_arm_setup_debug(struct kvm_vcpu *vcpu); 76356c7f5e7SAlex Bennée void kvm_arm_clear_debug(struct kvm_vcpu *vcpu); 76484e690bfSAlex Bennée void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu); 7657dabf02fSOliver Upton 7667dabf02fSOliver Upton #define kvm_vcpu_os_lock_enabled(vcpu) \ 7677dabf02fSOliver Upton (!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & SYS_OSLSR_OSLK)) 7687dabf02fSOliver Upton 769bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, 770bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 771bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, 772bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 773bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu, 774bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 77556c7f5e7SAlex Bennée 776f0376edbSSteven Price long kvm_vm_ioctl_mte_copy_tags(struct kvm *kvm, 777f0376edbSSteven Price struct kvm_arm_copy_mte_tags *copy_tags); 778f0376edbSSteven Price 779e6b673b7SDave Martin /* Guest/host FPSIMD coordination helpers */ 780e6b673b7SDave Martin int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu); 781e6b673b7SDave Martin void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu); 782af9a0e21SMarc Zyngier void kvm_arch_vcpu_ctxflush_fp(struct kvm_vcpu *vcpu); 783e6b673b7SDave Martin void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu); 784e6b673b7SDave Martin void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu); 78552b28657SQuentin Perret void kvm_vcpu_unshare_task_fp(struct kvm_vcpu *vcpu); 786e6b673b7SDave Martin 787eb41238cSAndrew Murray static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr) 788eb41238cSAndrew Murray { 789435e53fbSAndrew Murray return (!has_vhe() && attr->exclude_host); 790eb41238cSAndrew Murray } 791eb41238cSAndrew Murray 792d2602bb4SSuzuki K Poulose /* Flags for host debug state */ 793d2602bb4SSuzuki K Poulose void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu); 794d2602bb4SSuzuki K Poulose void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu); 795d2602bb4SSuzuki K Poulose 796052f064dSMarc Zyngier #ifdef CONFIG_KVM 797eb41238cSAndrew Murray void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr); 798eb41238cSAndrew Murray void kvm_clr_pmu_events(u32 clr); 7993d91befbSAndrew Murray 800435e53fbSAndrew Murray void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu); 801435e53fbSAndrew Murray void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu); 802eb41238cSAndrew Murray #else 803eb41238cSAndrew Murray static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {} 804eb41238cSAndrew Murray static inline void kvm_clr_pmu_events(u32 clr) {} 805e6b673b7SDave Martin #endif 80617eed27bSDave Martin 80713aeb9b4SDavid Brazdil void kvm_vcpu_load_sysregs_vhe(struct kvm_vcpu *vcpu); 80813aeb9b4SDavid Brazdil void kvm_vcpu_put_sysregs_vhe(struct kvm_vcpu *vcpu); 809bc192ceeSChristoffer Dall 810b130a8f7SMarc Zyngier int kvm_set_ipa_limit(void); 8110f62f0e9SSuzuki K Poulose 812d1e5b0e9SMarc Orr #define __KVM_HAVE_ARCH_VM_ALLOC 813d1e5b0e9SMarc Orr struct kvm *kvm_arch_alloc_vm(void); 814d1e5b0e9SMarc Orr 815bca607ebSMarc Zyngier int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type); 8165b6c6742SSuzuki K Poulose 8172ea7f655SFuad Tabba static inline bool kvm_vm_is_protected(struct kvm *kvm) 8182ea7f655SFuad Tabba { 8192ea7f655SFuad Tabba return false; 8202ea7f655SFuad Tabba } 8212ea7f655SFuad Tabba 8222a0c3433SFuad Tabba void kvm_init_protected_traps(struct kvm_vcpu *vcpu); 8232a0c3433SFuad Tabba 82492e68b2bSDave Martin int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature); 8259033bba4SDave Martin bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu); 8269033bba4SDave Martin 8279033bba4SDave Martin #define kvm_arm_vcpu_sve_finalized(vcpu) \ 8289033bba4SDave Martin ((vcpu)->arch.flags & KVM_ARM64_VCPU_SVE_FINALIZED) 8297dd32a0dSDave Martin 83006394531SMarc Zyngier #define kvm_has_mte(kvm) \ 83106394531SMarc Zyngier (system_supports_mte() && \ 83206394531SMarc Zyngier test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &(kvm)->arch.flags)) 83314bda7a9SMarc Zyngier #define kvm_vcpu_has_pmu(vcpu) \ 83414bda7a9SMarc Zyngier (test_bit(KVM_ARM_VCPU_PMU_V3, (vcpu)->arch.features)) 83514bda7a9SMarc Zyngier 836a8e190cdSArd Biesheuvel int kvm_trng_call(struct kvm_vcpu *vcpu); 837f320bc74SQuentin Perret #ifdef CONFIG_KVM 838f320bc74SQuentin Perret extern phys_addr_t hyp_mem_base; 839f320bc74SQuentin Perret extern phys_addr_t hyp_mem_size; 840f320bc74SQuentin Perret void __init kvm_hyp_reserve(void); 841f320bc74SQuentin Perret #else 842f320bc74SQuentin Perret static inline void kvm_hyp_reserve(void) { } 843f320bc74SQuentin Perret #endif 844a8e190cdSArd Biesheuvel 8451e579429SOliver Upton void kvm_arm_vcpu_power_off(struct kvm_vcpu *vcpu); 846b171f9bbSOliver Upton bool kvm_arm_vcpu_stopped(struct kvm_vcpu *vcpu); 8471e579429SOliver Upton 8484f8d6632SMarc Zyngier #endif /* __ARM64_KVM_HOST_H__ */ 849