14f8d6632SMarc Zyngier /* 24f8d6632SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 34f8d6632SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 44f8d6632SMarc Zyngier * 54f8d6632SMarc Zyngier * Derived from arch/arm/include/asm/kvm_host.h: 64f8d6632SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 74f8d6632SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 84f8d6632SMarc Zyngier * 94f8d6632SMarc Zyngier * This program is free software; you can redistribute it and/or modify 104f8d6632SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 114f8d6632SMarc Zyngier * published by the Free Software Foundation. 124f8d6632SMarc Zyngier * 134f8d6632SMarc Zyngier * This program is distributed in the hope that it will be useful, 144f8d6632SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 154f8d6632SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 164f8d6632SMarc Zyngier * GNU General Public License for more details. 174f8d6632SMarc Zyngier * 184f8d6632SMarc Zyngier * You should have received a copy of the GNU General Public License 194f8d6632SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 204f8d6632SMarc Zyngier */ 214f8d6632SMarc Zyngier 224f8d6632SMarc Zyngier #ifndef __ARM64_KVM_HOST_H__ 234f8d6632SMarc Zyngier #define __ARM64_KVM_HOST_H__ 244f8d6632SMarc Zyngier 2565647300SPaolo Bonzini #include <linux/types.h> 2665647300SPaolo Bonzini #include <linux/kvm_types.h> 2763a1e1c9SMark Rutland #include <asm/cpufeature.h> 284f5abad9SJames Morse #include <asm/daifflags.h> 2917eed27bSDave Martin #include <asm/fpsimd.h> 304f8d6632SMarc Zyngier #include <asm/kvm.h> 313a3604bcSMarc Zyngier #include <asm/kvm_asm.h> 324f8d6632SMarc Zyngier #include <asm/kvm_mmio.h> 33e6b673b7SDave Martin #include <asm/thread_info.h> 344f8d6632SMarc Zyngier 35c1426e4cSEric Auger #define __KVM_HAVE_ARCH_INTC_INITIALIZED 36c1426e4cSEric Auger 37955a3fc6SLinu Cherian #define KVM_USER_MEM_SLOTS 512 38920552b2SDavid Hildenbrand #define KVM_HALT_POLL_NS_DEFAULT 500000 394f8d6632SMarc Zyngier 404f8d6632SMarc Zyngier #include <kvm/arm_vgic.h> 414f8d6632SMarc Zyngier #include <kvm/arm_arch_timer.h> 4204fe4726SShannon Zhao #include <kvm/arm_pmu.h> 434f8d6632SMarc Zyngier 44ef748917SMing Lei #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS 45ef748917SMing Lei 46808e7381SShannon Zhao #define KVM_VCPU_MAX_FEATURES 4 474f8d6632SMarc Zyngier 487b244e2bSAndrew Jones #define KVM_REQ_SLEEP \ 492387149eSAndrew Jones KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 50325f9c64SAndrew Jones #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) 51b13216cfSChristoffer Dall 5261bbe380SChristoffer Dall DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 5361bbe380SChristoffer Dall 546951e48bSWill Deacon int __attribute_const__ kvm_target_cpu(void); 554f8d6632SMarc Zyngier int kvm_reset_vcpu(struct kvm_vcpu *vcpu); 56375bdd3bSDongjiu Geng int kvm_arch_vm_ioctl_check_extension(struct kvm *kvm, long ext); 57c612505fSJames Morse void __extended_idmap_trampoline(phys_addr_t boot_pgd, phys_addr_t idmap_start); 584f8d6632SMarc Zyngier 594f8d6632SMarc Zyngier struct kvm_arch { 604f8d6632SMarc Zyngier /* The VMID generation used for the virt. memory system */ 614f8d6632SMarc Zyngier u64 vmid_gen; 624f8d6632SMarc Zyngier u32 vmid; 634f8d6632SMarc Zyngier 647665f3a8SSuzuki K Poulose /* stage2 entry level table */ 654f8d6632SMarc Zyngier pgd_t *pgd; 664f8d6632SMarc Zyngier 674f8d6632SMarc Zyngier /* VTTBR value associated with above pgd and vmid */ 684f8d6632SMarc Zyngier u64 vttbr; 697665f3a8SSuzuki K Poulose /* VTCR_EL2 value for this VM */ 707665f3a8SSuzuki K Poulose u64 vtcr; 714f8d6632SMarc Zyngier 7294d0e598SMarc Zyngier /* The last vcpu id that ran on each physical CPU */ 7394d0e598SMarc Zyngier int __percpu *last_vcpu_ran; 7494d0e598SMarc Zyngier 753caa2d8cSAndre Przywara /* The maximum number of vCPUs depends on the used GIC model */ 763caa2d8cSAndre Przywara int max_vcpus; 773caa2d8cSAndre Przywara 784f8d6632SMarc Zyngier /* Interrupt controller */ 794f8d6632SMarc Zyngier struct vgic_dist vgic; 8085bd0ba1SMarc Zyngier 8185bd0ba1SMarc Zyngier /* Mandated version of PSCI */ 8285bd0ba1SMarc Zyngier u32 psci_version; 834f8d6632SMarc Zyngier }; 844f8d6632SMarc Zyngier 854f8d6632SMarc Zyngier #define KVM_NR_MEM_OBJS 40 864f8d6632SMarc Zyngier 874f8d6632SMarc Zyngier /* 884f8d6632SMarc Zyngier * We don't want allocation failures within the mmu code, so we preallocate 894f8d6632SMarc Zyngier * enough memory for a single page fault in a cache. 904f8d6632SMarc Zyngier */ 914f8d6632SMarc Zyngier struct kvm_mmu_memory_cache { 924f8d6632SMarc Zyngier int nobjs; 934f8d6632SMarc Zyngier void *objects[KVM_NR_MEM_OBJS]; 944f8d6632SMarc Zyngier }; 954f8d6632SMarc Zyngier 964f8d6632SMarc Zyngier struct kvm_vcpu_fault_info { 974f8d6632SMarc Zyngier u32 esr_el2; /* Hyp Syndrom Register */ 984f8d6632SMarc Zyngier u64 far_el2; /* Hyp Fault Address Register */ 994f8d6632SMarc Zyngier u64 hpfar_el2; /* Hyp IPA Fault Address Register */ 1000067df41SJames Morse u64 disr_el1; /* Deferred [SError] Status Register */ 1014f8d6632SMarc Zyngier }; 1024f8d6632SMarc Zyngier 1039d8415d6SMarc Zyngier /* 1049d8415d6SMarc Zyngier * 0 is reserved as an invalid value. 1059d8415d6SMarc Zyngier * Order should be kept in sync with the save/restore code. 1069d8415d6SMarc Zyngier */ 1079d8415d6SMarc Zyngier enum vcpu_sysreg { 1089d8415d6SMarc Zyngier __INVALID_SYSREG__, 1099d8415d6SMarc Zyngier MPIDR_EL1, /* MultiProcessor Affinity Register */ 1109d8415d6SMarc Zyngier CSSELR_EL1, /* Cache Size Selection Register */ 1119d8415d6SMarc Zyngier SCTLR_EL1, /* System Control Register */ 1129d8415d6SMarc Zyngier ACTLR_EL1, /* Auxiliary Control Register */ 1139d8415d6SMarc Zyngier CPACR_EL1, /* Coprocessor Access Control */ 1149d8415d6SMarc Zyngier TTBR0_EL1, /* Translation Table Base Register 0 */ 1159d8415d6SMarc Zyngier TTBR1_EL1, /* Translation Table Base Register 1 */ 1169d8415d6SMarc Zyngier TCR_EL1, /* Translation Control Register */ 1179d8415d6SMarc Zyngier ESR_EL1, /* Exception Syndrome Register */ 118ef769e32SAdam Buchbinder AFSR0_EL1, /* Auxiliary Fault Status Register 0 */ 119ef769e32SAdam Buchbinder AFSR1_EL1, /* Auxiliary Fault Status Register 1 */ 1209d8415d6SMarc Zyngier FAR_EL1, /* Fault Address Register */ 1219d8415d6SMarc Zyngier MAIR_EL1, /* Memory Attribute Indirection Register */ 1229d8415d6SMarc Zyngier VBAR_EL1, /* Vector Base Address Register */ 1239d8415d6SMarc Zyngier CONTEXTIDR_EL1, /* Context ID Register */ 1249d8415d6SMarc Zyngier TPIDR_EL0, /* Thread ID, User R/W */ 1259d8415d6SMarc Zyngier TPIDRRO_EL0, /* Thread ID, User R/O */ 1269d8415d6SMarc Zyngier TPIDR_EL1, /* Thread ID, Privileged */ 1279d8415d6SMarc Zyngier AMAIR_EL1, /* Aux Memory Attribute Indirection Register */ 1289d8415d6SMarc Zyngier CNTKCTL_EL1, /* Timer Control Register (EL1) */ 1299d8415d6SMarc Zyngier PAR_EL1, /* Physical Address Register */ 1309d8415d6SMarc Zyngier MDSCR_EL1, /* Monitor Debug System Control Register */ 1319d8415d6SMarc Zyngier MDCCINT_EL1, /* Monitor Debug Comms Channel Interrupt Enable Reg */ 132c773ae2bSJames Morse DISR_EL1, /* Deferred Interrupt Status Register */ 1339d8415d6SMarc Zyngier 134ab946834SShannon Zhao /* Performance Monitors Registers */ 135ab946834SShannon Zhao PMCR_EL0, /* Control Register */ 1363965c3ceSShannon Zhao PMSELR_EL0, /* Event Counter Selection Register */ 137051ff581SShannon Zhao PMEVCNTR0_EL0, /* Event Counter Register (0-30) */ 138051ff581SShannon Zhao PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30, 139051ff581SShannon Zhao PMCCNTR_EL0, /* Cycle Counter Register */ 1409feb21acSShannon Zhao PMEVTYPER0_EL0, /* Event Type Register (0-30) */ 1419feb21acSShannon Zhao PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30, 1429feb21acSShannon Zhao PMCCFILTR_EL0, /* Cycle Count Filter Register */ 14396b0eebcSShannon Zhao PMCNTENSET_EL0, /* Count Enable Set Register */ 1449db52c78SShannon Zhao PMINTENSET_EL1, /* Interrupt Enable Set Register */ 14576d883c4SShannon Zhao PMOVSSET_EL0, /* Overflow Flag Status Set Register */ 1467a0adc70SShannon Zhao PMSWINC_EL0, /* Software Increment Register */ 147d692b8adSShannon Zhao PMUSERENR_EL0, /* User Enable Register */ 148ab946834SShannon Zhao 1499d8415d6SMarc Zyngier /* 32bit specific registers. Keep them at the end of the range */ 1509d8415d6SMarc Zyngier DACR32_EL2, /* Domain Access Control Register */ 1519d8415d6SMarc Zyngier IFSR32_EL2, /* Instruction Fault Status Register */ 1529d8415d6SMarc Zyngier FPEXC32_EL2, /* Floating-Point Exception Control Register */ 1539d8415d6SMarc Zyngier DBGVCR32_EL2, /* Debug Vector Catch Register */ 1549d8415d6SMarc Zyngier 1559d8415d6SMarc Zyngier NR_SYS_REGS /* Nothing after this line! */ 1569d8415d6SMarc Zyngier }; 1579d8415d6SMarc Zyngier 1589d8415d6SMarc Zyngier /* 32bit mapping */ 1599d8415d6SMarc Zyngier #define c0_MPIDR (MPIDR_EL1 * 2) /* MultiProcessor ID Register */ 1609d8415d6SMarc Zyngier #define c0_CSSELR (CSSELR_EL1 * 2)/* Cache Size Selection Register */ 1619d8415d6SMarc Zyngier #define c1_SCTLR (SCTLR_EL1 * 2) /* System Control Register */ 1629d8415d6SMarc Zyngier #define c1_ACTLR (ACTLR_EL1 * 2) /* Auxiliary Control Register */ 1639d8415d6SMarc Zyngier #define c1_CPACR (CPACR_EL1 * 2) /* Coprocessor Access Control */ 1649d8415d6SMarc Zyngier #define c2_TTBR0 (TTBR0_EL1 * 2) /* Translation Table Base Register 0 */ 1659d8415d6SMarc Zyngier #define c2_TTBR0_high (c2_TTBR0 + 1) /* TTBR0 top 32 bits */ 1669d8415d6SMarc Zyngier #define c2_TTBR1 (TTBR1_EL1 * 2) /* Translation Table Base Register 1 */ 1679d8415d6SMarc Zyngier #define c2_TTBR1_high (c2_TTBR1 + 1) /* TTBR1 top 32 bits */ 1689d8415d6SMarc Zyngier #define c2_TTBCR (TCR_EL1 * 2) /* Translation Table Base Control R. */ 1699d8415d6SMarc Zyngier #define c3_DACR (DACR32_EL2 * 2)/* Domain Access Control Register */ 1709d8415d6SMarc Zyngier #define c5_DFSR (ESR_EL1 * 2) /* Data Fault Status Register */ 1719d8415d6SMarc Zyngier #define c5_IFSR (IFSR32_EL2 * 2)/* Instruction Fault Status Register */ 1729d8415d6SMarc Zyngier #define c5_ADFSR (AFSR0_EL1 * 2) /* Auxiliary Data Fault Status R */ 1739d8415d6SMarc Zyngier #define c5_AIFSR (AFSR1_EL1 * 2) /* Auxiliary Instr Fault Status R */ 1749d8415d6SMarc Zyngier #define c6_DFAR (FAR_EL1 * 2) /* Data Fault Address Register */ 1759d8415d6SMarc Zyngier #define c6_IFAR (c6_DFAR + 1) /* Instruction Fault Address Register */ 1769d8415d6SMarc Zyngier #define c7_PAR (PAR_EL1 * 2) /* Physical Address Register */ 1779d8415d6SMarc Zyngier #define c7_PAR_high (c7_PAR + 1) /* PAR top 32 bits */ 1789d8415d6SMarc Zyngier #define c10_PRRR (MAIR_EL1 * 2) /* Primary Region Remap Register */ 1799d8415d6SMarc Zyngier #define c10_NMRR (c10_PRRR + 1) /* Normal Memory Remap Register */ 1809d8415d6SMarc Zyngier #define c12_VBAR (VBAR_EL1 * 2) /* Vector Base Address Register */ 1819d8415d6SMarc Zyngier #define c13_CID (CONTEXTIDR_EL1 * 2) /* Context ID Register */ 1829d8415d6SMarc Zyngier #define c13_TID_URW (TPIDR_EL0 * 2) /* Thread ID, User R/W */ 1839d8415d6SMarc Zyngier #define c13_TID_URO (TPIDRRO_EL0 * 2)/* Thread ID, User R/O */ 1849d8415d6SMarc Zyngier #define c13_TID_PRIV (TPIDR_EL1 * 2) /* Thread ID, Privileged */ 1859d8415d6SMarc Zyngier #define c10_AMAIR0 (AMAIR_EL1 * 2) /* Aux Memory Attr Indirection Reg */ 1869d8415d6SMarc Zyngier #define c10_AMAIR1 (c10_AMAIR0 + 1)/* Aux Memory Attr Indirection Reg */ 1879d8415d6SMarc Zyngier #define c14_CNTKCTL (CNTKCTL_EL1 * 2) /* Timer Control Register (PL1) */ 1889d8415d6SMarc Zyngier 1899d8415d6SMarc Zyngier #define cp14_DBGDSCRext (MDSCR_EL1 * 2) 1909d8415d6SMarc Zyngier #define cp14_DBGBCR0 (DBGBCR0_EL1 * 2) 1919d8415d6SMarc Zyngier #define cp14_DBGBVR0 (DBGBVR0_EL1 * 2) 1929d8415d6SMarc Zyngier #define cp14_DBGBXVR0 (cp14_DBGBVR0 + 1) 1939d8415d6SMarc Zyngier #define cp14_DBGWCR0 (DBGWCR0_EL1 * 2) 1949d8415d6SMarc Zyngier #define cp14_DBGWVR0 (DBGWVR0_EL1 * 2) 1959d8415d6SMarc Zyngier #define cp14_DBGDCCINT (MDCCINT_EL1 * 2) 1969d8415d6SMarc Zyngier 1979d8415d6SMarc Zyngier #define NR_COPRO_REGS (NR_SYS_REGS * 2) 1989d8415d6SMarc Zyngier 1994f8d6632SMarc Zyngier struct kvm_cpu_context { 2004f8d6632SMarc Zyngier struct kvm_regs gp_regs; 20140033a61SMarc Zyngier union { 2024f8d6632SMarc Zyngier u64 sys_regs[NR_SYS_REGS]; 20372564016SMarc Zyngier u32 copro[NR_COPRO_REGS]; 20440033a61SMarc Zyngier }; 205c97e166eSJames Morse 206c97e166eSJames Morse struct kvm_vcpu *__hyp_running_vcpu; 2074f8d6632SMarc Zyngier }; 2084f8d6632SMarc Zyngier 2094f8d6632SMarc Zyngier typedef struct kvm_cpu_context kvm_cpu_context_t; 2104f8d6632SMarc Zyngier 2114f8d6632SMarc Zyngier struct kvm_vcpu_arch { 2124f8d6632SMarc Zyngier struct kvm_cpu_context ctxt; 2134f8d6632SMarc Zyngier 2144f8d6632SMarc Zyngier /* HYP configuration */ 2154f8d6632SMarc Zyngier u64 hcr_el2; 21656c7f5e7SAlex Bennée u32 mdcr_el2; 2174f8d6632SMarc Zyngier 2184f8d6632SMarc Zyngier /* Exception Information */ 2194f8d6632SMarc Zyngier struct kvm_vcpu_fault_info fault; 2204f8d6632SMarc Zyngier 22155e3748eSMarc Zyngier /* State of various workarounds, see kvm_asm.h for bit assignment */ 22255e3748eSMarc Zyngier u64 workaround_flags; 22355e3748eSMarc Zyngier 224fa89d31cSDave Martin /* Miscellaneous vcpu state flags */ 225fa89d31cSDave Martin u64 flags; 2260c557ed4SMarc Zyngier 22784e690bfSAlex Bennée /* 22884e690bfSAlex Bennée * We maintain more than a single set of debug registers to support 22984e690bfSAlex Bennée * debugging the guest from the host and to maintain separate host and 23084e690bfSAlex Bennée * guest state during world switches. vcpu_debug_state are the debug 23184e690bfSAlex Bennée * registers of the vcpu as the guest sees them. host_debug_state are 232834bf887SAlex Bennée * the host registers which are saved and restored during 233834bf887SAlex Bennée * world switches. external_debug_state contains the debug 234834bf887SAlex Bennée * values we want to debug the guest. This is set via the 235834bf887SAlex Bennée * KVM_SET_GUEST_DEBUG ioctl. 23684e690bfSAlex Bennée * 23784e690bfSAlex Bennée * debug_ptr points to the set of debug registers that should be loaded 23884e690bfSAlex Bennée * onto the hardware when running the guest. 23984e690bfSAlex Bennée */ 24084e690bfSAlex Bennée struct kvm_guest_debug_arch *debug_ptr; 24184e690bfSAlex Bennée struct kvm_guest_debug_arch vcpu_debug_state; 242834bf887SAlex Bennée struct kvm_guest_debug_arch external_debug_state; 24384e690bfSAlex Bennée 2444f8d6632SMarc Zyngier /* Pointer to host CPU context */ 2454f8d6632SMarc Zyngier kvm_cpu_context_t *host_cpu_context; 246e6b673b7SDave Martin 247e6b673b7SDave Martin struct thread_info *host_thread_info; /* hyp VA */ 248e6b673b7SDave Martin struct user_fpsimd_state *host_fpsimd_state; /* hyp VA */ 249e6b673b7SDave Martin 250f85279b4SWill Deacon struct { 251f85279b4SWill Deacon /* {Break,watch}point registers */ 252f85279b4SWill Deacon struct kvm_guest_debug_arch regs; 253f85279b4SWill Deacon /* Statistical profiling extension */ 254f85279b4SWill Deacon u64 pmscr_el1; 255f85279b4SWill Deacon } host_debug_state; 2564f8d6632SMarc Zyngier 2574f8d6632SMarc Zyngier /* VGIC state */ 2584f8d6632SMarc Zyngier struct vgic_cpu vgic_cpu; 2594f8d6632SMarc Zyngier struct arch_timer_cpu timer_cpu; 26004fe4726SShannon Zhao struct kvm_pmu pmu; 2614f8d6632SMarc Zyngier 2624f8d6632SMarc Zyngier /* 2634f8d6632SMarc Zyngier * Anything that is not used directly from assembly code goes 2644f8d6632SMarc Zyngier * here. 2654f8d6632SMarc Zyngier */ 2664f8d6632SMarc Zyngier 267337b99bfSAlex Bennée /* 268337b99bfSAlex Bennée * Guest registers we preserve during guest debugging. 269337b99bfSAlex Bennée * 270337b99bfSAlex Bennée * These shadow registers are updated by the kvm_handle_sys_reg 271337b99bfSAlex Bennée * trap handler if the guest accesses or updates them while we 272337b99bfSAlex Bennée * are using guest debug. 273337b99bfSAlex Bennée */ 274337b99bfSAlex Bennée struct { 275337b99bfSAlex Bennée u32 mdscr_el1; 276337b99bfSAlex Bennée } guest_debug_preserved; 277337b99bfSAlex Bennée 2783781528eSEric Auger /* vcpu power-off state */ 2793781528eSEric Auger bool power_off; 2804f8d6632SMarc Zyngier 2813b92830aSEric Auger /* Don't run the guest (internal implementation need) */ 2823b92830aSEric Auger bool pause; 2833b92830aSEric Auger 2844f8d6632SMarc Zyngier /* IO related fields */ 2854f8d6632SMarc Zyngier struct kvm_decode mmio_decode; 2864f8d6632SMarc Zyngier 2874f8d6632SMarc Zyngier /* Cache some mmu pages needed inside spinlock regions */ 2884f8d6632SMarc Zyngier struct kvm_mmu_memory_cache mmu_page_cache; 2894f8d6632SMarc Zyngier 2904f8d6632SMarc Zyngier /* Target CPU and feature flags */ 2916c8c0c4dSChen Gang int target; 2924f8d6632SMarc Zyngier DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES); 2934f8d6632SMarc Zyngier 2944f8d6632SMarc Zyngier /* Detect first run of a vcpu */ 2954f8d6632SMarc Zyngier bool has_run_once; 2964715c14bSJames Morse 2974715c14bSJames Morse /* Virtual SError ESR to restore when HCR_EL2.VSE is set */ 2984715c14bSJames Morse u64 vsesr_el2; 299d47533daSChristoffer Dall 300d47533daSChristoffer Dall /* True when deferrable sysregs are loaded on the physical CPU, 301d47533daSChristoffer Dall * see kvm_vcpu_load_sysregs and kvm_vcpu_put_sysregs. */ 302d47533daSChristoffer Dall bool sysregs_loaded_on_cpu; 3034f8d6632SMarc Zyngier }; 3044f8d6632SMarc Zyngier 305fa89d31cSDave Martin /* vcpu_arch flags field values: */ 306fa89d31cSDave Martin #define KVM_ARM64_DEBUG_DIRTY (1 << 0) 307e6b673b7SDave Martin #define KVM_ARM64_FP_ENABLED (1 << 1) /* guest FP regs loaded */ 308e6b673b7SDave Martin #define KVM_ARM64_FP_HOST (1 << 2) /* host FP regs loaded */ 309e6b673b7SDave Martin #define KVM_ARM64_HOST_SVE_IN_USE (1 << 3) /* backup for host TIF_SVE */ 310b3eb56b6SDave Martin #define KVM_ARM64_HOST_SVE_ENABLED (1 << 4) /* SVE enabled for EL0 */ 311fa89d31cSDave Martin 3124f8d6632SMarc Zyngier #define vcpu_gp_regs(v) (&(v)->arch.ctxt.gp_regs) 3138d404c4cSChristoffer Dall 3148d404c4cSChristoffer Dall /* 3158d404c4cSChristoffer Dall * Only use __vcpu_sys_reg if you know you want the memory backed version of a 3168d404c4cSChristoffer Dall * register, and not the one most recently accessed by a running VCPU. For 3178d404c4cSChristoffer Dall * example, for userspace access or for system registers that are never context 3188d404c4cSChristoffer Dall * switched, but only emulated. 3198d404c4cSChristoffer Dall */ 3208d404c4cSChristoffer Dall #define __vcpu_sys_reg(v,r) ((v)->arch.ctxt.sys_regs[(r)]) 3218d404c4cSChristoffer Dall 322da6f1666SChristoffer Dall u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg); 323d47533daSChristoffer Dall void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg); 3248d404c4cSChristoffer Dall 32572564016SMarc Zyngier /* 32672564016SMarc Zyngier * CP14 and CP15 live in the same array, as they are backed by the 32772564016SMarc Zyngier * same system registers. 32872564016SMarc Zyngier */ 32972564016SMarc Zyngier #define vcpu_cp14(v,r) ((v)->arch.ctxt.copro[(r)]) 33072564016SMarc Zyngier #define vcpu_cp15(v,r) ((v)->arch.ctxt.copro[(r)]) 3314f8d6632SMarc Zyngier 3324f8d6632SMarc Zyngier struct kvm_vm_stat { 3338a7e75d4SSuraj Jitindar Singh ulong remote_tlb_flush; 3344f8d6632SMarc Zyngier }; 3354f8d6632SMarc Zyngier 3364f8d6632SMarc Zyngier struct kvm_vcpu_stat { 3378a7e75d4SSuraj Jitindar Singh u64 halt_successful_poll; 3388a7e75d4SSuraj Jitindar Singh u64 halt_attempted_poll; 3398a7e75d4SSuraj Jitindar Singh u64 halt_poll_invalid; 3408a7e75d4SSuraj Jitindar Singh u64 halt_wakeup; 3418a7e75d4SSuraj Jitindar Singh u64 hvc_exit_stat; 342b19e6892SAmit Tomar u64 wfe_exit_stat; 343b19e6892SAmit Tomar u64 wfi_exit_stat; 344b19e6892SAmit Tomar u64 mmio_exit_user; 345b19e6892SAmit Tomar u64 mmio_exit_kernel; 346b19e6892SAmit Tomar u64 exits; 3474f8d6632SMarc Zyngier }; 3484f8d6632SMarc Zyngier 349473bdc0eSAnup Patel int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init); 3504f8d6632SMarc Zyngier unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu); 3514f8d6632SMarc Zyngier int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); 3524f8d6632SMarc Zyngier int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 3534f8d6632SMarc Zyngier int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 354539aee0eSJames Morse int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 355b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 356b7b27facSDongjiu Geng 357539aee0eSJames Morse int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 358b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 3594f8d6632SMarc Zyngier 3604f8d6632SMarc Zyngier #define KVM_ARCH_WANT_MMU_NOTIFIER 3614f8d6632SMarc Zyngier int kvm_unmap_hva_range(struct kvm *kvm, 3624f8d6632SMarc Zyngier unsigned long start, unsigned long end); 363748c0e31SLan Tianyu int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 36435307b9aSMarc Zyngier int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 36535307b9aSMarc Zyngier int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 3664f8d6632SMarc Zyngier 3674f8d6632SMarc Zyngier struct kvm_vcpu *kvm_arm_get_running_vcpu(void); 3684000be42SWill Deacon struct kvm_vcpu * __percpu *kvm_get_running_vcpus(void); 369b13216cfSChristoffer Dall void kvm_arm_halt_guest(struct kvm *kvm); 370b13216cfSChristoffer Dall void kvm_arm_resume_guest(struct kvm *kvm); 3714f8d6632SMarc Zyngier 372a0bf9776SArd Biesheuvel u64 __kvm_call_hyp(void *hypfn, ...); 37322b39ca3SMarc Zyngier #define kvm_call_hyp(f, ...) __kvm_call_hyp(kvm_ksym_ref(f), ##__VA_ARGS__) 37422b39ca3SMarc Zyngier 375cf5d3188SChristoffer Dall void force_vm_exit(const cpumask_t *mask); 3768199ed0eSMario Smarduch void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot); 3774f8d6632SMarc Zyngier 3784f8d6632SMarc Zyngier int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, 3794f8d6632SMarc Zyngier int exception_index); 3803368bd80SJames Morse void handle_exit_early(struct kvm_vcpu *vcpu, struct kvm_run *run, 3813368bd80SJames Morse int exception_index); 3824f8d6632SMarc Zyngier 3834f8d6632SMarc Zyngier int kvm_perf_init(void); 3844f8d6632SMarc Zyngier int kvm_perf_teardown(void); 3854f8d6632SMarc Zyngier 386b7b27facSDongjiu Geng void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome); 387b7b27facSDongjiu Geng 3884429fc64SAndre Przywara struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr); 3894429fc64SAndre Przywara 3904464e210SChristoffer Dall DECLARE_PER_CPU(kvm_cpu_context_t, kvm_host_cpu_state); 3914464e210SChristoffer Dall 3927c36447aSWill Deacon void __kvm_enable_ssbs(void); 3937c36447aSWill Deacon 39412fda812SMarc Zyngier static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr, 395092bd143SMarc Zyngier unsigned long hyp_stack_ptr, 396092bd143SMarc Zyngier unsigned long vector_ptr) 397092bd143SMarc Zyngier { 3989bc03f1dSMarc Zyngier /* 3999bc03f1dSMarc Zyngier * Calculate the raw per-cpu offset without a translation from the 4009bc03f1dSMarc Zyngier * kernel's mapping to the linear mapping, and store it in tpidr_el2 4019bc03f1dSMarc Zyngier * so that we can use adr_l to access per-cpu variables in EL2. 4029bc03f1dSMarc Zyngier */ 4039bc03f1dSMarc Zyngier u64 tpidr_el2 = ((u64)this_cpu_ptr(&kvm_host_cpu_state) - 4049bc03f1dSMarc Zyngier (u64)kvm_ksym_ref(kvm_host_cpu_state)); 4054464e210SChristoffer Dall 406092bd143SMarc Zyngier /* 40763a1e1c9SMark Rutland * Call initialization code, and switch to the full blown HYP code. 40863a1e1c9SMark Rutland * If the cpucaps haven't been finalized yet, something has gone very 40963a1e1c9SMark Rutland * wrong, and hyp will crash and burn when it uses any 41063a1e1c9SMark Rutland * cpus_have_const_cap() wrapper. 411092bd143SMarc Zyngier */ 41263a1e1c9SMark Rutland BUG_ON(!static_branch_likely(&arm64_const_caps_ready)); 4139bc03f1dSMarc Zyngier __kvm_call_hyp((void *)pgd_ptr, hyp_stack_ptr, vector_ptr, tpidr_el2); 4147c36447aSWill Deacon 4157c36447aSWill Deacon /* 4167c36447aSWill Deacon * Disabling SSBD on a non-VHE system requires us to enable SSBS 4177c36447aSWill Deacon * at EL2. 4187c36447aSWill Deacon */ 4197c36447aSWill Deacon if (!has_vhe() && this_cpu_has_cap(ARM64_SSBS) && 4207c36447aSWill Deacon arm64_get_ssbd_state() == ARM64_SSBD_FORCE_DISABLE) { 4217c36447aSWill Deacon kvm_call_hyp(__kvm_enable_ssbs); 4227c36447aSWill Deacon } 423092bd143SMarc Zyngier } 424092bd143SMarc Zyngier 42585acda3bSDave Martin static inline bool kvm_arch_check_sve_has_vhe(void) 42685acda3bSDave Martin { 42785acda3bSDave Martin /* 42885acda3bSDave Martin * The Arm architecture specifies that implementation of SVE 42985acda3bSDave Martin * requires VHE also to be implemented. The KVM code for arm64 43085acda3bSDave Martin * relies on this when SVE is present: 43185acda3bSDave Martin */ 43285acda3bSDave Martin if (system_supports_sve()) 43385acda3bSDave Martin return has_vhe(); 43485acda3bSDave Martin else 43585acda3bSDave Martin return true; 43685acda3bSDave Martin } 43785acda3bSDave Martin 4380865e636SRadim Krčmář static inline void kvm_arch_hardware_unsetup(void) {} 4390865e636SRadim Krčmář static inline void kvm_arch_sync_events(struct kvm *kvm) {} 4400865e636SRadim Krčmář static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {} 4410865e636SRadim Krčmář static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 4423491caf2SChristian Borntraeger static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 4430865e636SRadim Krčmář 44456c7f5e7SAlex Bennée void kvm_arm_init_debug(void); 44556c7f5e7SAlex Bennée void kvm_arm_setup_debug(struct kvm_vcpu *vcpu); 44656c7f5e7SAlex Bennée void kvm_arm_clear_debug(struct kvm_vcpu *vcpu); 44784e690bfSAlex Bennée void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu); 448bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, 449bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 450bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, 451bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 452bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu, 453bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 45456c7f5e7SAlex Bennée 4550f62f0e9SSuzuki K Poulose static inline void __cpu_init_stage2(void) {} 45621a4179cSMarc Zyngier 457e6b673b7SDave Martin /* Guest/host FPSIMD coordination helpers */ 458e6b673b7SDave Martin int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu); 459e6b673b7SDave Martin void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu); 460e6b673b7SDave Martin void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu); 461e6b673b7SDave Martin void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu); 462e6b673b7SDave Martin 463e6b673b7SDave Martin #ifdef CONFIG_KVM /* Avoid conflicts with core headers if CONFIG_KVM=n */ 464e6b673b7SDave Martin static inline int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu) 46517eed27bSDave Martin { 466e6b673b7SDave Martin return kvm_arch_vcpu_run_map_fp(vcpu); 46717eed27bSDave Martin } 468e6b673b7SDave Martin #endif 46917eed27bSDave Martin 4704f5abad9SJames Morse static inline void kvm_arm_vhe_guest_enter(void) 4714f5abad9SJames Morse { 4724f5abad9SJames Morse local_daif_mask(); 4734f5abad9SJames Morse } 4744f5abad9SJames Morse 4754f5abad9SJames Morse static inline void kvm_arm_vhe_guest_exit(void) 4764f5abad9SJames Morse { 4774f5abad9SJames Morse local_daif_restore(DAIF_PROCCTX_NOIRQ); 4783f5c90b8SChristoffer Dall 4793f5c90b8SChristoffer Dall /* 4803f5c90b8SChristoffer Dall * When we exit from the guest we change a number of CPU configuration 4813f5c90b8SChristoffer Dall * parameters, such as traps. Make sure these changes take effect 4823f5c90b8SChristoffer Dall * before running the host or additional guests. 4833f5c90b8SChristoffer Dall */ 4843f5c90b8SChristoffer Dall isb(); 4854f5abad9SJames Morse } 4866167ec5cSMarc Zyngier 4876167ec5cSMarc Zyngier static inline bool kvm_arm_harden_branch_predictor(void) 4886167ec5cSMarc Zyngier { 4896167ec5cSMarc Zyngier return cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR); 4906167ec5cSMarc Zyngier } 4916167ec5cSMarc Zyngier 4925d81f7dcSMarc Zyngier #define KVM_SSBD_UNKNOWN -1 4935d81f7dcSMarc Zyngier #define KVM_SSBD_FORCE_DISABLE 0 4945d81f7dcSMarc Zyngier #define KVM_SSBD_KERNEL 1 4955d81f7dcSMarc Zyngier #define KVM_SSBD_FORCE_ENABLE 2 4965d81f7dcSMarc Zyngier #define KVM_SSBD_MITIGATED 3 4975d81f7dcSMarc Zyngier 4985d81f7dcSMarc Zyngier static inline int kvm_arm_have_ssbd(void) 4995d81f7dcSMarc Zyngier { 5005d81f7dcSMarc Zyngier switch (arm64_get_ssbd_state()) { 5015d81f7dcSMarc Zyngier case ARM64_SSBD_FORCE_DISABLE: 5025d81f7dcSMarc Zyngier return KVM_SSBD_FORCE_DISABLE; 5035d81f7dcSMarc Zyngier case ARM64_SSBD_KERNEL: 5045d81f7dcSMarc Zyngier return KVM_SSBD_KERNEL; 5055d81f7dcSMarc Zyngier case ARM64_SSBD_FORCE_ENABLE: 5065d81f7dcSMarc Zyngier return KVM_SSBD_FORCE_ENABLE; 5075d81f7dcSMarc Zyngier case ARM64_SSBD_MITIGATED: 5085d81f7dcSMarc Zyngier return KVM_SSBD_MITIGATED; 5095d81f7dcSMarc Zyngier case ARM64_SSBD_UNKNOWN: 5105d81f7dcSMarc Zyngier default: 5115d81f7dcSMarc Zyngier return KVM_SSBD_UNKNOWN; 5125d81f7dcSMarc Zyngier } 5135d81f7dcSMarc Zyngier } 5145d81f7dcSMarc Zyngier 515bc192ceeSChristoffer Dall void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu); 516bc192ceeSChristoffer Dall void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu); 517bc192ceeSChristoffer Dall 5180f62f0e9SSuzuki K Poulose void kvm_set_ipa_limit(void); 5190f62f0e9SSuzuki K Poulose 520d1e5b0e9SMarc Orr #define __KVM_HAVE_ARCH_VM_ALLOC 521d1e5b0e9SMarc Orr struct kvm *kvm_arch_alloc_vm(void); 522d1e5b0e9SMarc Orr void kvm_arch_free_vm(struct kvm *kvm); 523d1e5b0e9SMarc Orr 524bca607ebSMarc Zyngier int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type); 5255b6c6742SSuzuki K Poulose 5264f8d6632SMarc Zyngier #endif /* __ARM64_KVM_HOST_H__ */ 527