1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 24f8d6632SMarc Zyngier /* 34f8d6632SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 44f8d6632SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 54f8d6632SMarc Zyngier * 64f8d6632SMarc Zyngier * Derived from arch/arm/include/asm/kvm_host.h: 74f8d6632SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 84f8d6632SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 94f8d6632SMarc Zyngier */ 104f8d6632SMarc Zyngier 114f8d6632SMarc Zyngier #ifndef __ARM64_KVM_HOST_H__ 124f8d6632SMarc Zyngier #define __ARM64_KVM_HOST_H__ 134f8d6632SMarc Zyngier 1405469831SAndrew Scull #include <linux/arm-smccc.h> 153f61f409SDave Martin #include <linux/bitmap.h> 1665647300SPaolo Bonzini #include <linux/types.h> 173f61f409SDave Martin #include <linux/jump_label.h> 1865647300SPaolo Bonzini #include <linux/kvm_types.h> 193f61f409SDave Martin #include <linux/percpu.h> 20ff367fe4SDavid Brazdil #include <linux/psci.h> 2185738e05SJulien Thierry #include <asm/arch_gicv3.h> 223f61f409SDave Martin #include <asm/barrier.h> 2363a1e1c9SMark Rutland #include <asm/cpufeature.h> 241e0cf16cSMarc Zyngier #include <asm/cputype.h> 254f5abad9SJames Morse #include <asm/daifflags.h> 2617eed27bSDave Martin #include <asm/fpsimd.h> 274f8d6632SMarc Zyngier #include <asm/kvm.h> 283a3604bcSMarc Zyngier #include <asm/kvm_asm.h> 294f8d6632SMarc Zyngier 30c1426e4cSEric Auger #define __KVM_HAVE_ARCH_INTC_INITIALIZED 31c1426e4cSEric Auger 32920552b2SDavid Hildenbrand #define KVM_HALT_POLL_NS_DEFAULT 500000 334f8d6632SMarc Zyngier 344f8d6632SMarc Zyngier #include <kvm/arm_vgic.h> 354f8d6632SMarc Zyngier #include <kvm/arm_arch_timer.h> 3604fe4726SShannon Zhao #include <kvm/arm_pmu.h> 374f8d6632SMarc Zyngier 38ef748917SMing Lei #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS 39ef748917SMing Lei 40a22fa321SAmit Daniel Kachhap #define KVM_VCPU_MAX_FEATURES 7 414f8d6632SMarc Zyngier 427b244e2bSAndrew Jones #define KVM_REQ_SLEEP \ 432387149eSAndrew Jones KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 44325f9c64SAndrew Jones #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) 45358b28f0SMarc Zyngier #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2) 468564d637SSteven Price #define KVM_REQ_RECORD_STEAL KVM_ARCH_REQ(3) 47d9c3872cSMarc Zyngier #define KVM_REQ_RELOAD_GICv4 KVM_ARCH_REQ(4) 48d0c94c49SMarc Zyngier #define KVM_REQ_RELOAD_PMU KVM_ARCH_REQ(5) 49b13216cfSChristoffer Dall 50c862626eSKeqian Zhu #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 51c862626eSKeqian Zhu KVM_DIRTY_LOG_INITIALLY_SET) 52c862626eSKeqian Zhu 53d8b369c4SDavid Brazdil /* 54d8b369c4SDavid Brazdil * Mode of operation configurable with kvm-arm.mode early param. 55d8b369c4SDavid Brazdil * See Documentation/admin-guide/kernel-parameters.txt for more information. 56d8b369c4SDavid Brazdil */ 57d8b369c4SDavid Brazdil enum kvm_mode { 58d8b369c4SDavid Brazdil KVM_MODE_DEFAULT, 59d8b369c4SDavid Brazdil KVM_MODE_PROTECTED, 60b6a68b97SMarc Zyngier KVM_MODE_NONE, 61d8b369c4SDavid Brazdil }; 623eb681fbSDavid Brazdil enum kvm_mode kvm_get_mode(void); 63d8b369c4SDavid Brazdil 6461bbe380SChristoffer Dall DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 6561bbe380SChristoffer Dall 669033bba4SDave Martin extern unsigned int kvm_sve_max_vl; 67a3be836dSDave Martin int kvm_arm_init_sve(void); 680f062bfeSDave Martin 696b7982feSAnshuman Khandual u32 __attribute_const__ kvm_target_cpu(void); 704f8d6632SMarc Zyngier int kvm_reset_vcpu(struct kvm_vcpu *vcpu); 7119bcc89eSSean Christopherson void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu); 724f8d6632SMarc Zyngier 73e329fb75SChristoffer Dall struct kvm_vmid { 744f8d6632SMarc Zyngier /* The VMID generation used for the virt. memory system */ 754f8d6632SMarc Zyngier u64 vmid_gen; 764f8d6632SMarc Zyngier u32 vmid; 77e329fb75SChristoffer Dall }; 78e329fb75SChristoffer Dall 79a0e50aa3SChristoffer Dall struct kvm_s2_mmu { 80e329fb75SChristoffer Dall struct kvm_vmid vmid; 814f8d6632SMarc Zyngier 82a0e50aa3SChristoffer Dall /* 83a0e50aa3SChristoffer Dall * stage2 entry level table 84a0e50aa3SChristoffer Dall * 85a0e50aa3SChristoffer Dall * Two kvm_s2_mmu structures in the same VM can point to the same 86a0e50aa3SChristoffer Dall * pgd here. This happens when running a guest using a 87a0e50aa3SChristoffer Dall * translation regime that isn't affected by its own stage-2 88a0e50aa3SChristoffer Dall * translation, such as a non-VHE hypervisor running at vEL2, or 89a0e50aa3SChristoffer Dall * for vEL1/EL0 with vHCR_EL2.VM == 0. In that case, we use the 90a0e50aa3SChristoffer Dall * canonical stage-2 page tables. 91a0e50aa3SChristoffer Dall */ 92e329fb75SChristoffer Dall phys_addr_t pgd_phys; 9371233d05SWill Deacon struct kvm_pgtable *pgt; 944f8d6632SMarc Zyngier 9594d0e598SMarc Zyngier /* The last vcpu id that ran on each physical CPU */ 9694d0e598SMarc Zyngier int __percpu *last_vcpu_ran; 9794d0e598SMarc Zyngier 98cfb1a98dSQuentin Perret struct kvm_arch *arch; 99a0e50aa3SChristoffer Dall }; 100a0e50aa3SChristoffer Dall 1018d14797bSWill Deacon struct kvm_arch_memory_slot { 1028d14797bSWill Deacon }; 1038d14797bSWill Deacon 104a0e50aa3SChristoffer Dall struct kvm_arch { 105a0e50aa3SChristoffer Dall struct kvm_s2_mmu mmu; 106a0e50aa3SChristoffer Dall 107a0e50aa3SChristoffer Dall /* VTCR_EL2 value for this VM */ 108a0e50aa3SChristoffer Dall u64 vtcr; 109a0e50aa3SChristoffer Dall 1103caa2d8cSAndre Przywara /* The maximum number of vCPUs depends on the used GIC model */ 1113caa2d8cSAndre Przywara int max_vcpus; 1123caa2d8cSAndre Przywara 1134f8d6632SMarc Zyngier /* Interrupt controller */ 1144f8d6632SMarc Zyngier struct vgic_dist vgic; 11585bd0ba1SMarc Zyngier 11685bd0ba1SMarc Zyngier /* Mandated version of PSCI */ 11785bd0ba1SMarc Zyngier u32 psci_version; 118c726200dSChristoffer Dall 119c726200dSChristoffer Dall /* 120c726200dSChristoffer Dall * If we encounter a data abort without valid instruction syndrome 121c726200dSChristoffer Dall * information, report this to user space. User space can (and 122c726200dSChristoffer Dall * should) opt in to this feature if KVM_CAP_ARM_NISV_TO_USER is 123c726200dSChristoffer Dall * supported. 124c726200dSChristoffer Dall */ 125c726200dSChristoffer Dall bool return_nisv_io_abort_to_user; 126fd65a3b5SMarc Zyngier 127d7eec236SMarc Zyngier /* 128d7eec236SMarc Zyngier * VM-wide PMU filter, implemented as a bitmap and big enough for 129d7eec236SMarc Zyngier * up to 2^10 events (ARMv8.0) or 2^16 events (ARMv8.1+). 130d7eec236SMarc Zyngier */ 131d7eec236SMarc Zyngier unsigned long *pmu_filter; 132*46b18782SMarc Zyngier struct arm_pmu *arm_pmu; 13323711a5eSMarc Zyngier 13423711a5eSMarc Zyngier u8 pfr0_csv2; 1354f1df628SMarc Zyngier u8 pfr0_csv3; 136ea7fc1bbSSteven Price 137ea7fc1bbSSteven Price /* Memory Tagging Extension enabled for the guest */ 138ea7fc1bbSSteven Price bool mte_enabled; 1395177fe91SMarc Zyngier bool ran_once; 1404f8d6632SMarc Zyngier }; 1414f8d6632SMarc Zyngier 1424f8d6632SMarc Zyngier struct kvm_vcpu_fault_info { 1434f8d6632SMarc Zyngier u32 esr_el2; /* Hyp Syndrom Register */ 1444f8d6632SMarc Zyngier u64 far_el2; /* Hyp Fault Address Register */ 1454f8d6632SMarc Zyngier u64 hpfar_el2; /* Hyp IPA Fault Address Register */ 1460067df41SJames Morse u64 disr_el1; /* Deferred [SError] Status Register */ 1474f8d6632SMarc Zyngier }; 1484f8d6632SMarc Zyngier 1499d8415d6SMarc Zyngier enum vcpu_sysreg { 1508f7f4fe7SMarc Zyngier __INVALID_SYSREG__, /* 0 is reserved as an invalid value */ 1519d8415d6SMarc Zyngier MPIDR_EL1, /* MultiProcessor Affinity Register */ 1529d8415d6SMarc Zyngier CSSELR_EL1, /* Cache Size Selection Register */ 1539d8415d6SMarc Zyngier SCTLR_EL1, /* System Control Register */ 1549d8415d6SMarc Zyngier ACTLR_EL1, /* Auxiliary Control Register */ 1559d8415d6SMarc Zyngier CPACR_EL1, /* Coprocessor Access Control */ 15673433762SDave Martin ZCR_EL1, /* SVE Control */ 1579d8415d6SMarc Zyngier TTBR0_EL1, /* Translation Table Base Register 0 */ 1589d8415d6SMarc Zyngier TTBR1_EL1, /* Translation Table Base Register 1 */ 1599d8415d6SMarc Zyngier TCR_EL1, /* Translation Control Register */ 1609d8415d6SMarc Zyngier ESR_EL1, /* Exception Syndrome Register */ 161ef769e32SAdam Buchbinder AFSR0_EL1, /* Auxiliary Fault Status Register 0 */ 162ef769e32SAdam Buchbinder AFSR1_EL1, /* Auxiliary Fault Status Register 1 */ 1639d8415d6SMarc Zyngier FAR_EL1, /* Fault Address Register */ 1649d8415d6SMarc Zyngier MAIR_EL1, /* Memory Attribute Indirection Register */ 1659d8415d6SMarc Zyngier VBAR_EL1, /* Vector Base Address Register */ 1669d8415d6SMarc Zyngier CONTEXTIDR_EL1, /* Context ID Register */ 1679d8415d6SMarc Zyngier TPIDR_EL0, /* Thread ID, User R/W */ 1689d8415d6SMarc Zyngier TPIDRRO_EL0, /* Thread ID, User R/O */ 1699d8415d6SMarc Zyngier TPIDR_EL1, /* Thread ID, Privileged */ 1709d8415d6SMarc Zyngier AMAIR_EL1, /* Aux Memory Attribute Indirection Register */ 1719d8415d6SMarc Zyngier CNTKCTL_EL1, /* Timer Control Register (EL1) */ 1729d8415d6SMarc Zyngier PAR_EL1, /* Physical Address Register */ 1739d8415d6SMarc Zyngier MDSCR_EL1, /* Monitor Debug System Control Register */ 1749d8415d6SMarc Zyngier MDCCINT_EL1, /* Monitor Debug Comms Channel Interrupt Enable Reg */ 175c773ae2bSJames Morse DISR_EL1, /* Deferred Interrupt Status Register */ 1769d8415d6SMarc Zyngier 177ab946834SShannon Zhao /* Performance Monitors Registers */ 178ab946834SShannon Zhao PMCR_EL0, /* Control Register */ 1793965c3ceSShannon Zhao PMSELR_EL0, /* Event Counter Selection Register */ 180051ff581SShannon Zhao PMEVCNTR0_EL0, /* Event Counter Register (0-30) */ 181051ff581SShannon Zhao PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30, 182051ff581SShannon Zhao PMCCNTR_EL0, /* Cycle Counter Register */ 1839feb21acSShannon Zhao PMEVTYPER0_EL0, /* Event Type Register (0-30) */ 1849feb21acSShannon Zhao PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30, 1859feb21acSShannon Zhao PMCCFILTR_EL0, /* Cycle Count Filter Register */ 18696b0eebcSShannon Zhao PMCNTENSET_EL0, /* Count Enable Set Register */ 1879db52c78SShannon Zhao PMINTENSET_EL1, /* Interrupt Enable Set Register */ 18876d883c4SShannon Zhao PMOVSSET_EL0, /* Overflow Flag Status Set Register */ 189d692b8adSShannon Zhao PMUSERENR_EL0, /* User Enable Register */ 190ab946834SShannon Zhao 191384b40caSMark Rutland /* Pointer Authentication Registers in a strict increasing order. */ 192384b40caSMark Rutland APIAKEYLO_EL1, 193384b40caSMark Rutland APIAKEYHI_EL1, 194384b40caSMark Rutland APIBKEYLO_EL1, 195384b40caSMark Rutland APIBKEYHI_EL1, 196384b40caSMark Rutland APDAKEYLO_EL1, 197384b40caSMark Rutland APDAKEYHI_EL1, 198384b40caSMark Rutland APDBKEYLO_EL1, 199384b40caSMark Rutland APDBKEYHI_EL1, 200384b40caSMark Rutland APGAKEYLO_EL1, 201384b40caSMark Rutland APGAKEYHI_EL1, 202384b40caSMark Rutland 20398909e6dSMarc Zyngier ELR_EL1, 2041bded23eSMarc Zyngier SP_EL1, 205710f1982SMarc Zyngier SPSR_EL1, 20698909e6dSMarc Zyngier 20741ce82f6SMarc Zyngier CNTVOFF_EL2, 20841ce82f6SMarc Zyngier CNTV_CVAL_EL0, 20941ce82f6SMarc Zyngier CNTV_CTL_EL0, 21041ce82f6SMarc Zyngier CNTP_CVAL_EL0, 21141ce82f6SMarc Zyngier CNTP_CTL_EL0, 21241ce82f6SMarc Zyngier 213e1f358b5SSteven Price /* Memory Tagging Extension registers */ 214e1f358b5SSteven Price RGSR_EL1, /* Random Allocation Tag Seed Register */ 215e1f358b5SSteven Price GCR_EL1, /* Tag Control Register */ 216e1f358b5SSteven Price TFSR_EL1, /* Tag Fault Status Register (EL1) */ 217e1f358b5SSteven Price TFSRE0_EL1, /* Tag Fault Status Register (EL0) */ 218e1f358b5SSteven Price 2199d8415d6SMarc Zyngier /* 32bit specific registers. Keep them at the end of the range */ 2209d8415d6SMarc Zyngier DACR32_EL2, /* Domain Access Control Register */ 2219d8415d6SMarc Zyngier IFSR32_EL2, /* Instruction Fault Status Register */ 2229d8415d6SMarc Zyngier FPEXC32_EL2, /* Floating-Point Exception Control Register */ 2239d8415d6SMarc Zyngier DBGVCR32_EL2, /* Debug Vector Catch Register */ 2249d8415d6SMarc Zyngier 2259d8415d6SMarc Zyngier NR_SYS_REGS /* Nothing after this line! */ 2269d8415d6SMarc Zyngier }; 2279d8415d6SMarc Zyngier 2284f8d6632SMarc Zyngier struct kvm_cpu_context { 229e47c2055SMarc Zyngier struct user_pt_regs regs; /* sp = sp_el0 */ 230e47c2055SMarc Zyngier 231fd85b667SMarc Zyngier u64 spsr_abt; 232fd85b667SMarc Zyngier u64 spsr_und; 233fd85b667SMarc Zyngier u64 spsr_irq; 234fd85b667SMarc Zyngier u64 spsr_fiq; 235e47c2055SMarc Zyngier 236e47c2055SMarc Zyngier struct user_fpsimd_state fp_regs; 237e47c2055SMarc Zyngier 2384f8d6632SMarc Zyngier u64 sys_regs[NR_SYS_REGS]; 239c97e166eSJames Morse 240c97e166eSJames Morse struct kvm_vcpu *__hyp_running_vcpu; 2414f8d6632SMarc Zyngier }; 2424f8d6632SMarc Zyngier 243eb41238cSAndrew Murray struct kvm_pmu_events { 244eb41238cSAndrew Murray u32 events_host; 245eb41238cSAndrew Murray u32 events_guest; 246eb41238cSAndrew Murray }; 247eb41238cSAndrew Murray 248630a1685SAndrew Murray struct kvm_host_data { 249630a1685SAndrew Murray struct kvm_cpu_context host_ctxt; 250eb41238cSAndrew Murray struct kvm_pmu_events pmu_events; 251630a1685SAndrew Murray }; 252630a1685SAndrew Murray 253ff367fe4SDavid Brazdil struct kvm_host_psci_config { 254ff367fe4SDavid Brazdil /* PSCI version used by host. */ 255ff367fe4SDavid Brazdil u32 version; 256ff367fe4SDavid Brazdil 257ff367fe4SDavid Brazdil /* Function IDs used by host if version is v0.1. */ 258ff367fe4SDavid Brazdil struct psci_0_1_function_ids function_ids_0_1; 259ff367fe4SDavid Brazdil 260767c973fSMarc Zyngier bool psci_0_1_cpu_suspend_implemented; 261767c973fSMarc Zyngier bool psci_0_1_cpu_on_implemented; 262767c973fSMarc Zyngier bool psci_0_1_cpu_off_implemented; 263767c973fSMarc Zyngier bool psci_0_1_migrate_implemented; 264ff367fe4SDavid Brazdil }; 265ff367fe4SDavid Brazdil 266ff367fe4SDavid Brazdil extern struct kvm_host_psci_config kvm_nvhe_sym(kvm_host_psci_config); 267ff367fe4SDavid Brazdil #define kvm_host_psci_config CHOOSE_NVHE_SYM(kvm_host_psci_config) 268ff367fe4SDavid Brazdil 26961fe0c37SDavid Brazdil extern s64 kvm_nvhe_sym(hyp_physvirt_offset); 27061fe0c37SDavid Brazdil #define hyp_physvirt_offset CHOOSE_NVHE_SYM(hyp_physvirt_offset) 27161fe0c37SDavid Brazdil 27261fe0c37SDavid Brazdil extern u64 kvm_nvhe_sym(hyp_cpu_logical_map)[NR_CPUS]; 27361fe0c37SDavid Brazdil #define hyp_cpu_logical_map CHOOSE_NVHE_SYM(hyp_cpu_logical_map) 27461fe0c37SDavid Brazdil 275358b28f0SMarc Zyngier struct vcpu_reset_state { 276358b28f0SMarc Zyngier unsigned long pc; 277358b28f0SMarc Zyngier unsigned long r0; 278358b28f0SMarc Zyngier bool be; 279358b28f0SMarc Zyngier bool reset; 280358b28f0SMarc Zyngier }; 281358b28f0SMarc Zyngier 2824f8d6632SMarc Zyngier struct kvm_vcpu_arch { 2834f8d6632SMarc Zyngier struct kvm_cpu_context ctxt; 284b43b5dd9SDave Martin void *sve_state; 285b43b5dd9SDave Martin unsigned int sve_max_vl; 2864f8d6632SMarc Zyngier 287a0e50aa3SChristoffer Dall /* Stage 2 paging state used by the hardware on next switch */ 288a0e50aa3SChristoffer Dall struct kvm_s2_mmu *hw_mmu; 289a0e50aa3SChristoffer Dall 2901460b4b2SFuad Tabba /* Values of trap registers for the guest. */ 2914f8d6632SMarc Zyngier u64 hcr_el2; 292d6c850ddSFuad Tabba u64 mdcr_el2; 293cd496228SFuad Tabba u64 cptr_el2; 2944f8d6632SMarc Zyngier 2951460b4b2SFuad Tabba /* Values of trap registers for the host before guest entry. */ 2961460b4b2SFuad Tabba u64 mdcr_el2_host; 2974f8d6632SMarc Zyngier 2984f8d6632SMarc Zyngier /* Exception Information */ 2994f8d6632SMarc Zyngier struct kvm_vcpu_fault_info fault; 3004f8d6632SMarc Zyngier 301fa89d31cSDave Martin /* Miscellaneous vcpu state flags */ 302fa89d31cSDave Martin u64 flags; 3030c557ed4SMarc Zyngier 30484e690bfSAlex Bennée /* 30584e690bfSAlex Bennée * We maintain more than a single set of debug registers to support 30684e690bfSAlex Bennée * debugging the guest from the host and to maintain separate host and 30784e690bfSAlex Bennée * guest state during world switches. vcpu_debug_state are the debug 30884e690bfSAlex Bennée * registers of the vcpu as the guest sees them. host_debug_state are 309834bf887SAlex Bennée * the host registers which are saved and restored during 310834bf887SAlex Bennée * world switches. external_debug_state contains the debug 311834bf887SAlex Bennée * values we want to debug the guest. This is set via the 312834bf887SAlex Bennée * KVM_SET_GUEST_DEBUG ioctl. 31384e690bfSAlex Bennée * 31484e690bfSAlex Bennée * debug_ptr points to the set of debug registers that should be loaded 31584e690bfSAlex Bennée * onto the hardware when running the guest. 31684e690bfSAlex Bennée */ 31784e690bfSAlex Bennée struct kvm_guest_debug_arch *debug_ptr; 31884e690bfSAlex Bennée struct kvm_guest_debug_arch vcpu_debug_state; 319834bf887SAlex Bennée struct kvm_guest_debug_arch external_debug_state; 32084e690bfSAlex Bennée 321e6b673b7SDave Martin struct user_fpsimd_state *host_fpsimd_state; /* hyp VA */ 32252b28657SQuentin Perret struct task_struct *parent_task; 323e6b673b7SDave Martin 324f85279b4SWill Deacon struct { 325f85279b4SWill Deacon /* {Break,watch}point registers */ 326f85279b4SWill Deacon struct kvm_guest_debug_arch regs; 327f85279b4SWill Deacon /* Statistical profiling extension */ 328f85279b4SWill Deacon u64 pmscr_el1; 329a1319260SSuzuki K Poulose /* Self-hosted trace */ 330a1319260SSuzuki K Poulose u64 trfcr_el1; 331f85279b4SWill Deacon } host_debug_state; 3324f8d6632SMarc Zyngier 3334f8d6632SMarc Zyngier /* VGIC state */ 3344f8d6632SMarc Zyngier struct vgic_cpu vgic_cpu; 3354f8d6632SMarc Zyngier struct arch_timer_cpu timer_cpu; 33604fe4726SShannon Zhao struct kvm_pmu pmu; 3374f8d6632SMarc Zyngier 3384f8d6632SMarc Zyngier /* 3394f8d6632SMarc Zyngier * Anything that is not used directly from assembly code goes 3404f8d6632SMarc Zyngier * here. 3414f8d6632SMarc Zyngier */ 3424f8d6632SMarc Zyngier 343337b99bfSAlex Bennée /* 344337b99bfSAlex Bennée * Guest registers we preserve during guest debugging. 345337b99bfSAlex Bennée * 346337b99bfSAlex Bennée * These shadow registers are updated by the kvm_handle_sys_reg 347337b99bfSAlex Bennée * trap handler if the guest accesses or updates them while we 348337b99bfSAlex Bennée * are using guest debug. 349337b99bfSAlex Bennée */ 350337b99bfSAlex Bennée struct { 351337b99bfSAlex Bennée u32 mdscr_el1; 352337b99bfSAlex Bennée } guest_debug_preserved; 353337b99bfSAlex Bennée 3543781528eSEric Auger /* vcpu power-off state */ 3553781528eSEric Auger bool power_off; 3564f8d6632SMarc Zyngier 3573b92830aSEric Auger /* Don't run the guest (internal implementation need) */ 3583b92830aSEric Auger bool pause; 3593b92830aSEric Auger 3604f8d6632SMarc Zyngier /* Cache some mmu pages needed inside spinlock regions */ 3614f8d6632SMarc Zyngier struct kvm_mmu_memory_cache mmu_page_cache; 3624f8d6632SMarc Zyngier 3634f8d6632SMarc Zyngier /* Target CPU and feature flags */ 3646c8c0c4dSChen Gang int target; 3654f8d6632SMarc Zyngier DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES); 3664f8d6632SMarc Zyngier 3674715c14bSJames Morse /* Virtual SError ESR to restore when HCR_EL2.VSE is set */ 3684715c14bSJames Morse u64 vsesr_el2; 369d47533daSChristoffer Dall 370358b28f0SMarc Zyngier /* Additional reset state */ 371358b28f0SMarc Zyngier struct vcpu_reset_state reset_state; 372358b28f0SMarc Zyngier 373d47533daSChristoffer Dall /* True when deferrable sysregs are loaded on the physical CPU, 37413aeb9b4SDavid Brazdil * see kvm_vcpu_load_sysregs_vhe and kvm_vcpu_put_sysregs_vhe. */ 375d47533daSChristoffer Dall bool sysregs_loaded_on_cpu; 3768564d637SSteven Price 3778564d637SSteven Price /* Guest PV state */ 3788564d637SSteven Price struct { 3798564d637SSteven Price u64 last_steal; 3808564d637SSteven Price gpa_t base; 3818564d637SSteven Price } steal; 3824f8d6632SMarc Zyngier }; 3834f8d6632SMarc Zyngier 384b43b5dd9SDave Martin /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ 385985d3a1bSMarc Zyngier #define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) + \ 386985d3a1bSMarc Zyngier sve_ffr_offset((vcpu)->arch.sve_max_vl)) 387b43b5dd9SDave Martin 388468f3477SMarc Zyngier #define vcpu_sve_max_vq(vcpu) sve_vq_from_vl((vcpu)->arch.sve_max_vl) 389b3eb56b6SDave Martin 390e1c9c983SDave Martin #define vcpu_sve_state_size(vcpu) ({ \ 391e1c9c983SDave Martin size_t __size_ret; \ 392e1c9c983SDave Martin unsigned int __vcpu_vq; \ 393e1c9c983SDave Martin \ 394e1c9c983SDave Martin if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) { \ 395e1c9c983SDave Martin __size_ret = 0; \ 396e1c9c983SDave Martin } else { \ 397468f3477SMarc Zyngier __vcpu_vq = vcpu_sve_max_vq(vcpu); \ 398e1c9c983SDave Martin __size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq); \ 399e1c9c983SDave Martin } \ 400e1c9c983SDave Martin \ 401e1c9c983SDave Martin __size_ret; \ 402e1c9c983SDave Martin }) 403e1c9c983SDave Martin 404fa89d31cSDave Martin /* vcpu_arch flags field values: */ 405fa89d31cSDave Martin #define KVM_ARM64_DEBUG_DIRTY (1 << 0) 406e6b673b7SDave Martin #define KVM_ARM64_FP_ENABLED (1 << 1) /* guest FP regs loaded */ 407e6b673b7SDave Martin #define KVM_ARM64_FP_HOST (1 << 2) /* host FP regs loaded */ 408fa89d31cSDave Martin #define KVM_ARM64_HOST_SVE_ENABLED (1 << 4) /* SVE enabled for EL0 */ 4091765edbaSDave Martin #define KVM_ARM64_GUEST_HAS_SVE (1 << 5) /* SVE exposed to guest */ 4109033bba4SDave Martin #define KVM_ARM64_VCPU_SVE_FINALIZED (1 << 6) /* SVE config completed */ 411b890d75cSAmit Daniel Kachhap #define KVM_ARM64_GUEST_HAS_PTRAUTH (1 << 7) /* PTRAUTH exposed to guest */ 412e650b64fSMarc Zyngier #define KVM_ARM64_PENDING_EXCEPTION (1 << 8) /* Exception pending */ 413892fd259SMarc Zyngier /* 414892fd259SMarc Zyngier * Overlaps with KVM_ARM64_EXCEPT_MASK on purpose so that it can't be 415892fd259SMarc Zyngier * set together with an exception... 416892fd259SMarc Zyngier */ 417892fd259SMarc Zyngier #define KVM_ARM64_INCREMENT_PC (1 << 9) /* Increment PC */ 418e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_MASK (7 << 9) /* Target EL/MODE */ 419e650b64fSMarc Zyngier /* 420e650b64fSMarc Zyngier * When KVM_ARM64_PENDING_EXCEPTION is set, KVM_ARM64_EXCEPT_MASK can 421e650b64fSMarc Zyngier * take the following values: 422e650b64fSMarc Zyngier * 423e650b64fSMarc Zyngier * For AArch32 EL1: 424e650b64fSMarc Zyngier */ 425e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA32_UND (0 << 9) 426e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA32_IABT (1 << 9) 427e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA32_DABT (2 << 9) 428e650b64fSMarc Zyngier /* For AArch64: */ 429e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_SYNC (0 << 9) 430e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_IRQ (1 << 9) 431e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_FIQ (2 << 9) 432e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_ELx_SERR (3 << 9) 433e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_EL1 (0 << 11) 434e650b64fSMarc Zyngier #define KVM_ARM64_EXCEPT_AA64_EL2 (1 << 11) 435e650b64fSMarc Zyngier 436892fd259SMarc Zyngier #define KVM_ARM64_DEBUG_STATE_SAVE_SPE (1 << 12) /* Save SPE context if active */ 437892fd259SMarc Zyngier #define KVM_ARM64_DEBUG_STATE_SAVE_TRBE (1 << 13) /* Save TRBE context if active */ 438af9a0e21SMarc Zyngier #define KVM_ARM64_FP_FOREIGN_FPSTATE (1 << 14) 439892fd259SMarc Zyngier 440892fd259SMarc Zyngier #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \ 441892fd259SMarc Zyngier KVM_GUESTDBG_USE_SW_BP | \ 442892fd259SMarc Zyngier KVM_GUESTDBG_USE_HW | \ 443892fd259SMarc Zyngier KVM_GUESTDBG_SINGLESTEP) 4441765edbaSDave Martin 4451765edbaSDave Martin #define vcpu_has_sve(vcpu) (system_supports_sve() && \ 4461765edbaSDave Martin ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_SVE)) 4474f8d6632SMarc Zyngier 448bf4086b1SMarc Zyngier #ifdef CONFIG_ARM64_PTR_AUTH 449bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) \ 450bf4086b1SMarc Zyngier ((cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) || \ 451bf4086b1SMarc Zyngier cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) && \ 452bf4086b1SMarc Zyngier (vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_PTRAUTH) 453bf4086b1SMarc Zyngier #else 454bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) false 455bf4086b1SMarc Zyngier #endif 456b890d75cSAmit Daniel Kachhap 457e47c2055SMarc Zyngier #define vcpu_gp_regs(v) (&(v)->arch.ctxt.regs) 4588d404c4cSChristoffer Dall 4598d404c4cSChristoffer Dall /* 4601b422dd7SMarc Zyngier * Only use __vcpu_sys_reg/ctxt_sys_reg if you know you want the 4611b422dd7SMarc Zyngier * memory backed version of a register, and not the one most recently 4621b422dd7SMarc Zyngier * accessed by a running VCPU. For example, for userspace access or 4631b422dd7SMarc Zyngier * for system registers that are never context switched, but only 4641b422dd7SMarc Zyngier * emulated. 4658d404c4cSChristoffer Dall */ 4661b422dd7SMarc Zyngier #define __ctxt_sys_reg(c,r) (&(c)->sys_regs[(r)]) 4671b422dd7SMarc Zyngier 4681b422dd7SMarc Zyngier #define ctxt_sys_reg(c,r) (*__ctxt_sys_reg(c,r)) 4691b422dd7SMarc Zyngier 4701b422dd7SMarc Zyngier #define __vcpu_sys_reg(v,r) (ctxt_sys_reg(&(v)->arch.ctxt, (r))) 4718d404c4cSChristoffer Dall 472da6f1666SChristoffer Dall u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg); 473d47533daSChristoffer Dall void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg); 4748d404c4cSChristoffer Dall 47521c81001SMarc Zyngier static inline bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val) 47621c81001SMarc Zyngier { 47721c81001SMarc Zyngier /* 47821c81001SMarc Zyngier * *** VHE ONLY *** 47921c81001SMarc Zyngier * 48021c81001SMarc Zyngier * System registers listed in the switch are not saved on every 48121c81001SMarc Zyngier * exit from the guest but are only saved on vcpu_put. 48221c81001SMarc Zyngier * 48321c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 48421c81001SMarc Zyngier * should never be listed below, because the guest cannot modify its 48521c81001SMarc Zyngier * own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's 48621c81001SMarc Zyngier * thread when emulating cross-VCPU communication. 48721c81001SMarc Zyngier */ 48821c81001SMarc Zyngier if (!has_vhe()) 48921c81001SMarc Zyngier return false; 49021c81001SMarc Zyngier 49121c81001SMarc Zyngier switch (reg) { 49221c81001SMarc Zyngier case CSSELR_EL1: *val = read_sysreg_s(SYS_CSSELR_EL1); break; 49321c81001SMarc Zyngier case SCTLR_EL1: *val = read_sysreg_s(SYS_SCTLR_EL12); break; 49421c81001SMarc Zyngier case CPACR_EL1: *val = read_sysreg_s(SYS_CPACR_EL12); break; 49521c81001SMarc Zyngier case TTBR0_EL1: *val = read_sysreg_s(SYS_TTBR0_EL12); break; 49621c81001SMarc Zyngier case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); break; 49721c81001SMarc Zyngier case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break; 49821c81001SMarc Zyngier case ESR_EL1: *val = read_sysreg_s(SYS_ESR_EL12); break; 49921c81001SMarc Zyngier case AFSR0_EL1: *val = read_sysreg_s(SYS_AFSR0_EL12); break; 50021c81001SMarc Zyngier case AFSR1_EL1: *val = read_sysreg_s(SYS_AFSR1_EL12); break; 50121c81001SMarc Zyngier case FAR_EL1: *val = read_sysreg_s(SYS_FAR_EL12); break; 50221c81001SMarc Zyngier case MAIR_EL1: *val = read_sysreg_s(SYS_MAIR_EL12); break; 50321c81001SMarc Zyngier case VBAR_EL1: *val = read_sysreg_s(SYS_VBAR_EL12); break; 50421c81001SMarc Zyngier case CONTEXTIDR_EL1: *val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break; 50521c81001SMarc Zyngier case TPIDR_EL0: *val = read_sysreg_s(SYS_TPIDR_EL0); break; 50621c81001SMarc Zyngier case TPIDRRO_EL0: *val = read_sysreg_s(SYS_TPIDRRO_EL0); break; 50721c81001SMarc Zyngier case TPIDR_EL1: *val = read_sysreg_s(SYS_TPIDR_EL1); break; 50821c81001SMarc Zyngier case AMAIR_EL1: *val = read_sysreg_s(SYS_AMAIR_EL12); break; 50921c81001SMarc Zyngier case CNTKCTL_EL1: *val = read_sysreg_s(SYS_CNTKCTL_EL12); break; 51021c81001SMarc Zyngier case ELR_EL1: *val = read_sysreg_s(SYS_ELR_EL12); break; 51121c81001SMarc Zyngier case PAR_EL1: *val = read_sysreg_par(); break; 51221c81001SMarc Zyngier case DACR32_EL2: *val = read_sysreg_s(SYS_DACR32_EL2); break; 51321c81001SMarc Zyngier case IFSR32_EL2: *val = read_sysreg_s(SYS_IFSR32_EL2); break; 51421c81001SMarc Zyngier case DBGVCR32_EL2: *val = read_sysreg_s(SYS_DBGVCR32_EL2); break; 51521c81001SMarc Zyngier default: return false; 51621c81001SMarc Zyngier } 51721c81001SMarc Zyngier 51821c81001SMarc Zyngier return true; 51921c81001SMarc Zyngier } 52021c81001SMarc Zyngier 52121c81001SMarc Zyngier static inline bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg) 52221c81001SMarc Zyngier { 52321c81001SMarc Zyngier /* 52421c81001SMarc Zyngier * *** VHE ONLY *** 52521c81001SMarc Zyngier * 52621c81001SMarc Zyngier * System registers listed in the switch are not restored on every 52721c81001SMarc Zyngier * entry to the guest but are only restored on vcpu_load. 52821c81001SMarc Zyngier * 52921c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 53021c81001SMarc Zyngier * should never be listed below, because the MPIDR should only be set 53121c81001SMarc Zyngier * once, before running the VCPU, and never changed later. 53221c81001SMarc Zyngier */ 53321c81001SMarc Zyngier if (!has_vhe()) 53421c81001SMarc Zyngier return false; 53521c81001SMarc Zyngier 53621c81001SMarc Zyngier switch (reg) { 53721c81001SMarc Zyngier case CSSELR_EL1: write_sysreg_s(val, SYS_CSSELR_EL1); break; 53821c81001SMarc Zyngier case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break; 53921c81001SMarc Zyngier case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); break; 54021c81001SMarc Zyngier case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); break; 54121c81001SMarc Zyngier case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break; 54221c81001SMarc Zyngier case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; 54321c81001SMarc Zyngier case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); break; 54421c81001SMarc Zyngier case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); break; 54521c81001SMarc Zyngier case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); break; 54621c81001SMarc Zyngier case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); break; 54721c81001SMarc Zyngier case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); break; 54821c81001SMarc Zyngier case VBAR_EL1: write_sysreg_s(val, SYS_VBAR_EL12); break; 54921c81001SMarc Zyngier case CONTEXTIDR_EL1: write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break; 55021c81001SMarc Zyngier case TPIDR_EL0: write_sysreg_s(val, SYS_TPIDR_EL0); break; 55121c81001SMarc Zyngier case TPIDRRO_EL0: write_sysreg_s(val, SYS_TPIDRRO_EL0); break; 55221c81001SMarc Zyngier case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); break; 55321c81001SMarc Zyngier case AMAIR_EL1: write_sysreg_s(val, SYS_AMAIR_EL12); break; 55421c81001SMarc Zyngier case CNTKCTL_EL1: write_sysreg_s(val, SYS_CNTKCTL_EL12); break; 55521c81001SMarc Zyngier case ELR_EL1: write_sysreg_s(val, SYS_ELR_EL12); break; 55621c81001SMarc Zyngier case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); break; 55721c81001SMarc Zyngier case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); break; 55821c81001SMarc Zyngier case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); break; 55921c81001SMarc Zyngier case DBGVCR32_EL2: write_sysreg_s(val, SYS_DBGVCR32_EL2); break; 56021c81001SMarc Zyngier default: return false; 56121c81001SMarc Zyngier } 56221c81001SMarc Zyngier 56321c81001SMarc Zyngier return true; 56421c81001SMarc Zyngier } 56521c81001SMarc Zyngier 5664f8d6632SMarc Zyngier struct kvm_vm_stat { 5670193cc90SJing Zhang struct kvm_vm_stat_generic generic; 5684f8d6632SMarc Zyngier }; 5694f8d6632SMarc Zyngier 5704f8d6632SMarc Zyngier struct kvm_vcpu_stat { 5710193cc90SJing Zhang struct kvm_vcpu_stat_generic generic; 5728a7e75d4SSuraj Jitindar Singh u64 hvc_exit_stat; 573b19e6892SAmit Tomar u64 wfe_exit_stat; 574b19e6892SAmit Tomar u64 wfi_exit_stat; 575b19e6892SAmit Tomar u64 mmio_exit_user; 576b19e6892SAmit Tomar u64 mmio_exit_kernel; 577fe5161d2SOliver Upton u64 signal_exits; 578b19e6892SAmit Tomar u64 exits; 5794f8d6632SMarc Zyngier }; 5804f8d6632SMarc Zyngier 58108e873cbSYueHaibing void kvm_vcpu_preferred_target(struct kvm_vcpu_init *init); 5824f8d6632SMarc Zyngier unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu); 5834f8d6632SMarc Zyngier int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); 5844f8d6632SMarc Zyngier int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 5854f8d6632SMarc Zyngier int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 5866ac4a5acSMarc Zyngier 5876ac4a5acSMarc Zyngier unsigned long kvm_arm_num_sys_reg_descs(struct kvm_vcpu *vcpu); 5886ac4a5acSMarc Zyngier int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices); 5896ac4a5acSMarc Zyngier int kvm_arm_sys_reg_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *); 5906ac4a5acSMarc Zyngier int kvm_arm_sys_reg_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *); 5916ac4a5acSMarc Zyngier 592539aee0eSJames Morse int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 593b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 594b7b27facSDongjiu Geng 595539aee0eSJames Morse int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 596b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 5974f8d6632SMarc Zyngier 5984f8d6632SMarc Zyngier #define KVM_ARCH_WANT_MMU_NOTIFIER 5994f8d6632SMarc Zyngier 600b13216cfSChristoffer Dall void kvm_arm_halt_guest(struct kvm *kvm); 601b13216cfSChristoffer Dall void kvm_arm_resume_guest(struct kvm *kvm); 6024f8d6632SMarc Zyngier 603cc5705fbSMarc Zyngier #define vcpu_has_run_once(vcpu) !!rcu_access_pointer((vcpu)->pid) 604cc5705fbSMarc Zyngier 60540a50853SQuentin Perret #ifndef __KVM_NVHE_HYPERVISOR__ 606f50b6f6aSAndrew Scull #define kvm_call_hyp_nvhe(f, ...) \ 607f50b6f6aSAndrew Scull ({ \ 60805469831SAndrew Scull struct arm_smccc_res res; \ 60905469831SAndrew Scull \ 61005469831SAndrew Scull arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(f), \ 61105469831SAndrew Scull ##__VA_ARGS__, &res); \ 61205469831SAndrew Scull WARN_ON(res.a0 != SMCCC_RET_SUCCESS); \ 61305469831SAndrew Scull \ 61405469831SAndrew Scull res.a1; \ 615f50b6f6aSAndrew Scull }) 616f50b6f6aSAndrew Scull 61718fc7bf8SMarc Zyngier /* 61818fc7bf8SMarc Zyngier * The couple of isb() below are there to guarantee the same behaviour 61918fc7bf8SMarc Zyngier * on VHE as on !VHE, where the eret to EL1 acts as a context 62018fc7bf8SMarc Zyngier * synchronization event. 62118fc7bf8SMarc Zyngier */ 62218fc7bf8SMarc Zyngier #define kvm_call_hyp(f, ...) \ 62318fc7bf8SMarc Zyngier do { \ 62418fc7bf8SMarc Zyngier if (has_vhe()) { \ 62518fc7bf8SMarc Zyngier f(__VA_ARGS__); \ 62618fc7bf8SMarc Zyngier isb(); \ 62718fc7bf8SMarc Zyngier } else { \ 628f50b6f6aSAndrew Scull kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 62918fc7bf8SMarc Zyngier } \ 63018fc7bf8SMarc Zyngier } while(0) 63118fc7bf8SMarc Zyngier 63218fc7bf8SMarc Zyngier #define kvm_call_hyp_ret(f, ...) \ 63318fc7bf8SMarc Zyngier ({ \ 63418fc7bf8SMarc Zyngier typeof(f(__VA_ARGS__)) ret; \ 63518fc7bf8SMarc Zyngier \ 63618fc7bf8SMarc Zyngier if (has_vhe()) { \ 63718fc7bf8SMarc Zyngier ret = f(__VA_ARGS__); \ 63818fc7bf8SMarc Zyngier isb(); \ 63918fc7bf8SMarc Zyngier } else { \ 64005469831SAndrew Scull ret = kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 64118fc7bf8SMarc Zyngier } \ 64218fc7bf8SMarc Zyngier \ 64318fc7bf8SMarc Zyngier ret; \ 64418fc7bf8SMarc Zyngier }) 64540a50853SQuentin Perret #else /* __KVM_NVHE_HYPERVISOR__ */ 64640a50853SQuentin Perret #define kvm_call_hyp(f, ...) f(__VA_ARGS__) 64740a50853SQuentin Perret #define kvm_call_hyp_ret(f, ...) f(__VA_ARGS__) 64840a50853SQuentin Perret #define kvm_call_hyp_nvhe(f, ...) f(__VA_ARGS__) 64940a50853SQuentin Perret #endif /* __KVM_NVHE_HYPERVISOR__ */ 65022b39ca3SMarc Zyngier 651cf5d3188SChristoffer Dall void force_vm_exit(const cpumask_t *mask); 6524f8d6632SMarc Zyngier 65374cc7e0cSTianjia Zhang int handle_exit(struct kvm_vcpu *vcpu, int exception_index); 65474cc7e0cSTianjia Zhang void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index); 6554f8d6632SMarc Zyngier 6566ac4a5acSMarc Zyngier int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu); 6576ac4a5acSMarc Zyngier int kvm_handle_cp14_32(struct kvm_vcpu *vcpu); 6586ac4a5acSMarc Zyngier int kvm_handle_cp14_64(struct kvm_vcpu *vcpu); 6596ac4a5acSMarc Zyngier int kvm_handle_cp15_32(struct kvm_vcpu *vcpu); 6606ac4a5acSMarc Zyngier int kvm_handle_cp15_64(struct kvm_vcpu *vcpu); 6616ac4a5acSMarc Zyngier int kvm_handle_sys_reg(struct kvm_vcpu *vcpu); 6626ac4a5acSMarc Zyngier 6636ac4a5acSMarc Zyngier void kvm_reset_sys_regs(struct kvm_vcpu *vcpu); 6646ac4a5acSMarc Zyngier 6656ac4a5acSMarc Zyngier void kvm_sys_reg_table_init(void); 6666ac4a5acSMarc Zyngier 6670e20f5e2SMarc Zyngier /* MMIO helpers */ 6680e20f5e2SMarc Zyngier void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data); 6690e20f5e2SMarc Zyngier unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len); 6700e20f5e2SMarc Zyngier 67174cc7e0cSTianjia Zhang int kvm_handle_mmio_return(struct kvm_vcpu *vcpu); 67274cc7e0cSTianjia Zhang int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa); 6730e20f5e2SMarc Zyngier 674e1bfc245SSean Christopherson /* 675e1bfc245SSean Christopherson * Returns true if a Performance Monitoring Interrupt (PMI), a.k.a. perf event, 676e1bfc245SSean Christopherson * arrived in guest context. For arm64, any event that arrives while a vCPU is 677e1bfc245SSean Christopherson * loaded is considered to be "in guest". 678e1bfc245SSean Christopherson */ 679e1bfc245SSean Christopherson static inline bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu) 680e1bfc245SSean Christopherson { 681e1bfc245SSean Christopherson return IS_ENABLED(CONFIG_GUEST_PERF_EVENTS) && !!vcpu; 682e1bfc245SSean Christopherson } 683e1bfc245SSean Christopherson 684b48c1a45SSteven Price long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu); 6858564d637SSteven Price gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu); 6868564d637SSteven Price void kvm_update_stolen_time(struct kvm_vcpu *vcpu); 6878564d637SSteven Price 688004a0124SAndrew Jones bool kvm_arm_pvtime_supported(void); 68958772e9aSSteven Price int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu, 69058772e9aSSteven Price struct kvm_device_attr *attr); 69158772e9aSSteven Price int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu, 69258772e9aSSteven Price struct kvm_device_attr *attr); 69358772e9aSSteven Price int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu, 69458772e9aSSteven Price struct kvm_device_attr *attr); 69558772e9aSSteven Price 6968564d637SSteven Price static inline void kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch *vcpu_arch) 6978564d637SSteven Price { 6988564d637SSteven Price vcpu_arch->steal.base = GPA_INVALID; 6998564d637SSteven Price } 7008564d637SSteven Price 7018564d637SSteven Price static inline bool kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch *vcpu_arch) 7028564d637SSteven Price { 7038564d637SSteven Price return (vcpu_arch->steal.base != GPA_INVALID); 7048564d637SSteven Price } 705b48c1a45SSteven Price 706b7b27facSDongjiu Geng void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome); 707b7b27facSDongjiu Geng 7084429fc64SAndre Przywara struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr); 7094429fc64SAndre Przywara 71014ef9d04SMarc Zyngier DECLARE_KVM_HYP_PER_CPU(struct kvm_host_data, kvm_host_data); 7114464e210SChristoffer Dall 7121e0cf16cSMarc Zyngier static inline void kvm_init_host_cpu_context(struct kvm_cpu_context *cpu_ctxt) 71332f13955SMarc Zyngier { 71432f13955SMarc Zyngier /* The host's MPIDR is immutable, so let's set it up at boot time */ 71571071acfSMarc Zyngier ctxt_sys_reg(cpu_ctxt, MPIDR_EL1) = read_cpuid_mpidr(); 71632f13955SMarc Zyngier } 71732f13955SMarc Zyngier 718384b40caSMark Rutland void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu); 719384b40caSMark Rutland 7200865e636SRadim Krčmář static inline void kvm_arch_hardware_unsetup(void) {} 7210865e636SRadim Krčmář static inline void kvm_arch_sync_events(struct kvm *kvm) {} 7220865e636SRadim Krčmář static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 7230865e636SRadim Krčmář 72456c7f5e7SAlex Bennée void kvm_arm_init_debug(void); 725263d6287SAlexandru Elisei void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu); 72656c7f5e7SAlex Bennée void kvm_arm_setup_debug(struct kvm_vcpu *vcpu); 72756c7f5e7SAlex Bennée void kvm_arm_clear_debug(struct kvm_vcpu *vcpu); 72884e690bfSAlex Bennée void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu); 729bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, 730bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 731bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, 732bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 733bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu, 734bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 73556c7f5e7SAlex Bennée 736f0376edbSSteven Price long kvm_vm_ioctl_mte_copy_tags(struct kvm *kvm, 737f0376edbSSteven Price struct kvm_arm_copy_mte_tags *copy_tags); 738f0376edbSSteven Price 739e6b673b7SDave Martin /* Guest/host FPSIMD coordination helpers */ 740e6b673b7SDave Martin int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu); 741e6b673b7SDave Martin void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu); 742af9a0e21SMarc Zyngier void kvm_arch_vcpu_ctxflush_fp(struct kvm_vcpu *vcpu); 743e6b673b7SDave Martin void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu); 744e6b673b7SDave Martin void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu); 74552b28657SQuentin Perret void kvm_vcpu_unshare_task_fp(struct kvm_vcpu *vcpu); 746e6b673b7SDave Martin 747eb41238cSAndrew Murray static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr) 748eb41238cSAndrew Murray { 749435e53fbSAndrew Murray return (!has_vhe() && attr->exclude_host); 750eb41238cSAndrew Murray } 751eb41238cSAndrew Murray 752d2602bb4SSuzuki K Poulose /* Flags for host debug state */ 753d2602bb4SSuzuki K Poulose void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu); 754d2602bb4SSuzuki K Poulose void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu); 755d2602bb4SSuzuki K Poulose 756052f064dSMarc Zyngier #ifdef CONFIG_KVM 757eb41238cSAndrew Murray void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr); 758eb41238cSAndrew Murray void kvm_clr_pmu_events(u32 clr); 7593d91befbSAndrew Murray 760435e53fbSAndrew Murray void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu); 761435e53fbSAndrew Murray void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu); 762eb41238cSAndrew Murray #else 763eb41238cSAndrew Murray static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {} 764eb41238cSAndrew Murray static inline void kvm_clr_pmu_events(u32 clr) {} 765e6b673b7SDave Martin #endif 76617eed27bSDave Martin 76713aeb9b4SDavid Brazdil void kvm_vcpu_load_sysregs_vhe(struct kvm_vcpu *vcpu); 76813aeb9b4SDavid Brazdil void kvm_vcpu_put_sysregs_vhe(struct kvm_vcpu *vcpu); 769bc192ceeSChristoffer Dall 770b130a8f7SMarc Zyngier int kvm_set_ipa_limit(void); 7710f62f0e9SSuzuki K Poulose 772d1e5b0e9SMarc Orr #define __KVM_HAVE_ARCH_VM_ALLOC 773d1e5b0e9SMarc Orr struct kvm *kvm_arch_alloc_vm(void); 774d1e5b0e9SMarc Orr 775bca607ebSMarc Zyngier int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type); 7765b6c6742SSuzuki K Poulose 7772ea7f655SFuad Tabba static inline bool kvm_vm_is_protected(struct kvm *kvm) 7782ea7f655SFuad Tabba { 7792ea7f655SFuad Tabba return false; 7802ea7f655SFuad Tabba } 7812ea7f655SFuad Tabba 7822a0c3433SFuad Tabba void kvm_init_protected_traps(struct kvm_vcpu *vcpu); 7832a0c3433SFuad Tabba 78492e68b2bSDave Martin int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature); 7859033bba4SDave Martin bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu); 7869033bba4SDave Martin 7879033bba4SDave Martin #define kvm_arm_vcpu_sve_finalized(vcpu) \ 7889033bba4SDave Martin ((vcpu)->arch.flags & KVM_ARM64_VCPU_SVE_FINALIZED) 7897dd32a0dSDave Martin 790ea7fc1bbSSteven Price #define kvm_has_mte(kvm) (system_supports_mte() && (kvm)->arch.mte_enabled) 79114bda7a9SMarc Zyngier #define kvm_vcpu_has_pmu(vcpu) \ 79214bda7a9SMarc Zyngier (test_bit(KVM_ARM_VCPU_PMU_V3, (vcpu)->arch.features)) 79314bda7a9SMarc Zyngier 794a8e190cdSArd Biesheuvel int kvm_trng_call(struct kvm_vcpu *vcpu); 795f320bc74SQuentin Perret #ifdef CONFIG_KVM 796f320bc74SQuentin Perret extern phys_addr_t hyp_mem_base; 797f320bc74SQuentin Perret extern phys_addr_t hyp_mem_size; 798f320bc74SQuentin Perret void __init kvm_hyp_reserve(void); 799f320bc74SQuentin Perret #else 800f320bc74SQuentin Perret static inline void kvm_hyp_reserve(void) { } 801f320bc74SQuentin Perret #endif 802a8e190cdSArd Biesheuvel 8034f8d6632SMarc Zyngier #endif /* __ARM64_KVM_HOST_H__ */ 804