14f8d6632SMarc Zyngier /* 24f8d6632SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 34f8d6632SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 44f8d6632SMarc Zyngier * 54f8d6632SMarc Zyngier * Derived from arch/arm/include/asm/kvm_host.h: 64f8d6632SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 74f8d6632SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 84f8d6632SMarc Zyngier * 94f8d6632SMarc Zyngier * This program is free software; you can redistribute it and/or modify 104f8d6632SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 114f8d6632SMarc Zyngier * published by the Free Software Foundation. 124f8d6632SMarc Zyngier * 134f8d6632SMarc Zyngier * This program is distributed in the hope that it will be useful, 144f8d6632SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 154f8d6632SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 164f8d6632SMarc Zyngier * GNU General Public License for more details. 174f8d6632SMarc Zyngier * 184f8d6632SMarc Zyngier * You should have received a copy of the GNU General Public License 194f8d6632SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 204f8d6632SMarc Zyngier */ 214f8d6632SMarc Zyngier 224f8d6632SMarc Zyngier #ifndef __ARM64_KVM_HOST_H__ 234f8d6632SMarc Zyngier #define __ARM64_KVM_HOST_H__ 244f8d6632SMarc Zyngier 253f61f409SDave Martin #include <linux/bitmap.h> 2665647300SPaolo Bonzini #include <linux/types.h> 273f61f409SDave Martin #include <linux/jump_label.h> 2865647300SPaolo Bonzini #include <linux/kvm_types.h> 293f61f409SDave Martin #include <linux/percpu.h> 3085738e05SJulien Thierry #include <asm/arch_gicv3.h> 313f61f409SDave Martin #include <asm/barrier.h> 3263a1e1c9SMark Rutland #include <asm/cpufeature.h> 334f5abad9SJames Morse #include <asm/daifflags.h> 3417eed27bSDave Martin #include <asm/fpsimd.h> 354f8d6632SMarc Zyngier #include <asm/kvm.h> 363a3604bcSMarc Zyngier #include <asm/kvm_asm.h> 374f8d6632SMarc Zyngier #include <asm/kvm_mmio.h> 3832f13955SMarc Zyngier #include <asm/smp_plat.h> 39e6b673b7SDave Martin #include <asm/thread_info.h> 404f8d6632SMarc Zyngier 41c1426e4cSEric Auger #define __KVM_HAVE_ARCH_INTC_INITIALIZED 42c1426e4cSEric Auger 43955a3fc6SLinu Cherian #define KVM_USER_MEM_SLOTS 512 44920552b2SDavid Hildenbrand #define KVM_HALT_POLL_NS_DEFAULT 500000 454f8d6632SMarc Zyngier 464f8d6632SMarc Zyngier #include <kvm/arm_vgic.h> 474f8d6632SMarc Zyngier #include <kvm/arm_arch_timer.h> 4804fe4726SShannon Zhao #include <kvm/arm_pmu.h> 494f8d6632SMarc Zyngier 50ef748917SMing Lei #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS 51ef748917SMing Lei 52808e7381SShannon Zhao #define KVM_VCPU_MAX_FEATURES 4 534f8d6632SMarc Zyngier 547b244e2bSAndrew Jones #define KVM_REQ_SLEEP \ 552387149eSAndrew Jones KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 56325f9c64SAndrew Jones #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) 57358b28f0SMarc Zyngier #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2) 58b13216cfSChristoffer Dall 5961bbe380SChristoffer Dall DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 6061bbe380SChristoffer Dall 610f062bfeSDave Martin static inline int kvm_arm_init_arch_resources(void) { return 0; } 620f062bfeSDave Martin 636951e48bSWill Deacon int __attribute_const__ kvm_target_cpu(void); 644f8d6632SMarc Zyngier int kvm_reset_vcpu(struct kvm_vcpu *vcpu); 65375bdd3bSDongjiu Geng int kvm_arch_vm_ioctl_check_extension(struct kvm *kvm, long ext); 66c612505fSJames Morse void __extended_idmap_trampoline(phys_addr_t boot_pgd, phys_addr_t idmap_start); 674f8d6632SMarc Zyngier 68e329fb75SChristoffer Dall struct kvm_vmid { 694f8d6632SMarc Zyngier /* The VMID generation used for the virt. memory system */ 704f8d6632SMarc Zyngier u64 vmid_gen; 714f8d6632SMarc Zyngier u32 vmid; 72e329fb75SChristoffer Dall }; 73e329fb75SChristoffer Dall 74e329fb75SChristoffer Dall struct kvm_arch { 75e329fb75SChristoffer Dall struct kvm_vmid vmid; 764f8d6632SMarc Zyngier 777665f3a8SSuzuki K Poulose /* stage2 entry level table */ 784f8d6632SMarc Zyngier pgd_t *pgd; 79e329fb75SChristoffer Dall phys_addr_t pgd_phys; 804f8d6632SMarc Zyngier 817665f3a8SSuzuki K Poulose /* VTCR_EL2 value for this VM */ 827665f3a8SSuzuki K Poulose u64 vtcr; 834f8d6632SMarc Zyngier 8494d0e598SMarc Zyngier /* The last vcpu id that ran on each physical CPU */ 8594d0e598SMarc Zyngier int __percpu *last_vcpu_ran; 8694d0e598SMarc Zyngier 873caa2d8cSAndre Przywara /* The maximum number of vCPUs depends on the used GIC model */ 883caa2d8cSAndre Przywara int max_vcpus; 893caa2d8cSAndre Przywara 904f8d6632SMarc Zyngier /* Interrupt controller */ 914f8d6632SMarc Zyngier struct vgic_dist vgic; 9285bd0ba1SMarc Zyngier 9385bd0ba1SMarc Zyngier /* Mandated version of PSCI */ 9485bd0ba1SMarc Zyngier u32 psci_version; 954f8d6632SMarc Zyngier }; 964f8d6632SMarc Zyngier 974f8d6632SMarc Zyngier #define KVM_NR_MEM_OBJS 40 984f8d6632SMarc Zyngier 994f8d6632SMarc Zyngier /* 1004f8d6632SMarc Zyngier * We don't want allocation failures within the mmu code, so we preallocate 1014f8d6632SMarc Zyngier * enough memory for a single page fault in a cache. 1024f8d6632SMarc Zyngier */ 1034f8d6632SMarc Zyngier struct kvm_mmu_memory_cache { 1044f8d6632SMarc Zyngier int nobjs; 1054f8d6632SMarc Zyngier void *objects[KVM_NR_MEM_OBJS]; 1064f8d6632SMarc Zyngier }; 1074f8d6632SMarc Zyngier 1084f8d6632SMarc Zyngier struct kvm_vcpu_fault_info { 1094f8d6632SMarc Zyngier u32 esr_el2; /* Hyp Syndrom Register */ 1104f8d6632SMarc Zyngier u64 far_el2; /* Hyp Fault Address Register */ 1114f8d6632SMarc Zyngier u64 hpfar_el2; /* Hyp IPA Fault Address Register */ 1120067df41SJames Morse u64 disr_el1; /* Deferred [SError] Status Register */ 1134f8d6632SMarc Zyngier }; 1144f8d6632SMarc Zyngier 1159d8415d6SMarc Zyngier /* 1169d8415d6SMarc Zyngier * 0 is reserved as an invalid value. 1179d8415d6SMarc Zyngier * Order should be kept in sync with the save/restore code. 1189d8415d6SMarc Zyngier */ 1199d8415d6SMarc Zyngier enum vcpu_sysreg { 1209d8415d6SMarc Zyngier __INVALID_SYSREG__, 1219d8415d6SMarc Zyngier MPIDR_EL1, /* MultiProcessor Affinity Register */ 1229d8415d6SMarc Zyngier CSSELR_EL1, /* Cache Size Selection Register */ 1239d8415d6SMarc Zyngier SCTLR_EL1, /* System Control Register */ 1249d8415d6SMarc Zyngier ACTLR_EL1, /* Auxiliary Control Register */ 1259d8415d6SMarc Zyngier CPACR_EL1, /* Coprocessor Access Control */ 12673433762SDave Martin ZCR_EL1, /* SVE Control */ 1279d8415d6SMarc Zyngier TTBR0_EL1, /* Translation Table Base Register 0 */ 1289d8415d6SMarc Zyngier TTBR1_EL1, /* Translation Table Base Register 1 */ 1299d8415d6SMarc Zyngier TCR_EL1, /* Translation Control Register */ 1309d8415d6SMarc Zyngier ESR_EL1, /* Exception Syndrome Register */ 131ef769e32SAdam Buchbinder AFSR0_EL1, /* Auxiliary Fault Status Register 0 */ 132ef769e32SAdam Buchbinder AFSR1_EL1, /* Auxiliary Fault Status Register 1 */ 1339d8415d6SMarc Zyngier FAR_EL1, /* Fault Address Register */ 1349d8415d6SMarc Zyngier MAIR_EL1, /* Memory Attribute Indirection Register */ 1359d8415d6SMarc Zyngier VBAR_EL1, /* Vector Base Address Register */ 1369d8415d6SMarc Zyngier CONTEXTIDR_EL1, /* Context ID Register */ 1379d8415d6SMarc Zyngier TPIDR_EL0, /* Thread ID, User R/W */ 1389d8415d6SMarc Zyngier TPIDRRO_EL0, /* Thread ID, User R/O */ 1399d8415d6SMarc Zyngier TPIDR_EL1, /* Thread ID, Privileged */ 1409d8415d6SMarc Zyngier AMAIR_EL1, /* Aux Memory Attribute Indirection Register */ 1419d8415d6SMarc Zyngier CNTKCTL_EL1, /* Timer Control Register (EL1) */ 1429d8415d6SMarc Zyngier PAR_EL1, /* Physical Address Register */ 1439d8415d6SMarc Zyngier MDSCR_EL1, /* Monitor Debug System Control Register */ 1449d8415d6SMarc Zyngier MDCCINT_EL1, /* Monitor Debug Comms Channel Interrupt Enable Reg */ 145c773ae2bSJames Morse DISR_EL1, /* Deferred Interrupt Status Register */ 1469d8415d6SMarc Zyngier 147ab946834SShannon Zhao /* Performance Monitors Registers */ 148ab946834SShannon Zhao PMCR_EL0, /* Control Register */ 1493965c3ceSShannon Zhao PMSELR_EL0, /* Event Counter Selection Register */ 150051ff581SShannon Zhao PMEVCNTR0_EL0, /* Event Counter Register (0-30) */ 151051ff581SShannon Zhao PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30, 152051ff581SShannon Zhao PMCCNTR_EL0, /* Cycle Counter Register */ 1539feb21acSShannon Zhao PMEVTYPER0_EL0, /* Event Type Register (0-30) */ 1549feb21acSShannon Zhao PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30, 1559feb21acSShannon Zhao PMCCFILTR_EL0, /* Cycle Count Filter Register */ 15696b0eebcSShannon Zhao PMCNTENSET_EL0, /* Count Enable Set Register */ 1579db52c78SShannon Zhao PMINTENSET_EL1, /* Interrupt Enable Set Register */ 15876d883c4SShannon Zhao PMOVSSET_EL0, /* Overflow Flag Status Set Register */ 1597a0adc70SShannon Zhao PMSWINC_EL0, /* Software Increment Register */ 160d692b8adSShannon Zhao PMUSERENR_EL0, /* User Enable Register */ 161ab946834SShannon Zhao 1629d8415d6SMarc Zyngier /* 32bit specific registers. Keep them at the end of the range */ 1639d8415d6SMarc Zyngier DACR32_EL2, /* Domain Access Control Register */ 1649d8415d6SMarc Zyngier IFSR32_EL2, /* Instruction Fault Status Register */ 1659d8415d6SMarc Zyngier FPEXC32_EL2, /* Floating-Point Exception Control Register */ 1669d8415d6SMarc Zyngier DBGVCR32_EL2, /* Debug Vector Catch Register */ 1679d8415d6SMarc Zyngier 1689d8415d6SMarc Zyngier NR_SYS_REGS /* Nothing after this line! */ 1699d8415d6SMarc Zyngier }; 1709d8415d6SMarc Zyngier 1719d8415d6SMarc Zyngier /* 32bit mapping */ 1729d8415d6SMarc Zyngier #define c0_MPIDR (MPIDR_EL1 * 2) /* MultiProcessor ID Register */ 1739d8415d6SMarc Zyngier #define c0_CSSELR (CSSELR_EL1 * 2)/* Cache Size Selection Register */ 1749d8415d6SMarc Zyngier #define c1_SCTLR (SCTLR_EL1 * 2) /* System Control Register */ 1759d8415d6SMarc Zyngier #define c1_ACTLR (ACTLR_EL1 * 2) /* Auxiliary Control Register */ 1769d8415d6SMarc Zyngier #define c1_CPACR (CPACR_EL1 * 2) /* Coprocessor Access Control */ 1779d8415d6SMarc Zyngier #define c2_TTBR0 (TTBR0_EL1 * 2) /* Translation Table Base Register 0 */ 1789d8415d6SMarc Zyngier #define c2_TTBR0_high (c2_TTBR0 + 1) /* TTBR0 top 32 bits */ 1799d8415d6SMarc Zyngier #define c2_TTBR1 (TTBR1_EL1 * 2) /* Translation Table Base Register 1 */ 1809d8415d6SMarc Zyngier #define c2_TTBR1_high (c2_TTBR1 + 1) /* TTBR1 top 32 bits */ 1819d8415d6SMarc Zyngier #define c2_TTBCR (TCR_EL1 * 2) /* Translation Table Base Control R. */ 1829d8415d6SMarc Zyngier #define c3_DACR (DACR32_EL2 * 2)/* Domain Access Control Register */ 1839d8415d6SMarc Zyngier #define c5_DFSR (ESR_EL1 * 2) /* Data Fault Status Register */ 1849d8415d6SMarc Zyngier #define c5_IFSR (IFSR32_EL2 * 2)/* Instruction Fault Status Register */ 1859d8415d6SMarc Zyngier #define c5_ADFSR (AFSR0_EL1 * 2) /* Auxiliary Data Fault Status R */ 1869d8415d6SMarc Zyngier #define c5_AIFSR (AFSR1_EL1 * 2) /* Auxiliary Instr Fault Status R */ 1879d8415d6SMarc Zyngier #define c6_DFAR (FAR_EL1 * 2) /* Data Fault Address Register */ 1889d8415d6SMarc Zyngier #define c6_IFAR (c6_DFAR + 1) /* Instruction Fault Address Register */ 1899d8415d6SMarc Zyngier #define c7_PAR (PAR_EL1 * 2) /* Physical Address Register */ 1909d8415d6SMarc Zyngier #define c7_PAR_high (c7_PAR + 1) /* PAR top 32 bits */ 1919d8415d6SMarc Zyngier #define c10_PRRR (MAIR_EL1 * 2) /* Primary Region Remap Register */ 1929d8415d6SMarc Zyngier #define c10_NMRR (c10_PRRR + 1) /* Normal Memory Remap Register */ 1939d8415d6SMarc Zyngier #define c12_VBAR (VBAR_EL1 * 2) /* Vector Base Address Register */ 1949d8415d6SMarc Zyngier #define c13_CID (CONTEXTIDR_EL1 * 2) /* Context ID Register */ 1959d8415d6SMarc Zyngier #define c13_TID_URW (TPIDR_EL0 * 2) /* Thread ID, User R/W */ 1969d8415d6SMarc Zyngier #define c13_TID_URO (TPIDRRO_EL0 * 2)/* Thread ID, User R/O */ 1979d8415d6SMarc Zyngier #define c13_TID_PRIV (TPIDR_EL1 * 2) /* Thread ID, Privileged */ 1989d8415d6SMarc Zyngier #define c10_AMAIR0 (AMAIR_EL1 * 2) /* Aux Memory Attr Indirection Reg */ 1999d8415d6SMarc Zyngier #define c10_AMAIR1 (c10_AMAIR0 + 1)/* Aux Memory Attr Indirection Reg */ 2009d8415d6SMarc Zyngier #define c14_CNTKCTL (CNTKCTL_EL1 * 2) /* Timer Control Register (PL1) */ 2019d8415d6SMarc Zyngier 2029d8415d6SMarc Zyngier #define cp14_DBGDSCRext (MDSCR_EL1 * 2) 2039d8415d6SMarc Zyngier #define cp14_DBGBCR0 (DBGBCR0_EL1 * 2) 2049d8415d6SMarc Zyngier #define cp14_DBGBVR0 (DBGBVR0_EL1 * 2) 2059d8415d6SMarc Zyngier #define cp14_DBGBXVR0 (cp14_DBGBVR0 + 1) 2069d8415d6SMarc Zyngier #define cp14_DBGWCR0 (DBGWCR0_EL1 * 2) 2079d8415d6SMarc Zyngier #define cp14_DBGWVR0 (DBGWVR0_EL1 * 2) 2089d8415d6SMarc Zyngier #define cp14_DBGDCCINT (MDCCINT_EL1 * 2) 2099d8415d6SMarc Zyngier 2109d8415d6SMarc Zyngier #define NR_COPRO_REGS (NR_SYS_REGS * 2) 2119d8415d6SMarc Zyngier 2124f8d6632SMarc Zyngier struct kvm_cpu_context { 2134f8d6632SMarc Zyngier struct kvm_regs gp_regs; 21440033a61SMarc Zyngier union { 2154f8d6632SMarc Zyngier u64 sys_regs[NR_SYS_REGS]; 21672564016SMarc Zyngier u32 copro[NR_COPRO_REGS]; 21740033a61SMarc Zyngier }; 218c97e166eSJames Morse 219c97e166eSJames Morse struct kvm_vcpu *__hyp_running_vcpu; 2204f8d6632SMarc Zyngier }; 2214f8d6632SMarc Zyngier 2224f8d6632SMarc Zyngier typedef struct kvm_cpu_context kvm_cpu_context_t; 2234f8d6632SMarc Zyngier 224358b28f0SMarc Zyngier struct vcpu_reset_state { 225358b28f0SMarc Zyngier unsigned long pc; 226358b28f0SMarc Zyngier unsigned long r0; 227358b28f0SMarc Zyngier bool be; 228358b28f0SMarc Zyngier bool reset; 229358b28f0SMarc Zyngier }; 230358b28f0SMarc Zyngier 2314f8d6632SMarc Zyngier struct kvm_vcpu_arch { 2324f8d6632SMarc Zyngier struct kvm_cpu_context ctxt; 233b43b5dd9SDave Martin void *sve_state; 234b43b5dd9SDave Martin unsigned int sve_max_vl; 2354f8d6632SMarc Zyngier 2364f8d6632SMarc Zyngier /* HYP configuration */ 2374f8d6632SMarc Zyngier u64 hcr_el2; 23856c7f5e7SAlex Bennée u32 mdcr_el2; 2394f8d6632SMarc Zyngier 2404f8d6632SMarc Zyngier /* Exception Information */ 2414f8d6632SMarc Zyngier struct kvm_vcpu_fault_info fault; 2424f8d6632SMarc Zyngier 24355e3748eSMarc Zyngier /* State of various workarounds, see kvm_asm.h for bit assignment */ 24455e3748eSMarc Zyngier u64 workaround_flags; 24555e3748eSMarc Zyngier 246fa89d31cSDave Martin /* Miscellaneous vcpu state flags */ 247fa89d31cSDave Martin u64 flags; 2480c557ed4SMarc Zyngier 24984e690bfSAlex Bennée /* 25084e690bfSAlex Bennée * We maintain more than a single set of debug registers to support 25184e690bfSAlex Bennée * debugging the guest from the host and to maintain separate host and 25284e690bfSAlex Bennée * guest state during world switches. vcpu_debug_state are the debug 25384e690bfSAlex Bennée * registers of the vcpu as the guest sees them. host_debug_state are 254834bf887SAlex Bennée * the host registers which are saved and restored during 255834bf887SAlex Bennée * world switches. external_debug_state contains the debug 256834bf887SAlex Bennée * values we want to debug the guest. This is set via the 257834bf887SAlex Bennée * KVM_SET_GUEST_DEBUG ioctl. 25884e690bfSAlex Bennée * 25984e690bfSAlex Bennée * debug_ptr points to the set of debug registers that should be loaded 26084e690bfSAlex Bennée * onto the hardware when running the guest. 26184e690bfSAlex Bennée */ 26284e690bfSAlex Bennée struct kvm_guest_debug_arch *debug_ptr; 26384e690bfSAlex Bennée struct kvm_guest_debug_arch vcpu_debug_state; 264834bf887SAlex Bennée struct kvm_guest_debug_arch external_debug_state; 26584e690bfSAlex Bennée 2664f8d6632SMarc Zyngier /* Pointer to host CPU context */ 2674f8d6632SMarc Zyngier kvm_cpu_context_t *host_cpu_context; 268e6b673b7SDave Martin 269e6b673b7SDave Martin struct thread_info *host_thread_info; /* hyp VA */ 270e6b673b7SDave Martin struct user_fpsimd_state *host_fpsimd_state; /* hyp VA */ 271e6b673b7SDave Martin 272f85279b4SWill Deacon struct { 273f85279b4SWill Deacon /* {Break,watch}point registers */ 274f85279b4SWill Deacon struct kvm_guest_debug_arch regs; 275f85279b4SWill Deacon /* Statistical profiling extension */ 276f85279b4SWill Deacon u64 pmscr_el1; 277f85279b4SWill Deacon } host_debug_state; 2784f8d6632SMarc Zyngier 2794f8d6632SMarc Zyngier /* VGIC state */ 2804f8d6632SMarc Zyngier struct vgic_cpu vgic_cpu; 2814f8d6632SMarc Zyngier struct arch_timer_cpu timer_cpu; 28204fe4726SShannon Zhao struct kvm_pmu pmu; 2834f8d6632SMarc Zyngier 2844f8d6632SMarc Zyngier /* 2854f8d6632SMarc Zyngier * Anything that is not used directly from assembly code goes 2864f8d6632SMarc Zyngier * here. 2874f8d6632SMarc Zyngier */ 2884f8d6632SMarc Zyngier 289337b99bfSAlex Bennée /* 290337b99bfSAlex Bennée * Guest registers we preserve during guest debugging. 291337b99bfSAlex Bennée * 292337b99bfSAlex Bennée * These shadow registers are updated by the kvm_handle_sys_reg 293337b99bfSAlex Bennée * trap handler if the guest accesses or updates them while we 294337b99bfSAlex Bennée * are using guest debug. 295337b99bfSAlex Bennée */ 296337b99bfSAlex Bennée struct { 297337b99bfSAlex Bennée u32 mdscr_el1; 298337b99bfSAlex Bennée } guest_debug_preserved; 299337b99bfSAlex Bennée 3003781528eSEric Auger /* vcpu power-off state */ 3013781528eSEric Auger bool power_off; 3024f8d6632SMarc Zyngier 3033b92830aSEric Auger /* Don't run the guest (internal implementation need) */ 3043b92830aSEric Auger bool pause; 3053b92830aSEric Auger 3064f8d6632SMarc Zyngier /* IO related fields */ 3074f8d6632SMarc Zyngier struct kvm_decode mmio_decode; 3084f8d6632SMarc Zyngier 3094f8d6632SMarc Zyngier /* Cache some mmu pages needed inside spinlock regions */ 3104f8d6632SMarc Zyngier struct kvm_mmu_memory_cache mmu_page_cache; 3114f8d6632SMarc Zyngier 3124f8d6632SMarc Zyngier /* Target CPU and feature flags */ 3136c8c0c4dSChen Gang int target; 3144f8d6632SMarc Zyngier DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES); 3154f8d6632SMarc Zyngier 3164f8d6632SMarc Zyngier /* Detect first run of a vcpu */ 3174f8d6632SMarc Zyngier bool has_run_once; 3184715c14bSJames Morse 3194715c14bSJames Morse /* Virtual SError ESR to restore when HCR_EL2.VSE is set */ 3204715c14bSJames Morse u64 vsesr_el2; 321d47533daSChristoffer Dall 322358b28f0SMarc Zyngier /* Additional reset state */ 323358b28f0SMarc Zyngier struct vcpu_reset_state reset_state; 324358b28f0SMarc Zyngier 325d47533daSChristoffer Dall /* True when deferrable sysregs are loaded on the physical CPU, 326d47533daSChristoffer Dall * see kvm_vcpu_load_sysregs and kvm_vcpu_put_sysregs. */ 327d47533daSChristoffer Dall bool sysregs_loaded_on_cpu; 3284f8d6632SMarc Zyngier }; 3294f8d6632SMarc Zyngier 330b43b5dd9SDave Martin /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ 331b43b5dd9SDave Martin #define vcpu_sve_pffr(vcpu) ((void *)((char *)((vcpu)->arch.sve_state) + \ 332b43b5dd9SDave Martin sve_ffr_offset((vcpu)->arch.sve_max_vl))) 333b43b5dd9SDave Martin 334e1c9c983SDave Martin #define vcpu_sve_state_size(vcpu) ({ \ 335e1c9c983SDave Martin size_t __size_ret; \ 336e1c9c983SDave Martin unsigned int __vcpu_vq; \ 337e1c9c983SDave Martin \ 338e1c9c983SDave Martin if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) { \ 339e1c9c983SDave Martin __size_ret = 0; \ 340e1c9c983SDave Martin } else { \ 341e1c9c983SDave Martin __vcpu_vq = sve_vq_from_vl((vcpu)->arch.sve_max_vl); \ 342e1c9c983SDave Martin __size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq); \ 343e1c9c983SDave Martin } \ 344e1c9c983SDave Martin \ 345e1c9c983SDave Martin __size_ret; \ 346e1c9c983SDave Martin }) 347e1c9c983SDave Martin 348fa89d31cSDave Martin /* vcpu_arch flags field values: */ 349fa89d31cSDave Martin #define KVM_ARM64_DEBUG_DIRTY (1 << 0) 350e6b673b7SDave Martin #define KVM_ARM64_FP_ENABLED (1 << 1) /* guest FP regs loaded */ 351e6b673b7SDave Martin #define KVM_ARM64_FP_HOST (1 << 2) /* host FP regs loaded */ 352e6b673b7SDave Martin #define KVM_ARM64_HOST_SVE_IN_USE (1 << 3) /* backup for host TIF_SVE */ 353b3eb56b6SDave Martin #define KVM_ARM64_HOST_SVE_ENABLED (1 << 4) /* SVE enabled for EL0 */ 3541765edbaSDave Martin #define KVM_ARM64_GUEST_HAS_SVE (1 << 5) /* SVE exposed to guest */ 3551765edbaSDave Martin 3561765edbaSDave Martin #define vcpu_has_sve(vcpu) (system_supports_sve() && \ 3571765edbaSDave Martin ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_SVE)) 358fa89d31cSDave Martin 3594f8d6632SMarc Zyngier #define vcpu_gp_regs(v) (&(v)->arch.ctxt.gp_regs) 3608d404c4cSChristoffer Dall 3618d404c4cSChristoffer Dall /* 3628d404c4cSChristoffer Dall * Only use __vcpu_sys_reg if you know you want the memory backed version of a 3638d404c4cSChristoffer Dall * register, and not the one most recently accessed by a running VCPU. For 3648d404c4cSChristoffer Dall * example, for userspace access or for system registers that are never context 3658d404c4cSChristoffer Dall * switched, but only emulated. 3668d404c4cSChristoffer Dall */ 3678d404c4cSChristoffer Dall #define __vcpu_sys_reg(v,r) ((v)->arch.ctxt.sys_regs[(r)]) 3688d404c4cSChristoffer Dall 369da6f1666SChristoffer Dall u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg); 370d47533daSChristoffer Dall void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg); 3718d404c4cSChristoffer Dall 37272564016SMarc Zyngier /* 37372564016SMarc Zyngier * CP14 and CP15 live in the same array, as they are backed by the 37472564016SMarc Zyngier * same system registers. 37572564016SMarc Zyngier */ 37672564016SMarc Zyngier #define vcpu_cp14(v,r) ((v)->arch.ctxt.copro[(r)]) 37772564016SMarc Zyngier #define vcpu_cp15(v,r) ((v)->arch.ctxt.copro[(r)]) 3784f8d6632SMarc Zyngier 3794f8d6632SMarc Zyngier struct kvm_vm_stat { 3808a7e75d4SSuraj Jitindar Singh ulong remote_tlb_flush; 3814f8d6632SMarc Zyngier }; 3824f8d6632SMarc Zyngier 3834f8d6632SMarc Zyngier struct kvm_vcpu_stat { 3848a7e75d4SSuraj Jitindar Singh u64 halt_successful_poll; 3858a7e75d4SSuraj Jitindar Singh u64 halt_attempted_poll; 3868a7e75d4SSuraj Jitindar Singh u64 halt_poll_invalid; 3878a7e75d4SSuraj Jitindar Singh u64 halt_wakeup; 3888a7e75d4SSuraj Jitindar Singh u64 hvc_exit_stat; 389b19e6892SAmit Tomar u64 wfe_exit_stat; 390b19e6892SAmit Tomar u64 wfi_exit_stat; 391b19e6892SAmit Tomar u64 mmio_exit_user; 392b19e6892SAmit Tomar u64 mmio_exit_kernel; 393b19e6892SAmit Tomar u64 exits; 3944f8d6632SMarc Zyngier }; 3954f8d6632SMarc Zyngier 396473bdc0eSAnup Patel int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init); 3974f8d6632SMarc Zyngier unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu); 3984f8d6632SMarc Zyngier int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); 3994f8d6632SMarc Zyngier int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 4004f8d6632SMarc Zyngier int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 401539aee0eSJames Morse int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 402b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 403b7b27facSDongjiu Geng 404539aee0eSJames Morse int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 405b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 4064f8d6632SMarc Zyngier 4074f8d6632SMarc Zyngier #define KVM_ARCH_WANT_MMU_NOTIFIER 4084f8d6632SMarc Zyngier int kvm_unmap_hva_range(struct kvm *kvm, 4094f8d6632SMarc Zyngier unsigned long start, unsigned long end); 410748c0e31SLan Tianyu int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 41135307b9aSMarc Zyngier int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 41235307b9aSMarc Zyngier int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 4134f8d6632SMarc Zyngier 4144f8d6632SMarc Zyngier struct kvm_vcpu *kvm_arm_get_running_vcpu(void); 4154000be42SWill Deacon struct kvm_vcpu * __percpu *kvm_get_running_vcpus(void); 416b13216cfSChristoffer Dall void kvm_arm_halt_guest(struct kvm *kvm); 417b13216cfSChristoffer Dall void kvm_arm_resume_guest(struct kvm *kvm); 4184f8d6632SMarc Zyngier 419a0bf9776SArd Biesheuvel u64 __kvm_call_hyp(void *hypfn, ...); 42018fc7bf8SMarc Zyngier 42118fc7bf8SMarc Zyngier /* 42218fc7bf8SMarc Zyngier * The couple of isb() below are there to guarantee the same behaviour 42318fc7bf8SMarc Zyngier * on VHE as on !VHE, where the eret to EL1 acts as a context 42418fc7bf8SMarc Zyngier * synchronization event. 42518fc7bf8SMarc Zyngier */ 42618fc7bf8SMarc Zyngier #define kvm_call_hyp(f, ...) \ 42718fc7bf8SMarc Zyngier do { \ 42818fc7bf8SMarc Zyngier if (has_vhe()) { \ 42918fc7bf8SMarc Zyngier f(__VA_ARGS__); \ 43018fc7bf8SMarc Zyngier isb(); \ 43118fc7bf8SMarc Zyngier } else { \ 43218fc7bf8SMarc Zyngier __kvm_call_hyp(kvm_ksym_ref(f), ##__VA_ARGS__); \ 43318fc7bf8SMarc Zyngier } \ 43418fc7bf8SMarc Zyngier } while(0) 43518fc7bf8SMarc Zyngier 43618fc7bf8SMarc Zyngier #define kvm_call_hyp_ret(f, ...) \ 43718fc7bf8SMarc Zyngier ({ \ 43818fc7bf8SMarc Zyngier typeof(f(__VA_ARGS__)) ret; \ 43918fc7bf8SMarc Zyngier \ 44018fc7bf8SMarc Zyngier if (has_vhe()) { \ 44118fc7bf8SMarc Zyngier ret = f(__VA_ARGS__); \ 44218fc7bf8SMarc Zyngier isb(); \ 44318fc7bf8SMarc Zyngier } else { \ 44418fc7bf8SMarc Zyngier ret = __kvm_call_hyp(kvm_ksym_ref(f), \ 44518fc7bf8SMarc Zyngier ##__VA_ARGS__); \ 44618fc7bf8SMarc Zyngier } \ 44718fc7bf8SMarc Zyngier \ 44818fc7bf8SMarc Zyngier ret; \ 44918fc7bf8SMarc Zyngier }) 45022b39ca3SMarc Zyngier 451cf5d3188SChristoffer Dall void force_vm_exit(const cpumask_t *mask); 4528199ed0eSMario Smarduch void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot); 4534f8d6632SMarc Zyngier 4544f8d6632SMarc Zyngier int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, 4554f8d6632SMarc Zyngier int exception_index); 4563368bd80SJames Morse void handle_exit_early(struct kvm_vcpu *vcpu, struct kvm_run *run, 4573368bd80SJames Morse int exception_index); 4584f8d6632SMarc Zyngier 4594f8d6632SMarc Zyngier int kvm_perf_init(void); 4604f8d6632SMarc Zyngier int kvm_perf_teardown(void); 4614f8d6632SMarc Zyngier 462b7b27facSDongjiu Geng void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome); 463b7b27facSDongjiu Geng 4644429fc64SAndre Przywara struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr); 4654429fc64SAndre Przywara 4664464e210SChristoffer Dall DECLARE_PER_CPU(kvm_cpu_context_t, kvm_host_cpu_state); 4674464e210SChristoffer Dall 46832f13955SMarc Zyngier static inline void kvm_init_host_cpu_context(kvm_cpu_context_t *cpu_ctxt, 46932f13955SMarc Zyngier int cpu) 47032f13955SMarc Zyngier { 47132f13955SMarc Zyngier /* The host's MPIDR is immutable, so let's set it up at boot time */ 47232f13955SMarc Zyngier cpu_ctxt->sys_regs[MPIDR_EL1] = cpu_logical_map(cpu); 47332f13955SMarc Zyngier } 47432f13955SMarc Zyngier 4757c36447aSWill Deacon void __kvm_enable_ssbs(void); 4767c36447aSWill Deacon 47712fda812SMarc Zyngier static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr, 478092bd143SMarc Zyngier unsigned long hyp_stack_ptr, 479092bd143SMarc Zyngier unsigned long vector_ptr) 480092bd143SMarc Zyngier { 4819bc03f1dSMarc Zyngier /* 4829bc03f1dSMarc Zyngier * Calculate the raw per-cpu offset without a translation from the 4839bc03f1dSMarc Zyngier * kernel's mapping to the linear mapping, and store it in tpidr_el2 4849bc03f1dSMarc Zyngier * so that we can use adr_l to access per-cpu variables in EL2. 4859bc03f1dSMarc Zyngier */ 4869bc03f1dSMarc Zyngier u64 tpidr_el2 = ((u64)this_cpu_ptr(&kvm_host_cpu_state) - 4879bc03f1dSMarc Zyngier (u64)kvm_ksym_ref(kvm_host_cpu_state)); 4884464e210SChristoffer Dall 489092bd143SMarc Zyngier /* 49063a1e1c9SMark Rutland * Call initialization code, and switch to the full blown HYP code. 49163a1e1c9SMark Rutland * If the cpucaps haven't been finalized yet, something has gone very 49263a1e1c9SMark Rutland * wrong, and hyp will crash and burn when it uses any 49363a1e1c9SMark Rutland * cpus_have_const_cap() wrapper. 494092bd143SMarc Zyngier */ 49563a1e1c9SMark Rutland BUG_ON(!static_branch_likely(&arm64_const_caps_ready)); 4969bc03f1dSMarc Zyngier __kvm_call_hyp((void *)pgd_ptr, hyp_stack_ptr, vector_ptr, tpidr_el2); 4977c36447aSWill Deacon 4987c36447aSWill Deacon /* 4997c36447aSWill Deacon * Disabling SSBD on a non-VHE system requires us to enable SSBS 5007c36447aSWill Deacon * at EL2. 5017c36447aSWill Deacon */ 5027c36447aSWill Deacon if (!has_vhe() && this_cpu_has_cap(ARM64_SSBS) && 5037c36447aSWill Deacon arm64_get_ssbd_state() == ARM64_SSBD_FORCE_DISABLE) { 5047c36447aSWill Deacon kvm_call_hyp(__kvm_enable_ssbs); 5057c36447aSWill Deacon } 506092bd143SMarc Zyngier } 507092bd143SMarc Zyngier 50833e5f4e5SMarc Zyngier static inline bool kvm_arch_requires_vhe(void) 50985acda3bSDave Martin { 51085acda3bSDave Martin /* 51185acda3bSDave Martin * The Arm architecture specifies that implementation of SVE 51285acda3bSDave Martin * requires VHE also to be implemented. The KVM code for arm64 51385acda3bSDave Martin * relies on this when SVE is present: 51485acda3bSDave Martin */ 51585acda3bSDave Martin if (system_supports_sve()) 51685acda3bSDave Martin return true; 51733e5f4e5SMarc Zyngier 5188b2cca9aSMarc Zyngier /* Some implementations have defects that confine them to VHE */ 5198b2cca9aSMarc Zyngier if (cpus_have_cap(ARM64_WORKAROUND_1165522)) 5208b2cca9aSMarc Zyngier return true; 5218b2cca9aSMarc Zyngier 52233e5f4e5SMarc Zyngier return false; 52385acda3bSDave Martin } 52485acda3bSDave Martin 5250865e636SRadim Krčmář static inline void kvm_arch_hardware_unsetup(void) {} 5260865e636SRadim Krčmář static inline void kvm_arch_sync_events(struct kvm *kvm) {} 5270865e636SRadim Krčmář static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {} 5280865e636SRadim Krčmář static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 5293491caf2SChristian Borntraeger static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 5300865e636SRadim Krčmář 53156c7f5e7SAlex Bennée void kvm_arm_init_debug(void); 53256c7f5e7SAlex Bennée void kvm_arm_setup_debug(struct kvm_vcpu *vcpu); 53356c7f5e7SAlex Bennée void kvm_arm_clear_debug(struct kvm_vcpu *vcpu); 53484e690bfSAlex Bennée void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu); 535bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, 536bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 537bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, 538bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 539bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu, 540bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 54156c7f5e7SAlex Bennée 5420f62f0e9SSuzuki K Poulose static inline void __cpu_init_stage2(void) {} 54321a4179cSMarc Zyngier 544e6b673b7SDave Martin /* Guest/host FPSIMD coordination helpers */ 545e6b673b7SDave Martin int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu); 546e6b673b7SDave Martin void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu); 547e6b673b7SDave Martin void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu); 548e6b673b7SDave Martin void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu); 549e6b673b7SDave Martin 550e6b673b7SDave Martin #ifdef CONFIG_KVM /* Avoid conflicts with core headers if CONFIG_KVM=n */ 551e6b673b7SDave Martin static inline int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu) 55217eed27bSDave Martin { 553e6b673b7SDave Martin return kvm_arch_vcpu_run_map_fp(vcpu); 55417eed27bSDave Martin } 555e6b673b7SDave Martin #endif 55617eed27bSDave Martin 5574f5abad9SJames Morse static inline void kvm_arm_vhe_guest_enter(void) 5584f5abad9SJames Morse { 5594f5abad9SJames Morse local_daif_mask(); 56085738e05SJulien Thierry 56185738e05SJulien Thierry /* 56285738e05SJulien Thierry * Having IRQs masked via PMR when entering the guest means the GIC 56385738e05SJulien Thierry * will not signal the CPU of interrupts of lower priority, and the 56485738e05SJulien Thierry * only way to get out will be via guest exceptions. 56585738e05SJulien Thierry * Naturally, we want to avoid this. 56685738e05SJulien Thierry */ 56785738e05SJulien Thierry if (system_uses_irq_prio_masking()) { 56885738e05SJulien Thierry gic_write_pmr(GIC_PRIO_IRQON); 56985738e05SJulien Thierry dsb(sy); 57085738e05SJulien Thierry } 5714f5abad9SJames Morse } 5724f5abad9SJames Morse 5734f5abad9SJames Morse static inline void kvm_arm_vhe_guest_exit(void) 5744f5abad9SJames Morse { 57585738e05SJulien Thierry /* 57685738e05SJulien Thierry * local_daif_restore() takes care to properly restore PSTATE.DAIF 57785738e05SJulien Thierry * and the GIC PMR if the host is using IRQ priorities. 57885738e05SJulien Thierry */ 5794f5abad9SJames Morse local_daif_restore(DAIF_PROCCTX_NOIRQ); 5803f5c90b8SChristoffer Dall 5813f5c90b8SChristoffer Dall /* 5823f5c90b8SChristoffer Dall * When we exit from the guest we change a number of CPU configuration 5833f5c90b8SChristoffer Dall * parameters, such as traps. Make sure these changes take effect 5843f5c90b8SChristoffer Dall * before running the host or additional guests. 5853f5c90b8SChristoffer Dall */ 5863f5c90b8SChristoffer Dall isb(); 5874f5abad9SJames Morse } 5886167ec5cSMarc Zyngier 5896167ec5cSMarc Zyngier static inline bool kvm_arm_harden_branch_predictor(void) 5906167ec5cSMarc Zyngier { 5916167ec5cSMarc Zyngier return cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR); 5926167ec5cSMarc Zyngier } 5936167ec5cSMarc Zyngier 5945d81f7dcSMarc Zyngier #define KVM_SSBD_UNKNOWN -1 5955d81f7dcSMarc Zyngier #define KVM_SSBD_FORCE_DISABLE 0 5965d81f7dcSMarc Zyngier #define KVM_SSBD_KERNEL 1 5975d81f7dcSMarc Zyngier #define KVM_SSBD_FORCE_ENABLE 2 5985d81f7dcSMarc Zyngier #define KVM_SSBD_MITIGATED 3 5995d81f7dcSMarc Zyngier 6005d81f7dcSMarc Zyngier static inline int kvm_arm_have_ssbd(void) 6015d81f7dcSMarc Zyngier { 6025d81f7dcSMarc Zyngier switch (arm64_get_ssbd_state()) { 6035d81f7dcSMarc Zyngier case ARM64_SSBD_FORCE_DISABLE: 6045d81f7dcSMarc Zyngier return KVM_SSBD_FORCE_DISABLE; 6055d81f7dcSMarc Zyngier case ARM64_SSBD_KERNEL: 6065d81f7dcSMarc Zyngier return KVM_SSBD_KERNEL; 6075d81f7dcSMarc Zyngier case ARM64_SSBD_FORCE_ENABLE: 6085d81f7dcSMarc Zyngier return KVM_SSBD_FORCE_ENABLE; 6095d81f7dcSMarc Zyngier case ARM64_SSBD_MITIGATED: 6105d81f7dcSMarc Zyngier return KVM_SSBD_MITIGATED; 6115d81f7dcSMarc Zyngier case ARM64_SSBD_UNKNOWN: 6125d81f7dcSMarc Zyngier default: 6135d81f7dcSMarc Zyngier return KVM_SSBD_UNKNOWN; 6145d81f7dcSMarc Zyngier } 6155d81f7dcSMarc Zyngier } 6165d81f7dcSMarc Zyngier 617bc192ceeSChristoffer Dall void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu); 618bc192ceeSChristoffer Dall void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu); 619bc192ceeSChristoffer Dall 6200f62f0e9SSuzuki K Poulose void kvm_set_ipa_limit(void); 6210f62f0e9SSuzuki K Poulose 622d1e5b0e9SMarc Orr #define __KVM_HAVE_ARCH_VM_ALLOC 623d1e5b0e9SMarc Orr struct kvm *kvm_arch_alloc_vm(void); 624d1e5b0e9SMarc Orr void kvm_arch_free_vm(struct kvm *kvm); 625d1e5b0e9SMarc Orr 626bca607ebSMarc Zyngier int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type); 6275b6c6742SSuzuki K Poulose 6284f8d6632SMarc Zyngier #endif /* __ARM64_KVM_HOST_H__ */ 629