1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 24f8d6632SMarc Zyngier /* 34f8d6632SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 44f8d6632SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 54f8d6632SMarc Zyngier * 64f8d6632SMarc Zyngier * Derived from arch/arm/include/asm/kvm_host.h: 74f8d6632SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 84f8d6632SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 94f8d6632SMarc Zyngier */ 104f8d6632SMarc Zyngier 114f8d6632SMarc Zyngier #ifndef __ARM64_KVM_HOST_H__ 124f8d6632SMarc Zyngier #define __ARM64_KVM_HOST_H__ 134f8d6632SMarc Zyngier 1405469831SAndrew Scull #include <linux/arm-smccc.h> 153f61f409SDave Martin #include <linux/bitmap.h> 1665647300SPaolo Bonzini #include <linux/types.h> 173f61f409SDave Martin #include <linux/jump_label.h> 1865647300SPaolo Bonzini #include <linux/kvm_types.h> 19fb88707dSOliver Upton #include <linux/maple_tree.h> 203f61f409SDave Martin #include <linux/percpu.h> 21ff367fe4SDavid Brazdil #include <linux/psci.h> 2285738e05SJulien Thierry #include <asm/arch_gicv3.h> 233f61f409SDave Martin #include <asm/barrier.h> 2463a1e1c9SMark Rutland #include <asm/cpufeature.h> 251e0cf16cSMarc Zyngier #include <asm/cputype.h> 264f5abad9SJames Morse #include <asm/daifflags.h> 2717eed27bSDave Martin #include <asm/fpsimd.h> 284f8d6632SMarc Zyngier #include <asm/kvm.h> 293a3604bcSMarc Zyngier #include <asm/kvm_asm.h> 304f8d6632SMarc Zyngier 31c1426e4cSEric Auger #define __KVM_HAVE_ARCH_INTC_INITIALIZED 32c1426e4cSEric Auger 33920552b2SDavid Hildenbrand #define KVM_HALT_POLL_NS_DEFAULT 500000 344f8d6632SMarc Zyngier 354f8d6632SMarc Zyngier #include <kvm/arm_vgic.h> 364f8d6632SMarc Zyngier #include <kvm/arm_arch_timer.h> 3704fe4726SShannon Zhao #include <kvm/arm_pmu.h> 384f8d6632SMarc Zyngier 39ef748917SMing Lei #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS 40ef748917SMing Lei 41a22fa321SAmit Daniel Kachhap #define KVM_VCPU_MAX_FEATURES 7 424f8d6632SMarc Zyngier 437b244e2bSAndrew Jones #define KVM_REQ_SLEEP \ 442387149eSAndrew Jones KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 45325f9c64SAndrew Jones #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) 46358b28f0SMarc Zyngier #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2) 478564d637SSteven Price #define KVM_REQ_RECORD_STEAL KVM_ARCH_REQ(3) 48d9c3872cSMarc Zyngier #define KVM_REQ_RELOAD_GICv4 KVM_ARCH_REQ(4) 49d0c94c49SMarc Zyngier #define KVM_REQ_RELOAD_PMU KVM_ARCH_REQ(5) 507b33a09dSOliver Upton #define KVM_REQ_SUSPEND KVM_ARCH_REQ(6) 51b13216cfSChristoffer Dall 52c862626eSKeqian Zhu #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 53c862626eSKeqian Zhu KVM_DIRTY_LOG_INITIALLY_SET) 54c862626eSKeqian Zhu 55fcc5bf89SJing Zhang #define KVM_HAVE_MMU_RWLOCK 56fcc5bf89SJing Zhang 57d8b369c4SDavid Brazdil /* 58d8b369c4SDavid Brazdil * Mode of operation configurable with kvm-arm.mode early param. 59d8b369c4SDavid Brazdil * See Documentation/admin-guide/kernel-parameters.txt for more information. 60d8b369c4SDavid Brazdil */ 61d8b369c4SDavid Brazdil enum kvm_mode { 62d8b369c4SDavid Brazdil KVM_MODE_DEFAULT, 63d8b369c4SDavid Brazdil KVM_MODE_PROTECTED, 64675cabc8SJintack Lim KVM_MODE_NV, 65b6a68b97SMarc Zyngier KVM_MODE_NONE, 66d8b369c4SDavid Brazdil }; 67675cabc8SJintack Lim #ifdef CONFIG_KVM 683eb681fbSDavid Brazdil enum kvm_mode kvm_get_mode(void); 69675cabc8SJintack Lim #else 70675cabc8SJintack Lim static inline enum kvm_mode kvm_get_mode(void) { return KVM_MODE_NONE; }; 71675cabc8SJintack Lim #endif 72d8b369c4SDavid Brazdil 7361bbe380SChristoffer Dall DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 7461bbe380SChristoffer Dall 758d20bd63SSean Christopherson extern unsigned int __ro_after_init kvm_sve_max_vl; 768d20bd63SSean Christopherson int __init kvm_arm_init_sve(void); 770f062bfeSDave Martin 786b7982feSAnshuman Khandual u32 __attribute_const__ kvm_target_cpu(void); 794f8d6632SMarc Zyngier int kvm_reset_vcpu(struct kvm_vcpu *vcpu); 8019bcc89eSSean Christopherson void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu); 814f8d6632SMarc Zyngier 82717a7eebSQuentin Perret struct kvm_hyp_memcache { 83717a7eebSQuentin Perret phys_addr_t head; 84717a7eebSQuentin Perret unsigned long nr_pages; 85717a7eebSQuentin Perret }; 86717a7eebSQuentin Perret 87717a7eebSQuentin Perret static inline void push_hyp_memcache(struct kvm_hyp_memcache *mc, 88717a7eebSQuentin Perret phys_addr_t *p, 89717a7eebSQuentin Perret phys_addr_t (*to_pa)(void *virt)) 90717a7eebSQuentin Perret { 91717a7eebSQuentin Perret *p = mc->head; 92717a7eebSQuentin Perret mc->head = to_pa(p); 93717a7eebSQuentin Perret mc->nr_pages++; 94717a7eebSQuentin Perret } 95717a7eebSQuentin Perret 96717a7eebSQuentin Perret static inline void *pop_hyp_memcache(struct kvm_hyp_memcache *mc, 97717a7eebSQuentin Perret void *(*to_va)(phys_addr_t phys)) 98717a7eebSQuentin Perret { 99717a7eebSQuentin Perret phys_addr_t *p = to_va(mc->head); 100717a7eebSQuentin Perret 101717a7eebSQuentin Perret if (!mc->nr_pages) 102717a7eebSQuentin Perret return NULL; 103717a7eebSQuentin Perret 104717a7eebSQuentin Perret mc->head = *p; 105717a7eebSQuentin Perret mc->nr_pages--; 106717a7eebSQuentin Perret 107717a7eebSQuentin Perret return p; 108717a7eebSQuentin Perret } 109717a7eebSQuentin Perret 110717a7eebSQuentin Perret static inline int __topup_hyp_memcache(struct kvm_hyp_memcache *mc, 111717a7eebSQuentin Perret unsigned long min_pages, 112717a7eebSQuentin Perret void *(*alloc_fn)(void *arg), 113717a7eebSQuentin Perret phys_addr_t (*to_pa)(void *virt), 114717a7eebSQuentin Perret void *arg) 115717a7eebSQuentin Perret { 116717a7eebSQuentin Perret while (mc->nr_pages < min_pages) { 117717a7eebSQuentin Perret phys_addr_t *p = alloc_fn(arg); 118717a7eebSQuentin Perret 119717a7eebSQuentin Perret if (!p) 120717a7eebSQuentin Perret return -ENOMEM; 121717a7eebSQuentin Perret push_hyp_memcache(mc, p, to_pa); 122717a7eebSQuentin Perret } 123717a7eebSQuentin Perret 124717a7eebSQuentin Perret return 0; 125717a7eebSQuentin Perret } 126717a7eebSQuentin Perret 127717a7eebSQuentin Perret static inline void __free_hyp_memcache(struct kvm_hyp_memcache *mc, 128717a7eebSQuentin Perret void (*free_fn)(void *virt, void *arg), 129717a7eebSQuentin Perret void *(*to_va)(phys_addr_t phys), 130717a7eebSQuentin Perret void *arg) 131717a7eebSQuentin Perret { 132717a7eebSQuentin Perret while (mc->nr_pages) 133717a7eebSQuentin Perret free_fn(pop_hyp_memcache(mc, to_va), arg); 134717a7eebSQuentin Perret } 135717a7eebSQuentin Perret 136717a7eebSQuentin Perret void free_hyp_memcache(struct kvm_hyp_memcache *mc); 137717a7eebSQuentin Perret int topup_hyp_memcache(struct kvm_hyp_memcache *mc, unsigned long min_pages); 138717a7eebSQuentin Perret 139e329fb75SChristoffer Dall struct kvm_vmid { 1403248136bSJulien Grall atomic64_t id; 141e329fb75SChristoffer Dall }; 142e329fb75SChristoffer Dall 143a0e50aa3SChristoffer Dall struct kvm_s2_mmu { 144e329fb75SChristoffer Dall struct kvm_vmid vmid; 1454f8d6632SMarc Zyngier 146a0e50aa3SChristoffer Dall /* 147a0e50aa3SChristoffer Dall * stage2 entry level table 148a0e50aa3SChristoffer Dall * 149a0e50aa3SChristoffer Dall * Two kvm_s2_mmu structures in the same VM can point to the same 150a0e50aa3SChristoffer Dall * pgd here. This happens when running a guest using a 151a0e50aa3SChristoffer Dall * translation regime that isn't affected by its own stage-2 152a0e50aa3SChristoffer Dall * translation, such as a non-VHE hypervisor running at vEL2, or 153a0e50aa3SChristoffer Dall * for vEL1/EL0 with vHCR_EL2.VM == 0. In that case, we use the 154a0e50aa3SChristoffer Dall * canonical stage-2 page tables. 155a0e50aa3SChristoffer Dall */ 156e329fb75SChristoffer Dall phys_addr_t pgd_phys; 15771233d05SWill Deacon struct kvm_pgtable *pgt; 1584f8d6632SMarc Zyngier 15994d0e598SMarc Zyngier /* The last vcpu id that ran on each physical CPU */ 16094d0e598SMarc Zyngier int __percpu *last_vcpu_ran; 16194d0e598SMarc Zyngier 162cfb1a98dSQuentin Perret struct kvm_arch *arch; 163a0e50aa3SChristoffer Dall }; 164a0e50aa3SChristoffer Dall 1658d14797bSWill Deacon struct kvm_arch_memory_slot { 1668d14797bSWill Deacon }; 1678d14797bSWill Deacon 16805714cabSRaghavendra Rao Ananta /** 16905714cabSRaghavendra Rao Ananta * struct kvm_smccc_features: Descriptor of the hypercall services exposed to the guests 17005714cabSRaghavendra Rao Ananta * 17105714cabSRaghavendra Rao Ananta * @std_bmap: Bitmap of standard secure service calls 172428fd678SRaghavendra Rao Ananta * @std_hyp_bmap: Bitmap of standard hypervisor service calls 173b22216e1SRaghavendra Rao Ananta * @vendor_hyp_bmap: Bitmap of vendor specific hypervisor service calls 17405714cabSRaghavendra Rao Ananta */ 17505714cabSRaghavendra Rao Ananta struct kvm_smccc_features { 17605714cabSRaghavendra Rao Ananta unsigned long std_bmap; 177428fd678SRaghavendra Rao Ananta unsigned long std_hyp_bmap; 178b22216e1SRaghavendra Rao Ananta unsigned long vendor_hyp_bmap; 17905714cabSRaghavendra Rao Ananta }; 18005714cabSRaghavendra Rao Ananta 181a1ec5c70SFuad Tabba typedef unsigned int pkvm_handle_t; 182a1ec5c70SFuad Tabba 1839d0c063aSFuad Tabba struct kvm_protected_vm { 1849d0c063aSFuad Tabba pkvm_handle_t handle; 185f41dff4eSQuentin Perret struct kvm_hyp_memcache teardown_mc; 1869d0c063aSFuad Tabba }; 1879d0c063aSFuad Tabba 188a0e50aa3SChristoffer Dall struct kvm_arch { 189a0e50aa3SChristoffer Dall struct kvm_s2_mmu mmu; 190a0e50aa3SChristoffer Dall 191a0e50aa3SChristoffer Dall /* VTCR_EL2 value for this VM */ 192a0e50aa3SChristoffer Dall u64 vtcr; 193a0e50aa3SChristoffer Dall 1944f8d6632SMarc Zyngier /* Interrupt controller */ 1954f8d6632SMarc Zyngier struct vgic_dist vgic; 19685bd0ba1SMarc Zyngier 19747053904SMarc Zyngier /* Timers */ 19847053904SMarc Zyngier struct arch_timer_vm_data timer_data; 19947053904SMarc Zyngier 20085bd0ba1SMarc Zyngier /* Mandated version of PSCI */ 20185bd0ba1SMarc Zyngier u32 psci_version; 202c726200dSChristoffer Dall 203c43120afSOliver Upton /* Protects VM-scoped configuration data */ 204c43120afSOliver Upton struct mutex config_lock; 205c43120afSOliver Upton 206c726200dSChristoffer Dall /* 207c726200dSChristoffer Dall * If we encounter a data abort without valid instruction syndrome 208c726200dSChristoffer Dall * information, report this to user space. User space can (and 209c726200dSChristoffer Dall * should) opt in to this feature if KVM_CAP_ARM_NISV_TO_USER is 210c726200dSChristoffer Dall * supported. 211c726200dSChristoffer Dall */ 21206394531SMarc Zyngier #define KVM_ARCH_FLAG_RETURN_NISV_IO_ABORT_TO_USER 0 21306394531SMarc Zyngier /* Memory Tagging Extension enabled for the guest */ 21406394531SMarc Zyngier #define KVM_ARCH_FLAG_MTE_ENABLED 1 21506394531SMarc Zyngier /* At least one vCPU has ran in the VM */ 21606394531SMarc Zyngier #define KVM_ARCH_FLAG_HAS_RAN_ONCE 2 21726bf74bdSReiji Watanabe /* 21826bf74bdSReiji Watanabe * The following two bits are used to indicate the guest's EL1 21926bf74bdSReiji Watanabe * register width configuration. A value of KVM_ARCH_FLAG_EL1_32BIT 22026bf74bdSReiji Watanabe * bit is valid only when KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED is set. 22126bf74bdSReiji Watanabe * Otherwise, the guest's EL1 register width has not yet been 22226bf74bdSReiji Watanabe * determined yet. 22326bf74bdSReiji Watanabe */ 22426bf74bdSReiji Watanabe #define KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED 3 22526bf74bdSReiji Watanabe #define KVM_ARCH_FLAG_EL1_32BIT 4 226bfbab445SOliver Upton /* PSCI SYSTEM_SUSPEND enabled for the guest */ 227bfbab445SOliver Upton #define KVM_ARCH_FLAG_SYSTEM_SUSPEND_ENABLED 5 22830ec7997SMarc Zyngier /* VM counter offset */ 22930ec7997SMarc Zyngier #define KVM_ARCH_FLAG_VM_COUNTER_OFFSET 6 2308a5eb2d2SMarc Zyngier /* Timer PPIs made immutable */ 2318a5eb2d2SMarc Zyngier #define KVM_ARCH_FLAG_TIMER_PPIS_IMMUTABLE 7 232fb88707dSOliver Upton /* SMCCC filter initialized for the VM */ 2336dcf7316SMarc Zyngier #define KVM_ARCH_FLAG_SMCCC_FILTER_CONFIGURED 8 23406394531SMarc Zyngier unsigned long flags; 235fd65a3b5SMarc Zyngier 236d7eec236SMarc Zyngier /* 237d7eec236SMarc Zyngier * VM-wide PMU filter, implemented as a bitmap and big enough for 238d7eec236SMarc Zyngier * up to 2^10 events (ARMv8.0) or 2^16 events (ARMv8.1+). 239d7eec236SMarc Zyngier */ 240d7eec236SMarc Zyngier unsigned long *pmu_filter; 24146b18782SMarc Zyngier struct arm_pmu *arm_pmu; 24223711a5eSMarc Zyngier 243583cda1bSAlexandru Elisei cpumask_var_t supported_cpus; 24423711a5eSMarc Zyngier 24523711a5eSMarc Zyngier u8 pfr0_csv2; 2464f1df628SMarc Zyngier u8 pfr0_csv3; 2473d0dba57SMarc Zyngier struct { 2483d0dba57SMarc Zyngier u8 imp:4; 2493d0dba57SMarc Zyngier u8 unimp:4; 2503d0dba57SMarc Zyngier } dfr0_pmuver; 25105714cabSRaghavendra Rao Ananta 25205714cabSRaghavendra Rao Ananta /* Hypercall features firmware registers' descriptor */ 25305714cabSRaghavendra Rao Ananta struct kvm_smccc_features smccc_feat; 254fb88707dSOliver Upton struct maple_tree smccc_filter; 255a1ec5c70SFuad Tabba 256a1ec5c70SFuad Tabba /* 2579d0c063aSFuad Tabba * For an untrusted host VM, 'pkvm.handle' is used to lookup 258a1ec5c70SFuad Tabba * the associated pKVM instance in the hypervisor. 259a1ec5c70SFuad Tabba */ 2609d0c063aSFuad Tabba struct kvm_protected_vm pkvm; 2614f8d6632SMarc Zyngier }; 2624f8d6632SMarc Zyngier 2634f8d6632SMarc Zyngier struct kvm_vcpu_fault_info { 2640b12620fSAlexandru Elisei u64 esr_el2; /* Hyp Syndrom Register */ 2654f8d6632SMarc Zyngier u64 far_el2; /* Hyp Fault Address Register */ 2664f8d6632SMarc Zyngier u64 hpfar_el2; /* Hyp IPA Fault Address Register */ 2670067df41SJames Morse u64 disr_el1; /* Deferred [SError] Status Register */ 2684f8d6632SMarc Zyngier }; 2694f8d6632SMarc Zyngier 2709d8415d6SMarc Zyngier enum vcpu_sysreg { 2718f7f4fe7SMarc Zyngier __INVALID_SYSREG__, /* 0 is reserved as an invalid value */ 2729d8415d6SMarc Zyngier MPIDR_EL1, /* MultiProcessor Affinity Register */ 2737af0c253SAkihiko Odaki CLIDR_EL1, /* Cache Level ID Register */ 2749d8415d6SMarc Zyngier CSSELR_EL1, /* Cache Size Selection Register */ 2759d8415d6SMarc Zyngier SCTLR_EL1, /* System Control Register */ 2769d8415d6SMarc Zyngier ACTLR_EL1, /* Auxiliary Control Register */ 2779d8415d6SMarc Zyngier CPACR_EL1, /* Coprocessor Access Control */ 27873433762SDave Martin ZCR_EL1, /* SVE Control */ 2799d8415d6SMarc Zyngier TTBR0_EL1, /* Translation Table Base Register 0 */ 2809d8415d6SMarc Zyngier TTBR1_EL1, /* Translation Table Base Register 1 */ 2819d8415d6SMarc Zyngier TCR_EL1, /* Translation Control Register */ 2829d8415d6SMarc Zyngier ESR_EL1, /* Exception Syndrome Register */ 283ef769e32SAdam Buchbinder AFSR0_EL1, /* Auxiliary Fault Status Register 0 */ 284ef769e32SAdam Buchbinder AFSR1_EL1, /* Auxiliary Fault Status Register 1 */ 2859d8415d6SMarc Zyngier FAR_EL1, /* Fault Address Register */ 2869d8415d6SMarc Zyngier MAIR_EL1, /* Memory Attribute Indirection Register */ 2879d8415d6SMarc Zyngier VBAR_EL1, /* Vector Base Address Register */ 2889d8415d6SMarc Zyngier CONTEXTIDR_EL1, /* Context ID Register */ 2899d8415d6SMarc Zyngier TPIDR_EL0, /* Thread ID, User R/W */ 2909d8415d6SMarc Zyngier TPIDRRO_EL0, /* Thread ID, User R/O */ 2919d8415d6SMarc Zyngier TPIDR_EL1, /* Thread ID, Privileged */ 2929d8415d6SMarc Zyngier AMAIR_EL1, /* Aux Memory Attribute Indirection Register */ 2939d8415d6SMarc Zyngier CNTKCTL_EL1, /* Timer Control Register (EL1) */ 2949d8415d6SMarc Zyngier PAR_EL1, /* Physical Address Register */ 2959d8415d6SMarc Zyngier MDSCR_EL1, /* Monitor Debug System Control Register */ 2969d8415d6SMarc Zyngier MDCCINT_EL1, /* Monitor Debug Comms Channel Interrupt Enable Reg */ 297d42e2671SOliver Upton OSLSR_EL1, /* OS Lock Status Register */ 298c773ae2bSJames Morse DISR_EL1, /* Deferred Interrupt Status Register */ 2999d8415d6SMarc Zyngier 300ab946834SShannon Zhao /* Performance Monitors Registers */ 301ab946834SShannon Zhao PMCR_EL0, /* Control Register */ 3023965c3ceSShannon Zhao PMSELR_EL0, /* Event Counter Selection Register */ 303051ff581SShannon Zhao PMEVCNTR0_EL0, /* Event Counter Register (0-30) */ 304051ff581SShannon Zhao PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30, 305051ff581SShannon Zhao PMCCNTR_EL0, /* Cycle Counter Register */ 3069feb21acSShannon Zhao PMEVTYPER0_EL0, /* Event Type Register (0-30) */ 3079feb21acSShannon Zhao PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30, 3089feb21acSShannon Zhao PMCCFILTR_EL0, /* Cycle Count Filter Register */ 30996b0eebcSShannon Zhao PMCNTENSET_EL0, /* Count Enable Set Register */ 3109db52c78SShannon Zhao PMINTENSET_EL1, /* Interrupt Enable Set Register */ 31176d883c4SShannon Zhao PMOVSSET_EL0, /* Overflow Flag Status Set Register */ 312d692b8adSShannon Zhao PMUSERENR_EL0, /* User Enable Register */ 313ab946834SShannon Zhao 314384b40caSMark Rutland /* Pointer Authentication Registers in a strict increasing order. */ 315384b40caSMark Rutland APIAKEYLO_EL1, 316384b40caSMark Rutland APIAKEYHI_EL1, 317384b40caSMark Rutland APIBKEYLO_EL1, 318384b40caSMark Rutland APIBKEYHI_EL1, 319384b40caSMark Rutland APDAKEYLO_EL1, 320384b40caSMark Rutland APDAKEYHI_EL1, 321384b40caSMark Rutland APDBKEYLO_EL1, 322384b40caSMark Rutland APDBKEYHI_EL1, 323384b40caSMark Rutland APGAKEYLO_EL1, 324384b40caSMark Rutland APGAKEYHI_EL1, 325384b40caSMark Rutland 32698909e6dSMarc Zyngier ELR_EL1, 3271bded23eSMarc Zyngier SP_EL1, 328710f1982SMarc Zyngier SPSR_EL1, 32998909e6dSMarc Zyngier 33041ce82f6SMarc Zyngier CNTVOFF_EL2, 33141ce82f6SMarc Zyngier CNTV_CVAL_EL0, 33241ce82f6SMarc Zyngier CNTV_CTL_EL0, 33341ce82f6SMarc Zyngier CNTP_CVAL_EL0, 33441ce82f6SMarc Zyngier CNTP_CTL_EL0, 33541ce82f6SMarc Zyngier 336e1f358b5SSteven Price /* Memory Tagging Extension registers */ 337e1f358b5SSteven Price RGSR_EL1, /* Random Allocation Tag Seed Register */ 338e1f358b5SSteven Price GCR_EL1, /* Tag Control Register */ 339e1f358b5SSteven Price TFSR_EL1, /* Tag Fault Status Register (EL1) */ 340e1f358b5SSteven Price TFSRE0_EL1, /* Tag Fault Status Register (EL0) */ 341e1f358b5SSteven Price 3425305cc2cSMarc Zyngier /* 32bit specific registers. */ 3439d8415d6SMarc Zyngier DACR32_EL2, /* Domain Access Control Register */ 3449d8415d6SMarc Zyngier IFSR32_EL2, /* Instruction Fault Status Register */ 3459d8415d6SMarc Zyngier FPEXC32_EL2, /* Floating-Point Exception Control Register */ 3469d8415d6SMarc Zyngier DBGVCR32_EL2, /* Debug Vector Catch Register */ 3479d8415d6SMarc Zyngier 3485305cc2cSMarc Zyngier /* EL2 registers */ 3495305cc2cSMarc Zyngier VPIDR_EL2, /* Virtualization Processor ID Register */ 3505305cc2cSMarc Zyngier VMPIDR_EL2, /* Virtualization Multiprocessor ID Register */ 3515305cc2cSMarc Zyngier SCTLR_EL2, /* System Control Register (EL2) */ 3525305cc2cSMarc Zyngier ACTLR_EL2, /* Auxiliary Control Register (EL2) */ 3535305cc2cSMarc Zyngier HCR_EL2, /* Hypervisor Configuration Register */ 3545305cc2cSMarc Zyngier MDCR_EL2, /* Monitor Debug Configuration Register (EL2) */ 3555305cc2cSMarc Zyngier CPTR_EL2, /* Architectural Feature Trap Register (EL2) */ 3565305cc2cSMarc Zyngier HSTR_EL2, /* Hypervisor System Trap Register */ 3575305cc2cSMarc Zyngier HACR_EL2, /* Hypervisor Auxiliary Control Register */ 3585305cc2cSMarc Zyngier TTBR0_EL2, /* Translation Table Base Register 0 (EL2) */ 3595305cc2cSMarc Zyngier TTBR1_EL2, /* Translation Table Base Register 1 (EL2) */ 3605305cc2cSMarc Zyngier TCR_EL2, /* Translation Control Register (EL2) */ 3615305cc2cSMarc Zyngier VTTBR_EL2, /* Virtualization Translation Table Base Register */ 3625305cc2cSMarc Zyngier VTCR_EL2, /* Virtualization Translation Control Register */ 3635305cc2cSMarc Zyngier SPSR_EL2, /* EL2 saved program status register */ 3645305cc2cSMarc Zyngier ELR_EL2, /* EL2 exception link register */ 3655305cc2cSMarc Zyngier AFSR0_EL2, /* Auxiliary Fault Status Register 0 (EL2) */ 3665305cc2cSMarc Zyngier AFSR1_EL2, /* Auxiliary Fault Status Register 1 (EL2) */ 3675305cc2cSMarc Zyngier ESR_EL2, /* Exception Syndrome Register (EL2) */ 3685305cc2cSMarc Zyngier FAR_EL2, /* Fault Address Register (EL2) */ 3695305cc2cSMarc Zyngier HPFAR_EL2, /* Hypervisor IPA Fault Address Register */ 3705305cc2cSMarc Zyngier MAIR_EL2, /* Memory Attribute Indirection Register (EL2) */ 3715305cc2cSMarc Zyngier AMAIR_EL2, /* Auxiliary Memory Attribute Indirection Register (EL2) */ 3725305cc2cSMarc Zyngier VBAR_EL2, /* Vector Base Address Register (EL2) */ 3735305cc2cSMarc Zyngier RVBAR_EL2, /* Reset Vector Base Address Register */ 3745305cc2cSMarc Zyngier CONTEXTIDR_EL2, /* Context ID Register (EL2) */ 3755305cc2cSMarc Zyngier TPIDR_EL2, /* EL2 Software Thread ID Register */ 3765305cc2cSMarc Zyngier CNTHCTL_EL2, /* Counter-timer Hypervisor Control register */ 3775305cc2cSMarc Zyngier SP_EL2, /* EL2 Stack Pointer */ 37881dc9504SMarc Zyngier CNTHP_CTL_EL2, 37981dc9504SMarc Zyngier CNTHP_CVAL_EL2, 38081dc9504SMarc Zyngier CNTHV_CTL_EL2, 38181dc9504SMarc Zyngier CNTHV_CVAL_EL2, 3825305cc2cSMarc Zyngier 3839d8415d6SMarc Zyngier NR_SYS_REGS /* Nothing after this line! */ 3849d8415d6SMarc Zyngier }; 3859d8415d6SMarc Zyngier 3864f8d6632SMarc Zyngier struct kvm_cpu_context { 387e47c2055SMarc Zyngier struct user_pt_regs regs; /* sp = sp_el0 */ 388e47c2055SMarc Zyngier 389fd85b667SMarc Zyngier u64 spsr_abt; 390fd85b667SMarc Zyngier u64 spsr_und; 391fd85b667SMarc Zyngier u64 spsr_irq; 392fd85b667SMarc Zyngier u64 spsr_fiq; 393e47c2055SMarc Zyngier 394e47c2055SMarc Zyngier struct user_fpsimd_state fp_regs; 395e47c2055SMarc Zyngier 3964f8d6632SMarc Zyngier u64 sys_regs[NR_SYS_REGS]; 397c97e166eSJames Morse 398c97e166eSJames Morse struct kvm_vcpu *__hyp_running_vcpu; 3994f8d6632SMarc Zyngier }; 4004f8d6632SMarc Zyngier 401630a1685SAndrew Murray struct kvm_host_data { 402630a1685SAndrew Murray struct kvm_cpu_context host_ctxt; 403630a1685SAndrew Murray }; 404630a1685SAndrew Murray 405ff367fe4SDavid Brazdil struct kvm_host_psci_config { 406ff367fe4SDavid Brazdil /* PSCI version used by host. */ 407ff367fe4SDavid Brazdil u32 version; 408ff367fe4SDavid Brazdil 409ff367fe4SDavid Brazdil /* Function IDs used by host if version is v0.1. */ 410ff367fe4SDavid Brazdil struct psci_0_1_function_ids function_ids_0_1; 411ff367fe4SDavid Brazdil 412767c973fSMarc Zyngier bool psci_0_1_cpu_suspend_implemented; 413767c973fSMarc Zyngier bool psci_0_1_cpu_on_implemented; 414767c973fSMarc Zyngier bool psci_0_1_cpu_off_implemented; 415767c973fSMarc Zyngier bool psci_0_1_migrate_implemented; 416ff367fe4SDavid Brazdil }; 417ff367fe4SDavid Brazdil 418ff367fe4SDavid Brazdil extern struct kvm_host_psci_config kvm_nvhe_sym(kvm_host_psci_config); 419ff367fe4SDavid Brazdil #define kvm_host_psci_config CHOOSE_NVHE_SYM(kvm_host_psci_config) 420ff367fe4SDavid Brazdil 42161fe0c37SDavid Brazdil extern s64 kvm_nvhe_sym(hyp_physvirt_offset); 42261fe0c37SDavid Brazdil #define hyp_physvirt_offset CHOOSE_NVHE_SYM(hyp_physvirt_offset) 42361fe0c37SDavid Brazdil 42461fe0c37SDavid Brazdil extern u64 kvm_nvhe_sym(hyp_cpu_logical_map)[NR_CPUS]; 42561fe0c37SDavid Brazdil #define hyp_cpu_logical_map CHOOSE_NVHE_SYM(hyp_cpu_logical_map) 42661fe0c37SDavid Brazdil 427358b28f0SMarc Zyngier struct vcpu_reset_state { 428358b28f0SMarc Zyngier unsigned long pc; 429358b28f0SMarc Zyngier unsigned long r0; 430358b28f0SMarc Zyngier bool be; 431358b28f0SMarc Zyngier bool reset; 432358b28f0SMarc Zyngier }; 433358b28f0SMarc Zyngier 4344f8d6632SMarc Zyngier struct kvm_vcpu_arch { 4354f8d6632SMarc Zyngier struct kvm_cpu_context ctxt; 4360033cd93SMark Brown 437baa85152SMark Brown /* 438baa85152SMark Brown * Guest floating point state 439baa85152SMark Brown * 440baa85152SMark Brown * The architecture has two main floating point extensions, 441baa85152SMark Brown * the original FPSIMD and SVE. These have overlapping 442baa85152SMark Brown * register views, with the FPSIMD V registers occupying the 443baa85152SMark Brown * low 128 bits of the SVE Z registers. When the core 444baa85152SMark Brown * floating point code saves the register state of a task it 445baa85152SMark Brown * records which view it saved in fp_type. 446baa85152SMark Brown */ 447b43b5dd9SDave Martin void *sve_state; 448baa85152SMark Brown enum fp_type fp_type; 449b43b5dd9SDave Martin unsigned int sve_max_vl; 4500033cd93SMark Brown u64 svcr; 4514f8d6632SMarc Zyngier 452a0e50aa3SChristoffer Dall /* Stage 2 paging state used by the hardware on next switch */ 453a0e50aa3SChristoffer Dall struct kvm_s2_mmu *hw_mmu; 454a0e50aa3SChristoffer Dall 4551460b4b2SFuad Tabba /* Values of trap registers for the guest. */ 4564f8d6632SMarc Zyngier u64 hcr_el2; 457d6c850ddSFuad Tabba u64 mdcr_el2; 458cd496228SFuad Tabba u64 cptr_el2; 4594f8d6632SMarc Zyngier 4601460b4b2SFuad Tabba /* Values of trap registers for the host before guest entry. */ 4611460b4b2SFuad Tabba u64 mdcr_el2_host; 4624f8d6632SMarc Zyngier 4634f8d6632SMarc Zyngier /* Exception Information */ 4644f8d6632SMarc Zyngier struct kvm_vcpu_fault_info fault; 4654f8d6632SMarc Zyngier 466f8077b0dSMarc Zyngier /* Ownership of the FP regs */ 467f8077b0dSMarc Zyngier enum { 468f8077b0dSMarc Zyngier FP_STATE_FREE, 469f8077b0dSMarc Zyngier FP_STATE_HOST_OWNED, 470f8077b0dSMarc Zyngier FP_STATE_GUEST_OWNED, 471f8077b0dSMarc Zyngier } fp_state; 472f8077b0dSMarc Zyngier 473690bacb8SMarc Zyngier /* Configuration flags, set once and for all before the vcpu can run */ 47454ddda91SMarc Zyngier u8 cflags; 475690bacb8SMarc Zyngier 476690bacb8SMarc Zyngier /* Input flags to the hypervisor code, potentially cleared after use */ 47754ddda91SMarc Zyngier u8 iflags; 478690bacb8SMarc Zyngier 479690bacb8SMarc Zyngier /* State flags for kernel bookkeeping, unused by the hypervisor code */ 48054ddda91SMarc Zyngier u8 sflags; 481690bacb8SMarc Zyngier 48284e690bfSAlex Bennée /* 4830fa4a313SMarc Zyngier * Don't run the guest (internal implementation need). 4840fa4a313SMarc Zyngier * 4850fa4a313SMarc Zyngier * Contrary to the flags above, this is set/cleared outside of 4860fa4a313SMarc Zyngier * a vcpu context, and thus cannot be mixed with the flags 4870fa4a313SMarc Zyngier * themselves (or the flag accesses need to be made atomic). 4880fa4a313SMarc Zyngier */ 4890fa4a313SMarc Zyngier bool pause; 4900c557ed4SMarc Zyngier 49184e690bfSAlex Bennée /* 49284e690bfSAlex Bennée * We maintain more than a single set of debug registers to support 49384e690bfSAlex Bennée * debugging the guest from the host and to maintain separate host and 49484e690bfSAlex Bennée * guest state during world switches. vcpu_debug_state are the debug 49584e690bfSAlex Bennée * registers of the vcpu as the guest sees them. host_debug_state are 496834bf887SAlex Bennée * the host registers which are saved and restored during 497834bf887SAlex Bennée * world switches. external_debug_state contains the debug 498834bf887SAlex Bennée * values we want to debug the guest. This is set via the 499834bf887SAlex Bennée * KVM_SET_GUEST_DEBUG ioctl. 50084e690bfSAlex Bennée * 50184e690bfSAlex Bennée * debug_ptr points to the set of debug registers that should be loaded 50284e690bfSAlex Bennée * onto the hardware when running the guest. 50384e690bfSAlex Bennée */ 50484e690bfSAlex Bennée struct kvm_guest_debug_arch *debug_ptr; 50584e690bfSAlex Bennée struct kvm_guest_debug_arch vcpu_debug_state; 506834bf887SAlex Bennée struct kvm_guest_debug_arch external_debug_state; 50784e690bfSAlex Bennée 508e6b673b7SDave Martin struct user_fpsimd_state *host_fpsimd_state; /* hyp VA */ 50952b28657SQuentin Perret struct task_struct *parent_task; 510e6b673b7SDave Martin 511f85279b4SWill Deacon struct { 512f85279b4SWill Deacon /* {Break,watch}point registers */ 513f85279b4SWill Deacon struct kvm_guest_debug_arch regs; 514f85279b4SWill Deacon /* Statistical profiling extension */ 515f85279b4SWill Deacon u64 pmscr_el1; 516a1319260SSuzuki K Poulose /* Self-hosted trace */ 517a1319260SSuzuki K Poulose u64 trfcr_el1; 518f85279b4SWill Deacon } host_debug_state; 5194f8d6632SMarc Zyngier 5204f8d6632SMarc Zyngier /* VGIC state */ 5214f8d6632SMarc Zyngier struct vgic_cpu vgic_cpu; 5224f8d6632SMarc Zyngier struct arch_timer_cpu timer_cpu; 52304fe4726SShannon Zhao struct kvm_pmu pmu; 5244f8d6632SMarc Zyngier 5254f8d6632SMarc Zyngier /* 526337b99bfSAlex Bennée * Guest registers we preserve during guest debugging. 527337b99bfSAlex Bennée * 528337b99bfSAlex Bennée * These shadow registers are updated by the kvm_handle_sys_reg 529337b99bfSAlex Bennée * trap handler if the guest accesses or updates them while we 530337b99bfSAlex Bennée * are using guest debug. 531337b99bfSAlex Bennée */ 532337b99bfSAlex Bennée struct { 533337b99bfSAlex Bennée u32 mdscr_el1; 53434fbdee0SReiji Watanabe bool pstate_ss; 535337b99bfSAlex Bennée } guest_debug_preserved; 536337b99bfSAlex Bennée 537b171f9bbSOliver Upton /* vcpu power state */ 538b171f9bbSOliver Upton struct kvm_mp_state mp_state; 5390acc7239SOliver Upton spinlock_t mp_state_lock; 5404f8d6632SMarc Zyngier 5414f8d6632SMarc Zyngier /* Cache some mmu pages needed inside spinlock regions */ 5424f8d6632SMarc Zyngier struct kvm_mmu_memory_cache mmu_page_cache; 5434f8d6632SMarc Zyngier 5444f8d6632SMarc Zyngier /* Target CPU and feature flags */ 5456c8c0c4dSChen Gang int target; 5464f8d6632SMarc Zyngier DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES); 5474f8d6632SMarc Zyngier 5484715c14bSJames Morse /* Virtual SError ESR to restore when HCR_EL2.VSE is set */ 5494715c14bSJames Morse u64 vsesr_el2; 550d47533daSChristoffer Dall 551358b28f0SMarc Zyngier /* Additional reset state */ 552358b28f0SMarc Zyngier struct vcpu_reset_state reset_state; 553358b28f0SMarc Zyngier 5548564d637SSteven Price /* Guest PV state */ 5558564d637SSteven Price struct { 5568564d637SSteven Price u64 last_steal; 5578564d637SSteven Price gpa_t base; 5588564d637SSteven Price } steal; 5597af0c253SAkihiko Odaki 5607af0c253SAkihiko Odaki /* Per-vcpu CCSIDR override or NULL */ 5617af0c253SAkihiko Odaki u32 *ccsidr; 5624f8d6632SMarc Zyngier }; 5634f8d6632SMarc Zyngier 564e87abb73SMarc Zyngier /* 565e87abb73SMarc Zyngier * Each 'flag' is composed of a comma-separated triplet: 566e87abb73SMarc Zyngier * 567e87abb73SMarc Zyngier * - the flag-set it belongs to in the vcpu->arch structure 568e87abb73SMarc Zyngier * - the value for that flag 569e87abb73SMarc Zyngier * - the mask for that flag 570e87abb73SMarc Zyngier * 571e87abb73SMarc Zyngier * __vcpu_single_flag() builds such a triplet for a single-bit flag. 572e87abb73SMarc Zyngier * unpack_vcpu_flag() extract the flag value from the triplet for 573e87abb73SMarc Zyngier * direct use outside of the flag accessors. 574e87abb73SMarc Zyngier */ 575e87abb73SMarc Zyngier #define __vcpu_single_flag(_set, _f) _set, (_f), (_f) 576e87abb73SMarc Zyngier 577e87abb73SMarc Zyngier #define __unpack_flag(_set, _f, _m) _f 578e87abb73SMarc Zyngier #define unpack_vcpu_flag(...) __unpack_flag(__VA_ARGS__) 579e87abb73SMarc Zyngier 5805a3984f4SMarc Zyngier #define __build_check_flag(v, flagset, f, m) \ 5815a3984f4SMarc Zyngier do { \ 5825a3984f4SMarc Zyngier typeof(v->arch.flagset) *_fset; \ 5835a3984f4SMarc Zyngier \ 5845a3984f4SMarc Zyngier /* Check that the flags fit in the mask */ \ 5855a3984f4SMarc Zyngier BUILD_BUG_ON(HWEIGHT(m) != HWEIGHT((f) | (m))); \ 5865a3984f4SMarc Zyngier /* Check that the flags fit in the type */ \ 5875a3984f4SMarc Zyngier BUILD_BUG_ON((sizeof(*_fset) * 8) <= __fls(m)); \ 5885a3984f4SMarc Zyngier } while (0) 5895a3984f4SMarc Zyngier 590e87abb73SMarc Zyngier #define __vcpu_get_flag(v, flagset, f, m) \ 591e87abb73SMarc Zyngier ({ \ 5925a3984f4SMarc Zyngier __build_check_flag(v, flagset, f, m); \ 5935a3984f4SMarc Zyngier \ 59435dcb3acSMarc Zyngier READ_ONCE(v->arch.flagset) & (m); \ 595e87abb73SMarc Zyngier }) 596e87abb73SMarc Zyngier 59735dcb3acSMarc Zyngier /* 59835dcb3acSMarc Zyngier * Note that the set/clear accessors must be preempt-safe in order to 59935dcb3acSMarc Zyngier * avoid nesting them with load/put which also manipulate flags... 60035dcb3acSMarc Zyngier */ 60135dcb3acSMarc Zyngier #ifdef __KVM_NVHE_HYPERVISOR__ 60235dcb3acSMarc Zyngier /* the nVHE hypervisor is always non-preemptible */ 60335dcb3acSMarc Zyngier #define __vcpu_flags_preempt_disable() 60435dcb3acSMarc Zyngier #define __vcpu_flags_preempt_enable() 60535dcb3acSMarc Zyngier #else 60635dcb3acSMarc Zyngier #define __vcpu_flags_preempt_disable() preempt_disable() 60735dcb3acSMarc Zyngier #define __vcpu_flags_preempt_enable() preempt_enable() 60835dcb3acSMarc Zyngier #endif 60935dcb3acSMarc Zyngier 610e87abb73SMarc Zyngier #define __vcpu_set_flag(v, flagset, f, m) \ 611e87abb73SMarc Zyngier do { \ 612e87abb73SMarc Zyngier typeof(v->arch.flagset) *fset; \ 613e87abb73SMarc Zyngier \ 6145a3984f4SMarc Zyngier __build_check_flag(v, flagset, f, m); \ 6155a3984f4SMarc Zyngier \ 616e87abb73SMarc Zyngier fset = &v->arch.flagset; \ 61735dcb3acSMarc Zyngier __vcpu_flags_preempt_disable(); \ 618e87abb73SMarc Zyngier if (HWEIGHT(m) > 1) \ 619e87abb73SMarc Zyngier *fset &= ~(m); \ 620e87abb73SMarc Zyngier *fset |= (f); \ 62135dcb3acSMarc Zyngier __vcpu_flags_preempt_enable(); \ 622e87abb73SMarc Zyngier } while (0) 623e87abb73SMarc Zyngier 624e87abb73SMarc Zyngier #define __vcpu_clear_flag(v, flagset, f, m) \ 625e87abb73SMarc Zyngier do { \ 626e87abb73SMarc Zyngier typeof(v->arch.flagset) *fset; \ 627e87abb73SMarc Zyngier \ 6285a3984f4SMarc Zyngier __build_check_flag(v, flagset, f, m); \ 6295a3984f4SMarc Zyngier \ 630e87abb73SMarc Zyngier fset = &v->arch.flagset; \ 63135dcb3acSMarc Zyngier __vcpu_flags_preempt_disable(); \ 632e87abb73SMarc Zyngier *fset &= ~(m); \ 63335dcb3acSMarc Zyngier __vcpu_flags_preempt_enable(); \ 634e87abb73SMarc Zyngier } while (0) 635e87abb73SMarc Zyngier 636e87abb73SMarc Zyngier #define vcpu_get_flag(v, ...) __vcpu_get_flag((v), __VA_ARGS__) 637e87abb73SMarc Zyngier #define vcpu_set_flag(v, ...) __vcpu_set_flag((v), __VA_ARGS__) 638e87abb73SMarc Zyngier #define vcpu_clear_flag(v, ...) __vcpu_clear_flag((v), __VA_ARGS__) 639e87abb73SMarc Zyngier 6404c0680d3SMarc Zyngier /* SVE exposed to guest */ 6414c0680d3SMarc Zyngier #define GUEST_HAS_SVE __vcpu_single_flag(cflags, BIT(0)) 6424c0680d3SMarc Zyngier /* SVE config completed */ 6434c0680d3SMarc Zyngier #define VCPU_SVE_FINALIZED __vcpu_single_flag(cflags, BIT(1)) 6444c0680d3SMarc Zyngier /* PTRAUTH exposed to guest */ 6454c0680d3SMarc Zyngier #define GUEST_HAS_PTRAUTH __vcpu_single_flag(cflags, BIT(2)) 6464c0680d3SMarc Zyngier 647699bb2e0SMarc Zyngier /* Exception pending */ 648699bb2e0SMarc Zyngier #define PENDING_EXCEPTION __vcpu_single_flag(iflags, BIT(0)) 649699bb2e0SMarc Zyngier /* 650699bb2e0SMarc Zyngier * PC increment. Overlaps with EXCEPT_MASK on purpose so that it can't 651699bb2e0SMarc Zyngier * be set together with an exception... 652699bb2e0SMarc Zyngier */ 653699bb2e0SMarc Zyngier #define INCREMENT_PC __vcpu_single_flag(iflags, BIT(1)) 654699bb2e0SMarc Zyngier /* Target EL/MODE (not a single flag, but let's abuse the macro) */ 655699bb2e0SMarc Zyngier #define EXCEPT_MASK __vcpu_single_flag(iflags, GENMASK(3, 1)) 656699bb2e0SMarc Zyngier 657699bb2e0SMarc Zyngier /* Helpers to encode exceptions with minimum fuss */ 658699bb2e0SMarc Zyngier #define __EXCEPT_MASK_VAL unpack_vcpu_flag(EXCEPT_MASK) 659699bb2e0SMarc Zyngier #define __EXCEPT_SHIFT __builtin_ctzl(__EXCEPT_MASK_VAL) 660699bb2e0SMarc Zyngier #define __vcpu_except_flags(_f) iflags, (_f << __EXCEPT_SHIFT), __EXCEPT_MASK_VAL 661699bb2e0SMarc Zyngier 662699bb2e0SMarc Zyngier /* 663699bb2e0SMarc Zyngier * When PENDING_EXCEPTION is set, EXCEPT_MASK can take the following 664699bb2e0SMarc Zyngier * values: 665699bb2e0SMarc Zyngier * 666699bb2e0SMarc Zyngier * For AArch32 EL1: 667699bb2e0SMarc Zyngier */ 668699bb2e0SMarc Zyngier #define EXCEPT_AA32_UND __vcpu_except_flags(0) 669699bb2e0SMarc Zyngier #define EXCEPT_AA32_IABT __vcpu_except_flags(1) 670699bb2e0SMarc Zyngier #define EXCEPT_AA32_DABT __vcpu_except_flags(2) 671699bb2e0SMarc Zyngier /* For AArch64: */ 672699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_SYNC __vcpu_except_flags(0) 673699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_IRQ __vcpu_except_flags(1) 674699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_FIQ __vcpu_except_flags(2) 675699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL1_SERR __vcpu_except_flags(3) 67647f3a2fcSJintack Lim /* For AArch64 with NV: */ 677699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_SYNC __vcpu_except_flags(4) 678699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_IRQ __vcpu_except_flags(5) 679699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_FIQ __vcpu_except_flags(6) 680699bb2e0SMarc Zyngier #define EXCEPT_AA64_EL2_SERR __vcpu_except_flags(7) 681b1da4908SMarc Zyngier /* Guest debug is live */ 682b1da4908SMarc Zyngier #define DEBUG_DIRTY __vcpu_single_flag(iflags, BIT(4)) 683b1da4908SMarc Zyngier /* Save SPE context if active */ 684b1da4908SMarc Zyngier #define DEBUG_STATE_SAVE_SPE __vcpu_single_flag(iflags, BIT(5)) 685b1da4908SMarc Zyngier /* Save TRBE context if active */ 686b1da4908SMarc Zyngier #define DEBUG_STATE_SAVE_TRBE __vcpu_single_flag(iflags, BIT(6)) 687d9552fe1SMarc Zyngier /* vcpu running in HYP context */ 688d9552fe1SMarc Zyngier #define VCPU_HYP_CONTEXT __vcpu_single_flag(iflags, BIT(7)) 689e87abb73SMarc Zyngier 6900affa37fSMarc Zyngier /* SVE enabled for host EL0 */ 6910affa37fSMarc Zyngier #define HOST_SVE_ENABLED __vcpu_single_flag(sflags, BIT(0)) 6920affa37fSMarc Zyngier /* SME enabled for EL0 */ 6930affa37fSMarc Zyngier #define HOST_SME_ENABLED __vcpu_single_flag(sflags, BIT(1)) 694aff3ccd7SMarc Zyngier /* Physical CPU not in supported_cpus */ 695aff3ccd7SMarc Zyngier #define ON_UNSUPPORTED_CPU __vcpu_single_flag(sflags, BIT(2)) 696eebc538dSMarc Zyngier /* WFIT instruction trapped */ 697eebc538dSMarc Zyngier #define IN_WFIT __vcpu_single_flag(sflags, BIT(3)) 69830b6ab45SMarc Zyngier /* vcpu system registers loaded on physical CPU */ 69930b6ab45SMarc Zyngier #define SYSREGS_ON_CPU __vcpu_single_flag(sflags, BIT(4)) 700370531d1SReiji Watanabe /* Software step state is Active-pending */ 701370531d1SReiji Watanabe #define DBG_SS_ACTIVE_PENDING __vcpu_single_flag(sflags, BIT(5)) 702*0c2f9acfSReiji Watanabe /* PMUSERENR for the guest EL0 is on physical CPU */ 703*0c2f9acfSReiji Watanabe #define PMUSERENR_ON_CPU __vcpu_single_flag(sflags, BIT(6)) 704370531d1SReiji Watanabe 7050affa37fSMarc Zyngier 706b43b5dd9SDave Martin /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */ 707985d3a1bSMarc Zyngier #define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) + \ 708985d3a1bSMarc Zyngier sve_ffr_offset((vcpu)->arch.sve_max_vl)) 709b43b5dd9SDave Martin 710468f3477SMarc Zyngier #define vcpu_sve_max_vq(vcpu) sve_vq_from_vl((vcpu)->arch.sve_max_vl) 711b3eb56b6SDave Martin 712e1c9c983SDave Martin #define vcpu_sve_state_size(vcpu) ({ \ 713e1c9c983SDave Martin size_t __size_ret; \ 714e1c9c983SDave Martin unsigned int __vcpu_vq; \ 715e1c9c983SDave Martin \ 716e1c9c983SDave Martin if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) { \ 717e1c9c983SDave Martin __size_ret = 0; \ 718e1c9c983SDave Martin } else { \ 719468f3477SMarc Zyngier __vcpu_vq = vcpu_sve_max_vq(vcpu); \ 720e1c9c983SDave Martin __size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq); \ 721e1c9c983SDave Martin } \ 722e1c9c983SDave Martin \ 723e1c9c983SDave Martin __size_ret; \ 724e1c9c983SDave Martin }) 725e1c9c983SDave Martin 726892fd259SMarc Zyngier #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \ 727892fd259SMarc Zyngier KVM_GUESTDBG_USE_SW_BP | \ 728892fd259SMarc Zyngier KVM_GUESTDBG_USE_HW | \ 729892fd259SMarc Zyngier KVM_GUESTDBG_SINGLESTEP) 7301765edbaSDave Martin 7311765edbaSDave Martin #define vcpu_has_sve(vcpu) (system_supports_sve() && \ 7324c0680d3SMarc Zyngier vcpu_get_flag(vcpu, GUEST_HAS_SVE)) 733fa89d31cSDave Martin 734bf4086b1SMarc Zyngier #ifdef CONFIG_ARM64_PTR_AUTH 735bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) \ 736bf4086b1SMarc Zyngier ((cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) || \ 737bf4086b1SMarc Zyngier cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) && \ 7384c0680d3SMarc Zyngier vcpu_get_flag(vcpu, GUEST_HAS_PTRAUTH)) 739bf4086b1SMarc Zyngier #else 740bf4086b1SMarc Zyngier #define vcpu_has_ptrauth(vcpu) false 741bf4086b1SMarc Zyngier #endif 742b890d75cSAmit Daniel Kachhap 743583cda1bSAlexandru Elisei #define vcpu_on_unsupported_cpu(vcpu) \ 744aff3ccd7SMarc Zyngier vcpu_get_flag(vcpu, ON_UNSUPPORTED_CPU) 745583cda1bSAlexandru Elisei 746583cda1bSAlexandru Elisei #define vcpu_set_on_unsupported_cpu(vcpu) \ 747aff3ccd7SMarc Zyngier vcpu_set_flag(vcpu, ON_UNSUPPORTED_CPU) 748583cda1bSAlexandru Elisei 749583cda1bSAlexandru Elisei #define vcpu_clear_on_unsupported_cpu(vcpu) \ 750aff3ccd7SMarc Zyngier vcpu_clear_flag(vcpu, ON_UNSUPPORTED_CPU) 751583cda1bSAlexandru Elisei 752e47c2055SMarc Zyngier #define vcpu_gp_regs(v) (&(v)->arch.ctxt.regs) 7538d404c4cSChristoffer Dall 7548d404c4cSChristoffer Dall /* 7551b422dd7SMarc Zyngier * Only use __vcpu_sys_reg/ctxt_sys_reg if you know you want the 7561b422dd7SMarc Zyngier * memory backed version of a register, and not the one most recently 7571b422dd7SMarc Zyngier * accessed by a running VCPU. For example, for userspace access or 7581b422dd7SMarc Zyngier * for system registers that are never context switched, but only 7591b422dd7SMarc Zyngier * emulated. 7608d404c4cSChristoffer Dall */ 7611b422dd7SMarc Zyngier #define __ctxt_sys_reg(c,r) (&(c)->sys_regs[(r)]) 7621b422dd7SMarc Zyngier 7631b422dd7SMarc Zyngier #define ctxt_sys_reg(c,r) (*__ctxt_sys_reg(c,r)) 7641b422dd7SMarc Zyngier 7651b422dd7SMarc Zyngier #define __vcpu_sys_reg(v,r) (ctxt_sys_reg(&(v)->arch.ctxt, (r))) 7668d404c4cSChristoffer Dall 767da6f1666SChristoffer Dall u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg); 768d47533daSChristoffer Dall void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg); 7698d404c4cSChristoffer Dall 77021c81001SMarc Zyngier static inline bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val) 77121c81001SMarc Zyngier { 77221c81001SMarc Zyngier /* 77321c81001SMarc Zyngier * *** VHE ONLY *** 77421c81001SMarc Zyngier * 77521c81001SMarc Zyngier * System registers listed in the switch are not saved on every 77621c81001SMarc Zyngier * exit from the guest but are only saved on vcpu_put. 77721c81001SMarc Zyngier * 77821c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 77921c81001SMarc Zyngier * should never be listed below, because the guest cannot modify its 78021c81001SMarc Zyngier * own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's 78121c81001SMarc Zyngier * thread when emulating cross-VCPU communication. 78221c81001SMarc Zyngier */ 78321c81001SMarc Zyngier if (!has_vhe()) 78421c81001SMarc Zyngier return false; 78521c81001SMarc Zyngier 78621c81001SMarc Zyngier switch (reg) { 78721c81001SMarc Zyngier case SCTLR_EL1: *val = read_sysreg_s(SYS_SCTLR_EL12); break; 78821c81001SMarc Zyngier case CPACR_EL1: *val = read_sysreg_s(SYS_CPACR_EL12); break; 78921c81001SMarc Zyngier case TTBR0_EL1: *val = read_sysreg_s(SYS_TTBR0_EL12); break; 79021c81001SMarc Zyngier case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); break; 79121c81001SMarc Zyngier case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break; 79221c81001SMarc Zyngier case ESR_EL1: *val = read_sysreg_s(SYS_ESR_EL12); break; 79321c81001SMarc Zyngier case AFSR0_EL1: *val = read_sysreg_s(SYS_AFSR0_EL12); break; 79421c81001SMarc Zyngier case AFSR1_EL1: *val = read_sysreg_s(SYS_AFSR1_EL12); break; 79521c81001SMarc Zyngier case FAR_EL1: *val = read_sysreg_s(SYS_FAR_EL12); break; 79621c81001SMarc Zyngier case MAIR_EL1: *val = read_sysreg_s(SYS_MAIR_EL12); break; 79721c81001SMarc Zyngier case VBAR_EL1: *val = read_sysreg_s(SYS_VBAR_EL12); break; 79821c81001SMarc Zyngier case CONTEXTIDR_EL1: *val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break; 79921c81001SMarc Zyngier case TPIDR_EL0: *val = read_sysreg_s(SYS_TPIDR_EL0); break; 80021c81001SMarc Zyngier case TPIDRRO_EL0: *val = read_sysreg_s(SYS_TPIDRRO_EL0); break; 80121c81001SMarc Zyngier case TPIDR_EL1: *val = read_sysreg_s(SYS_TPIDR_EL1); break; 80221c81001SMarc Zyngier case AMAIR_EL1: *val = read_sysreg_s(SYS_AMAIR_EL12); break; 80321c81001SMarc Zyngier case CNTKCTL_EL1: *val = read_sysreg_s(SYS_CNTKCTL_EL12); break; 80421c81001SMarc Zyngier case ELR_EL1: *val = read_sysreg_s(SYS_ELR_EL12); break; 80521c81001SMarc Zyngier case PAR_EL1: *val = read_sysreg_par(); break; 80621c81001SMarc Zyngier case DACR32_EL2: *val = read_sysreg_s(SYS_DACR32_EL2); break; 80721c81001SMarc Zyngier case IFSR32_EL2: *val = read_sysreg_s(SYS_IFSR32_EL2); break; 80821c81001SMarc Zyngier case DBGVCR32_EL2: *val = read_sysreg_s(SYS_DBGVCR32_EL2); break; 80921c81001SMarc Zyngier default: return false; 81021c81001SMarc Zyngier } 81121c81001SMarc Zyngier 81221c81001SMarc Zyngier return true; 81321c81001SMarc Zyngier } 81421c81001SMarc Zyngier 81521c81001SMarc Zyngier static inline bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg) 81621c81001SMarc Zyngier { 81721c81001SMarc Zyngier /* 81821c81001SMarc Zyngier * *** VHE ONLY *** 81921c81001SMarc Zyngier * 82021c81001SMarc Zyngier * System registers listed in the switch are not restored on every 82121c81001SMarc Zyngier * entry to the guest but are only restored on vcpu_load. 82221c81001SMarc Zyngier * 82321c81001SMarc Zyngier * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but 82421c81001SMarc Zyngier * should never be listed below, because the MPIDR should only be set 82521c81001SMarc Zyngier * once, before running the VCPU, and never changed later. 82621c81001SMarc Zyngier */ 82721c81001SMarc Zyngier if (!has_vhe()) 82821c81001SMarc Zyngier return false; 82921c81001SMarc Zyngier 83021c81001SMarc Zyngier switch (reg) { 83121c81001SMarc Zyngier case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break; 83221c81001SMarc Zyngier case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); break; 83321c81001SMarc Zyngier case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); break; 83421c81001SMarc Zyngier case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break; 83521c81001SMarc Zyngier case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; 83621c81001SMarc Zyngier case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); break; 83721c81001SMarc Zyngier case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); break; 83821c81001SMarc Zyngier case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); break; 83921c81001SMarc Zyngier case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); break; 84021c81001SMarc Zyngier case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); break; 84121c81001SMarc Zyngier case VBAR_EL1: write_sysreg_s(val, SYS_VBAR_EL12); break; 84221c81001SMarc Zyngier case CONTEXTIDR_EL1: write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break; 84321c81001SMarc Zyngier case TPIDR_EL0: write_sysreg_s(val, SYS_TPIDR_EL0); break; 84421c81001SMarc Zyngier case TPIDRRO_EL0: write_sysreg_s(val, SYS_TPIDRRO_EL0); break; 84521c81001SMarc Zyngier case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); break; 84621c81001SMarc Zyngier case AMAIR_EL1: write_sysreg_s(val, SYS_AMAIR_EL12); break; 84721c81001SMarc Zyngier case CNTKCTL_EL1: write_sysreg_s(val, SYS_CNTKCTL_EL12); break; 84821c81001SMarc Zyngier case ELR_EL1: write_sysreg_s(val, SYS_ELR_EL12); break; 84921c81001SMarc Zyngier case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); break; 85021c81001SMarc Zyngier case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); break; 85121c81001SMarc Zyngier case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); break; 85221c81001SMarc Zyngier case DBGVCR32_EL2: write_sysreg_s(val, SYS_DBGVCR32_EL2); break; 85321c81001SMarc Zyngier default: return false; 85421c81001SMarc Zyngier } 85521c81001SMarc Zyngier 85621c81001SMarc Zyngier return true; 85721c81001SMarc Zyngier } 85821c81001SMarc Zyngier 8594f8d6632SMarc Zyngier struct kvm_vm_stat { 8600193cc90SJing Zhang struct kvm_vm_stat_generic generic; 8614f8d6632SMarc Zyngier }; 8624f8d6632SMarc Zyngier 8634f8d6632SMarc Zyngier struct kvm_vcpu_stat { 8640193cc90SJing Zhang struct kvm_vcpu_stat_generic generic; 8658a7e75d4SSuraj Jitindar Singh u64 hvc_exit_stat; 866b19e6892SAmit Tomar u64 wfe_exit_stat; 867b19e6892SAmit Tomar u64 wfi_exit_stat; 868b19e6892SAmit Tomar u64 mmio_exit_user; 869b19e6892SAmit Tomar u64 mmio_exit_kernel; 870fe5161d2SOliver Upton u64 signal_exits; 871b19e6892SAmit Tomar u64 exits; 8724f8d6632SMarc Zyngier }; 8734f8d6632SMarc Zyngier 87408e873cbSYueHaibing void kvm_vcpu_preferred_target(struct kvm_vcpu_init *init); 8754f8d6632SMarc Zyngier unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu); 8764f8d6632SMarc Zyngier int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); 8774f8d6632SMarc Zyngier int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 8784f8d6632SMarc Zyngier int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); 8796ac4a5acSMarc Zyngier 8806ac4a5acSMarc Zyngier unsigned long kvm_arm_num_sys_reg_descs(struct kvm_vcpu *vcpu); 8816ac4a5acSMarc Zyngier int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices); 8826ac4a5acSMarc Zyngier 883539aee0eSJames Morse int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu, 884b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 885b7b27facSDongjiu Geng 886539aee0eSJames Morse int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, 887b7b27facSDongjiu Geng struct kvm_vcpu_events *events); 8884f8d6632SMarc Zyngier 8894f8d6632SMarc Zyngier #define KVM_ARCH_WANT_MMU_NOTIFIER 8904f8d6632SMarc Zyngier 891b13216cfSChristoffer Dall void kvm_arm_halt_guest(struct kvm *kvm); 892b13216cfSChristoffer Dall void kvm_arm_resume_guest(struct kvm *kvm); 8934f8d6632SMarc Zyngier 894cc5705fbSMarc Zyngier #define vcpu_has_run_once(vcpu) !!rcu_access_pointer((vcpu)->pid) 895cc5705fbSMarc Zyngier 89640a50853SQuentin Perret #ifndef __KVM_NVHE_HYPERVISOR__ 897f50b6f6aSAndrew Scull #define kvm_call_hyp_nvhe(f, ...) \ 898f50b6f6aSAndrew Scull ({ \ 89905469831SAndrew Scull struct arm_smccc_res res; \ 90005469831SAndrew Scull \ 90105469831SAndrew Scull arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(f), \ 90205469831SAndrew Scull ##__VA_ARGS__, &res); \ 90305469831SAndrew Scull WARN_ON(res.a0 != SMCCC_RET_SUCCESS); \ 90405469831SAndrew Scull \ 90505469831SAndrew Scull res.a1; \ 906f50b6f6aSAndrew Scull }) 907f50b6f6aSAndrew Scull 90818fc7bf8SMarc Zyngier /* 90918fc7bf8SMarc Zyngier * The couple of isb() below are there to guarantee the same behaviour 91018fc7bf8SMarc Zyngier * on VHE as on !VHE, where the eret to EL1 acts as a context 91118fc7bf8SMarc Zyngier * synchronization event. 91218fc7bf8SMarc Zyngier */ 91318fc7bf8SMarc Zyngier #define kvm_call_hyp(f, ...) \ 91418fc7bf8SMarc Zyngier do { \ 91518fc7bf8SMarc Zyngier if (has_vhe()) { \ 91618fc7bf8SMarc Zyngier f(__VA_ARGS__); \ 91718fc7bf8SMarc Zyngier isb(); \ 91818fc7bf8SMarc Zyngier } else { \ 919f50b6f6aSAndrew Scull kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 92018fc7bf8SMarc Zyngier } \ 92118fc7bf8SMarc Zyngier } while(0) 92218fc7bf8SMarc Zyngier 92318fc7bf8SMarc Zyngier #define kvm_call_hyp_ret(f, ...) \ 92418fc7bf8SMarc Zyngier ({ \ 92518fc7bf8SMarc Zyngier typeof(f(__VA_ARGS__)) ret; \ 92618fc7bf8SMarc Zyngier \ 92718fc7bf8SMarc Zyngier if (has_vhe()) { \ 92818fc7bf8SMarc Zyngier ret = f(__VA_ARGS__); \ 92918fc7bf8SMarc Zyngier isb(); \ 93018fc7bf8SMarc Zyngier } else { \ 93105469831SAndrew Scull ret = kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \ 93218fc7bf8SMarc Zyngier } \ 93318fc7bf8SMarc Zyngier \ 93418fc7bf8SMarc Zyngier ret; \ 93518fc7bf8SMarc Zyngier }) 93640a50853SQuentin Perret #else /* __KVM_NVHE_HYPERVISOR__ */ 93740a50853SQuentin Perret #define kvm_call_hyp(f, ...) f(__VA_ARGS__) 93840a50853SQuentin Perret #define kvm_call_hyp_ret(f, ...) f(__VA_ARGS__) 93940a50853SQuentin Perret #define kvm_call_hyp_nvhe(f, ...) f(__VA_ARGS__) 94040a50853SQuentin Perret #endif /* __KVM_NVHE_HYPERVISOR__ */ 94122b39ca3SMarc Zyngier 942cf5d3188SChristoffer Dall void force_vm_exit(const cpumask_t *mask); 9434f8d6632SMarc Zyngier 94474cc7e0cSTianjia Zhang int handle_exit(struct kvm_vcpu *vcpu, int exception_index); 94574cc7e0cSTianjia Zhang void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index); 9464f8d6632SMarc Zyngier 9476ac4a5acSMarc Zyngier int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu); 9486ac4a5acSMarc Zyngier int kvm_handle_cp14_32(struct kvm_vcpu *vcpu); 9496ac4a5acSMarc Zyngier int kvm_handle_cp14_64(struct kvm_vcpu *vcpu); 9506ac4a5acSMarc Zyngier int kvm_handle_cp15_32(struct kvm_vcpu *vcpu); 9516ac4a5acSMarc Zyngier int kvm_handle_cp15_64(struct kvm_vcpu *vcpu); 9526ac4a5acSMarc Zyngier int kvm_handle_sys_reg(struct kvm_vcpu *vcpu); 9539369bc5cSOliver Upton int kvm_handle_cp10_id(struct kvm_vcpu *vcpu); 9546ac4a5acSMarc Zyngier 9556ac4a5acSMarc Zyngier void kvm_reset_sys_regs(struct kvm_vcpu *vcpu); 9566ac4a5acSMarc Zyngier 9578d20bd63SSean Christopherson int __init kvm_sys_reg_table_init(void); 9586ac4a5acSMarc Zyngier 95996906a91SMarc Zyngier bool lock_all_vcpus(struct kvm *kvm); 96096906a91SMarc Zyngier void unlock_all_vcpus(struct kvm *kvm); 96196906a91SMarc Zyngier 9620e20f5e2SMarc Zyngier /* MMIO helpers */ 9630e20f5e2SMarc Zyngier void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data); 9640e20f5e2SMarc Zyngier unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len); 9650e20f5e2SMarc Zyngier 96674cc7e0cSTianjia Zhang int kvm_handle_mmio_return(struct kvm_vcpu *vcpu); 96774cc7e0cSTianjia Zhang int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa); 9680e20f5e2SMarc Zyngier 969e1bfc245SSean Christopherson /* 970e1bfc245SSean Christopherson * Returns true if a Performance Monitoring Interrupt (PMI), a.k.a. perf event, 971e1bfc245SSean Christopherson * arrived in guest context. For arm64, any event that arrives while a vCPU is 972e1bfc245SSean Christopherson * loaded is considered to be "in guest". 973e1bfc245SSean Christopherson */ 974e1bfc245SSean Christopherson static inline bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu) 975e1bfc245SSean Christopherson { 976e1bfc245SSean Christopherson return IS_ENABLED(CONFIG_GUEST_PERF_EVENTS) && !!vcpu; 977e1bfc245SSean Christopherson } 978e1bfc245SSean Christopherson 979b48c1a45SSteven Price long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu); 9808564d637SSteven Price gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu); 9818564d637SSteven Price void kvm_update_stolen_time(struct kvm_vcpu *vcpu); 9828564d637SSteven Price 983004a0124SAndrew Jones bool kvm_arm_pvtime_supported(void); 98458772e9aSSteven Price int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu, 98558772e9aSSteven Price struct kvm_device_attr *attr); 98658772e9aSSteven Price int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu, 98758772e9aSSteven Price struct kvm_device_attr *attr); 98858772e9aSSteven Price int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu, 98958772e9aSSteven Price struct kvm_device_attr *attr); 99058772e9aSSteven Price 9918d20bd63SSean Christopherson extern unsigned int __ro_after_init kvm_arm_vmid_bits; 9928d20bd63SSean Christopherson int __init kvm_arm_vmid_alloc_init(void); 9938d20bd63SSean Christopherson void __init kvm_arm_vmid_alloc_free(void); 99441783839SShameer Kolothum void kvm_arm_vmid_update(struct kvm_vmid *kvm_vmid); 995100b4f09SShameer Kolothum void kvm_arm_vmid_clear_active(void); 99641783839SShameer Kolothum 9978564d637SSteven Price static inline void kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch *vcpu_arch) 9988564d637SSteven Price { 999cecafc0aSYu Zhang vcpu_arch->steal.base = INVALID_GPA; 10008564d637SSteven Price } 10018564d637SSteven Price 10028564d637SSteven Price static inline bool kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch *vcpu_arch) 10038564d637SSteven Price { 1004cecafc0aSYu Zhang return (vcpu_arch->steal.base != INVALID_GPA); 10058564d637SSteven Price } 1006b48c1a45SSteven Price 1007b7b27facSDongjiu Geng void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome); 1008b7b27facSDongjiu Geng 10094429fc64SAndre Przywara struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr); 10104429fc64SAndre Przywara 101114ef9d04SMarc Zyngier DECLARE_KVM_HYP_PER_CPU(struct kvm_host_data, kvm_host_data); 10124464e210SChristoffer Dall 10131e0cf16cSMarc Zyngier static inline void kvm_init_host_cpu_context(struct kvm_cpu_context *cpu_ctxt) 101432f13955SMarc Zyngier { 101532f13955SMarc Zyngier /* The host's MPIDR is immutable, so let's set it up at boot time */ 101671071acfSMarc Zyngier ctxt_sys_reg(cpu_ctxt, MPIDR_EL1) = read_cpuid_mpidr(); 101732f13955SMarc Zyngier } 101832f13955SMarc Zyngier 10195bdf3437SJames Morse static inline bool kvm_system_needs_idmapped_vectors(void) 10205bdf3437SJames Morse { 10215bdf3437SJames Morse return cpus_have_const_cap(ARM64_SPECTRE_V3A); 10225bdf3437SJames Morse } 10235bdf3437SJames Morse 1024384b40caSMark Rutland void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu); 1025384b40caSMark Rutland 10260865e636SRadim Krčmář static inline void kvm_arch_sync_events(struct kvm *kvm) {} 10270865e636SRadim Krčmář static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} 10280865e636SRadim Krčmář 102956c7f5e7SAlex Bennée void kvm_arm_init_debug(void); 1030263d6287SAlexandru Elisei void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu); 103156c7f5e7SAlex Bennée void kvm_arm_setup_debug(struct kvm_vcpu *vcpu); 103256c7f5e7SAlex Bennée void kvm_arm_clear_debug(struct kvm_vcpu *vcpu); 103384e690bfSAlex Bennée void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu); 10347dabf02fSOliver Upton 10357dabf02fSOliver Upton #define kvm_vcpu_os_lock_enabled(vcpu) \ 10367dabf02fSOliver Upton (!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & SYS_OSLSR_OSLK)) 10377dabf02fSOliver Upton 1038bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, 1039bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 1040bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, 1041bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 1042bb0c70bcSShannon Zhao int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu, 1043bb0c70bcSShannon Zhao struct kvm_device_attr *attr); 104456c7f5e7SAlex Bennée 10452def950cSThomas Huth int kvm_vm_ioctl_mte_copy_tags(struct kvm *kvm, 1046f0376edbSSteven Price struct kvm_arm_copy_mte_tags *copy_tags); 104730ec7997SMarc Zyngier int kvm_vm_ioctl_set_counter_offset(struct kvm *kvm, 104830ec7997SMarc Zyngier struct kvm_arm_counter_offset *offset); 1049f0376edbSSteven Price 1050e6b673b7SDave Martin /* Guest/host FPSIMD coordination helpers */ 1051e6b673b7SDave Martin int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu); 1052e6b673b7SDave Martin void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu); 1053af9a0e21SMarc Zyngier void kvm_arch_vcpu_ctxflush_fp(struct kvm_vcpu *vcpu); 1054e6b673b7SDave Martin void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu); 1055e6b673b7SDave Martin void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu); 105652b28657SQuentin Perret void kvm_vcpu_unshare_task_fp(struct kvm_vcpu *vcpu); 1057e6b673b7SDave Martin 1058eb41238cSAndrew Murray static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr) 1059eb41238cSAndrew Murray { 1060435e53fbSAndrew Murray return (!has_vhe() && attr->exclude_host); 1061eb41238cSAndrew Murray } 1062eb41238cSAndrew Murray 1063d2602bb4SSuzuki K Poulose /* Flags for host debug state */ 1064d2602bb4SSuzuki K Poulose void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu); 1065d2602bb4SSuzuki K Poulose void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu); 1066d2602bb4SSuzuki K Poulose 1067052f064dSMarc Zyngier #ifdef CONFIG_KVM 1068eb41238cSAndrew Murray void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr); 1069eb41238cSAndrew Murray void kvm_clr_pmu_events(u32 clr); 1070*0c2f9acfSReiji Watanabe bool kvm_set_pmuserenr(u64 val); 1071eb41238cSAndrew Murray #else 1072eb41238cSAndrew Murray static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {} 1073eb41238cSAndrew Murray static inline void kvm_clr_pmu_events(u32 clr) {} 1074*0c2f9acfSReiji Watanabe static inline bool kvm_set_pmuserenr(u64 val) 1075*0c2f9acfSReiji Watanabe { 1076*0c2f9acfSReiji Watanabe return false; 1077*0c2f9acfSReiji Watanabe } 1078e6b673b7SDave Martin #endif 107917eed27bSDave Martin 108013aeb9b4SDavid Brazdil void kvm_vcpu_load_sysregs_vhe(struct kvm_vcpu *vcpu); 108113aeb9b4SDavid Brazdil void kvm_vcpu_put_sysregs_vhe(struct kvm_vcpu *vcpu); 1082bc192ceeSChristoffer Dall 10838d20bd63SSean Christopherson int __init kvm_set_ipa_limit(void); 10840f62f0e9SSuzuki K Poulose 1085d1e5b0e9SMarc Orr #define __KVM_HAVE_ARCH_VM_ALLOC 1086d1e5b0e9SMarc Orr struct kvm *kvm_arch_alloc_vm(void); 1087d1e5b0e9SMarc Orr 10882ea7f655SFuad Tabba static inline bool kvm_vm_is_protected(struct kvm *kvm) 10892ea7f655SFuad Tabba { 10902ea7f655SFuad Tabba return false; 10912ea7f655SFuad Tabba } 10922ea7f655SFuad Tabba 10932a0c3433SFuad Tabba void kvm_init_protected_traps(struct kvm_vcpu *vcpu); 10942a0c3433SFuad Tabba 109592e68b2bSDave Martin int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature); 10969033bba4SDave Martin bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu); 10979033bba4SDave Martin 10984c0680d3SMarc Zyngier #define kvm_arm_vcpu_sve_finalized(vcpu) vcpu_get_flag(vcpu, VCPU_SVE_FINALIZED) 10997dd32a0dSDave Martin 110006394531SMarc Zyngier #define kvm_has_mte(kvm) \ 110106394531SMarc Zyngier (system_supports_mte() && \ 110206394531SMarc Zyngier test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &(kvm)->arch.flags)) 110314bda7a9SMarc Zyngier 1104f3c6efc7SOliver Upton #define kvm_supports_32bit_el0() \ 1105f3c6efc7SOliver Upton (system_supports_32bit_el0() && \ 1106f3c6efc7SOliver Upton !static_branch_unlikely(&arm64_mismatched_32bit_el0)) 1107f3c6efc7SOliver Upton 1108de40bb8aSOliver Upton #define kvm_vm_has_ran_once(kvm) \ 1109de40bb8aSOliver Upton (test_bit(KVM_ARCH_FLAG_HAS_RAN_ONCE, &(kvm)->arch.flags)) 1110de40bb8aSOliver Upton 1111a8e190cdSArd Biesheuvel int kvm_trng_call(struct kvm_vcpu *vcpu); 1112f320bc74SQuentin Perret #ifdef CONFIG_KVM 1113f320bc74SQuentin Perret extern phys_addr_t hyp_mem_base; 1114f320bc74SQuentin Perret extern phys_addr_t hyp_mem_size; 1115f320bc74SQuentin Perret void __init kvm_hyp_reserve(void); 1116f320bc74SQuentin Perret #else 1117f320bc74SQuentin Perret static inline void kvm_hyp_reserve(void) { } 1118f320bc74SQuentin Perret #endif 1119a8e190cdSArd Biesheuvel 11201e579429SOliver Upton void kvm_arm_vcpu_power_off(struct kvm_vcpu *vcpu); 1121b171f9bbSOliver Upton bool kvm_arm_vcpu_stopped(struct kvm_vcpu *vcpu); 11221e579429SOliver Upton 11234f8d6632SMarc Zyngier #endif /* __ARM64_KVM_HOST_H__ */ 1124