1 /* 2 * Copyright (C) 2012,2013 - ARM Ltd 3 * Author: Marc Zyngier <marc.zyngier@arm.com> 4 * 5 * Derived from arch/arm/include/kvm_emulate.h 6 * Copyright (C) 2012 - Virtual Open Systems and Columbia University 7 * Author: Christoffer Dall <c.dall@virtualopensystems.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program. If not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #ifndef __ARM64_KVM_EMULATE_H__ 23 #define __ARM64_KVM_EMULATE_H__ 24 25 #include <linux/kvm_host.h> 26 27 #include <asm/esr.h> 28 #include <asm/kvm_arm.h> 29 #include <asm/kvm_mmio.h> 30 #include <asm/ptrace.h> 31 #include <asm/cputype.h> 32 #include <asm/virt.h> 33 34 unsigned long *vcpu_reg32(const struct kvm_vcpu *vcpu, u8 reg_num); 35 unsigned long *vcpu_spsr32(const struct kvm_vcpu *vcpu); 36 37 bool kvm_condition_valid32(const struct kvm_vcpu *vcpu); 38 void kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr); 39 40 void kvm_inject_undefined(struct kvm_vcpu *vcpu); 41 void kvm_inject_vabt(struct kvm_vcpu *vcpu); 42 void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr); 43 void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr); 44 void kvm_inject_undef32(struct kvm_vcpu *vcpu); 45 void kvm_inject_dabt32(struct kvm_vcpu *vcpu, unsigned long addr); 46 void kvm_inject_pabt32(struct kvm_vcpu *vcpu, unsigned long addr); 47 48 static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu) 49 { 50 vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS; 51 if (is_kernel_in_hyp_mode()) 52 vcpu->arch.hcr_el2 |= HCR_E2H; 53 if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN)) { 54 /* route synchronous external abort exceptions to EL2 */ 55 vcpu->arch.hcr_el2 |= HCR_TEA; 56 /* trap error record accesses */ 57 vcpu->arch.hcr_el2 |= HCR_TERR; 58 } 59 60 if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) 61 vcpu->arch.hcr_el2 &= ~HCR_RW; 62 } 63 64 static inline unsigned long vcpu_get_hcr(struct kvm_vcpu *vcpu) 65 { 66 return vcpu->arch.hcr_el2; 67 } 68 69 static inline void vcpu_set_hcr(struct kvm_vcpu *vcpu, unsigned long hcr) 70 { 71 vcpu->arch.hcr_el2 = hcr; 72 } 73 74 static inline void vcpu_set_vsesr(struct kvm_vcpu *vcpu, u64 vsesr) 75 { 76 vcpu->arch.vsesr_el2 = vsesr; 77 } 78 79 static inline unsigned long *vcpu_pc(const struct kvm_vcpu *vcpu) 80 { 81 return (unsigned long *)&vcpu_gp_regs(vcpu)->regs.pc; 82 } 83 84 static inline unsigned long *vcpu_elr_el1(const struct kvm_vcpu *vcpu) 85 { 86 return (unsigned long *)&vcpu_gp_regs(vcpu)->elr_el1; 87 } 88 89 static inline unsigned long *vcpu_cpsr(const struct kvm_vcpu *vcpu) 90 { 91 return (unsigned long *)&vcpu_gp_regs(vcpu)->regs.pstate; 92 } 93 94 static inline bool vcpu_mode_is_32bit(const struct kvm_vcpu *vcpu) 95 { 96 return !!(*vcpu_cpsr(vcpu) & PSR_MODE32_BIT); 97 } 98 99 static inline bool kvm_condition_valid(const struct kvm_vcpu *vcpu) 100 { 101 if (vcpu_mode_is_32bit(vcpu)) 102 return kvm_condition_valid32(vcpu); 103 104 return true; 105 } 106 107 static inline void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr) 108 { 109 if (vcpu_mode_is_32bit(vcpu)) 110 kvm_skip_instr32(vcpu, is_wide_instr); 111 else 112 *vcpu_pc(vcpu) += 4; 113 } 114 115 static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu) 116 { 117 *vcpu_cpsr(vcpu) |= COMPAT_PSR_T_BIT; 118 } 119 120 /* 121 * vcpu_get_reg and vcpu_set_reg should always be passed a register number 122 * coming from a read of ESR_EL2. Otherwise, it may give the wrong result on 123 * AArch32 with banked registers. 124 */ 125 static inline unsigned long vcpu_get_reg(const struct kvm_vcpu *vcpu, 126 u8 reg_num) 127 { 128 return (reg_num == 31) ? 0 : vcpu_gp_regs(vcpu)->regs.regs[reg_num]; 129 } 130 131 static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num, 132 unsigned long val) 133 { 134 if (reg_num != 31) 135 vcpu_gp_regs(vcpu)->regs.regs[reg_num] = val; 136 } 137 138 /* Get vcpu SPSR for current mode */ 139 static inline unsigned long *vcpu_spsr(const struct kvm_vcpu *vcpu) 140 { 141 if (vcpu_mode_is_32bit(vcpu)) 142 return vcpu_spsr32(vcpu); 143 144 return (unsigned long *)&vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1]; 145 } 146 147 static inline bool vcpu_mode_priv(const struct kvm_vcpu *vcpu) 148 { 149 u32 mode; 150 151 if (vcpu_mode_is_32bit(vcpu)) { 152 mode = *vcpu_cpsr(vcpu) & COMPAT_PSR_MODE_MASK; 153 return mode > COMPAT_PSR_MODE_USR; 154 } 155 156 mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK; 157 158 return mode != PSR_MODE_EL0t; 159 } 160 161 static inline u32 kvm_vcpu_get_hsr(const struct kvm_vcpu *vcpu) 162 { 163 return vcpu->arch.fault.esr_el2; 164 } 165 166 static inline int kvm_vcpu_get_condition(const struct kvm_vcpu *vcpu) 167 { 168 u32 esr = kvm_vcpu_get_hsr(vcpu); 169 170 if (esr & ESR_ELx_CV) 171 return (esr & ESR_ELx_COND_MASK) >> ESR_ELx_COND_SHIFT; 172 173 return -1; 174 } 175 176 static inline unsigned long kvm_vcpu_get_hfar(const struct kvm_vcpu *vcpu) 177 { 178 return vcpu->arch.fault.far_el2; 179 } 180 181 static inline phys_addr_t kvm_vcpu_get_fault_ipa(const struct kvm_vcpu *vcpu) 182 { 183 return ((phys_addr_t)vcpu->arch.fault.hpfar_el2 & HPFAR_MASK) << 8; 184 } 185 186 static inline u64 kvm_vcpu_get_disr(const struct kvm_vcpu *vcpu) 187 { 188 return vcpu->arch.fault.disr_el1; 189 } 190 191 static inline u32 kvm_vcpu_hvc_get_imm(const struct kvm_vcpu *vcpu) 192 { 193 return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_xVC_IMM_MASK; 194 } 195 196 static inline bool kvm_vcpu_dabt_isvalid(const struct kvm_vcpu *vcpu) 197 { 198 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_ISV); 199 } 200 201 static inline bool kvm_vcpu_dabt_issext(const struct kvm_vcpu *vcpu) 202 { 203 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SSE); 204 } 205 206 static inline int kvm_vcpu_dabt_get_rd(const struct kvm_vcpu *vcpu) 207 { 208 return (kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT; 209 } 210 211 static inline bool kvm_vcpu_dabt_iss1tw(const struct kvm_vcpu *vcpu) 212 { 213 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_S1PTW); 214 } 215 216 static inline bool kvm_vcpu_dabt_iswrite(const struct kvm_vcpu *vcpu) 217 { 218 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_WNR) || 219 kvm_vcpu_dabt_iss1tw(vcpu); /* AF/DBM update */ 220 } 221 222 static inline bool kvm_vcpu_dabt_is_cm(const struct kvm_vcpu *vcpu) 223 { 224 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_CM); 225 } 226 227 static inline int kvm_vcpu_dabt_get_as(const struct kvm_vcpu *vcpu) 228 { 229 return 1 << ((kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT); 230 } 231 232 /* This one is not specific to Data Abort */ 233 static inline bool kvm_vcpu_trap_il_is32bit(const struct kvm_vcpu *vcpu) 234 { 235 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_IL); 236 } 237 238 static inline u8 kvm_vcpu_trap_get_class(const struct kvm_vcpu *vcpu) 239 { 240 return ESR_ELx_EC(kvm_vcpu_get_hsr(vcpu)); 241 } 242 243 static inline bool kvm_vcpu_trap_is_iabt(const struct kvm_vcpu *vcpu) 244 { 245 return kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_IABT_LOW; 246 } 247 248 static inline u8 kvm_vcpu_trap_get_fault(const struct kvm_vcpu *vcpu) 249 { 250 return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_FSC; 251 } 252 253 static inline u8 kvm_vcpu_trap_get_fault_type(const struct kvm_vcpu *vcpu) 254 { 255 return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_FSC_TYPE; 256 } 257 258 static inline bool kvm_vcpu_dabt_isextabt(const struct kvm_vcpu *vcpu) 259 { 260 switch (kvm_vcpu_trap_get_fault(vcpu)) { 261 case FSC_SEA: 262 case FSC_SEA_TTW0: 263 case FSC_SEA_TTW1: 264 case FSC_SEA_TTW2: 265 case FSC_SEA_TTW3: 266 case FSC_SECC: 267 case FSC_SECC_TTW0: 268 case FSC_SECC_TTW1: 269 case FSC_SECC_TTW2: 270 case FSC_SECC_TTW3: 271 return true; 272 default: 273 return false; 274 } 275 } 276 277 static inline int kvm_vcpu_sys_get_rt(struct kvm_vcpu *vcpu) 278 { 279 u32 esr = kvm_vcpu_get_hsr(vcpu); 280 return (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; 281 } 282 283 static inline unsigned long kvm_vcpu_get_mpidr_aff(struct kvm_vcpu *vcpu) 284 { 285 return vcpu_sys_reg(vcpu, MPIDR_EL1) & MPIDR_HWID_BITMASK; 286 } 287 288 static inline void kvm_vcpu_set_be(struct kvm_vcpu *vcpu) 289 { 290 if (vcpu_mode_is_32bit(vcpu)) 291 *vcpu_cpsr(vcpu) |= COMPAT_PSR_E_BIT; 292 else 293 vcpu_sys_reg(vcpu, SCTLR_EL1) |= (1 << 25); 294 } 295 296 static inline bool kvm_vcpu_is_be(struct kvm_vcpu *vcpu) 297 { 298 if (vcpu_mode_is_32bit(vcpu)) 299 return !!(*vcpu_cpsr(vcpu) & COMPAT_PSR_E_BIT); 300 301 return !!(vcpu_sys_reg(vcpu, SCTLR_EL1) & (1 << 25)); 302 } 303 304 static inline unsigned long vcpu_data_guest_to_host(struct kvm_vcpu *vcpu, 305 unsigned long data, 306 unsigned int len) 307 { 308 if (kvm_vcpu_is_be(vcpu)) { 309 switch (len) { 310 case 1: 311 return data & 0xff; 312 case 2: 313 return be16_to_cpu(data & 0xffff); 314 case 4: 315 return be32_to_cpu(data & 0xffffffff); 316 default: 317 return be64_to_cpu(data); 318 } 319 } else { 320 switch (len) { 321 case 1: 322 return data & 0xff; 323 case 2: 324 return le16_to_cpu(data & 0xffff); 325 case 4: 326 return le32_to_cpu(data & 0xffffffff); 327 default: 328 return le64_to_cpu(data); 329 } 330 } 331 332 return data; /* Leave LE untouched */ 333 } 334 335 static inline unsigned long vcpu_data_host_to_guest(struct kvm_vcpu *vcpu, 336 unsigned long data, 337 unsigned int len) 338 { 339 if (kvm_vcpu_is_be(vcpu)) { 340 switch (len) { 341 case 1: 342 return data & 0xff; 343 case 2: 344 return cpu_to_be16(data & 0xffff); 345 case 4: 346 return cpu_to_be32(data & 0xffffffff); 347 default: 348 return cpu_to_be64(data); 349 } 350 } else { 351 switch (len) { 352 case 1: 353 return data & 0xff; 354 case 2: 355 return cpu_to_le16(data & 0xffff); 356 case 4: 357 return cpu_to_le32(data & 0xffffffff); 358 default: 359 return cpu_to_le64(data); 360 } 361 } 362 363 return data; /* Leave LE untouched */ 364 } 365 366 #endif /* __ARM64_KVM_EMULATE_H__ */ 367