1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 283a49794SMarc Zyngier /* 383a49794SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 483a49794SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 583a49794SMarc Zyngier * 683a49794SMarc Zyngier * Derived from arch/arm/include/kvm_emulate.h 783a49794SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 883a49794SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 983a49794SMarc Zyngier */ 1083a49794SMarc Zyngier 1183a49794SMarc Zyngier #ifndef __ARM64_KVM_EMULATE_H__ 1283a49794SMarc Zyngier #define __ARM64_KVM_EMULATE_H__ 1383a49794SMarc Zyngier 1483a49794SMarc Zyngier #include <linux/kvm_host.h> 15c6d01a94SMark Rutland 16bd7d95caSMark Rutland #include <asm/debug-monitors.h> 17c6d01a94SMark Rutland #include <asm/esr.h> 1883a49794SMarc Zyngier #include <asm/kvm_arm.h> 1900536ec4SChristoffer Dall #include <asm/kvm_hyp.h> 2083a49794SMarc Zyngier #include <asm/kvm_mmio.h> 2183a49794SMarc Zyngier #include <asm/ptrace.h> 224429fc64SAndre Przywara #include <asm/cputype.h> 2368908bf7SMarc Zyngier #include <asm/virt.h> 2483a49794SMarc Zyngier 25b547631fSMarc Zyngier unsigned long *vcpu_reg32(const struct kvm_vcpu *vcpu, u8 reg_num); 26a8928195SChristoffer Dall unsigned long vcpu_read_spsr32(const struct kvm_vcpu *vcpu); 27a8928195SChristoffer Dall void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v); 28b547631fSMarc Zyngier 2927b190bdSMarc Zyngier bool kvm_condition_valid32(const struct kvm_vcpu *vcpu); 3027b190bdSMarc Zyngier void kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr); 3127b190bdSMarc Zyngier 3283a49794SMarc Zyngier void kvm_inject_undefined(struct kvm_vcpu *vcpu); 3310cf3390SMarc Zyngier void kvm_inject_vabt(struct kvm_vcpu *vcpu); 3483a49794SMarc Zyngier void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr); 3583a49794SMarc Zyngier void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr); 3674a64a98SMarc Zyngier void kvm_inject_undef32(struct kvm_vcpu *vcpu); 3774a64a98SMarc Zyngier void kvm_inject_dabt32(struct kvm_vcpu *vcpu, unsigned long addr); 3874a64a98SMarc Zyngier void kvm_inject_pabt32(struct kvm_vcpu *vcpu, unsigned long addr); 3983a49794SMarc Zyngier 40e72341c5SChristoffer Dall static inline bool vcpu_el1_is_32bit(struct kvm_vcpu *vcpu) 41e72341c5SChristoffer Dall { 42e72341c5SChristoffer Dall return !(vcpu->arch.hcr_el2 & HCR_RW); 43e72341c5SChristoffer Dall } 44e72341c5SChristoffer Dall 45b856a591SChristoffer Dall static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu) 46b856a591SChristoffer Dall { 47b856a591SChristoffer Dall vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS; 4868908bf7SMarc Zyngier if (is_kernel_in_hyp_mode()) 4968908bf7SMarc Zyngier vcpu->arch.hcr_el2 |= HCR_E2H; 50558daf69SDongjiu Geng if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN)) { 51558daf69SDongjiu Geng /* route synchronous external abort exceptions to EL2 */ 52558daf69SDongjiu Geng vcpu->arch.hcr_el2 |= HCR_TEA; 53558daf69SDongjiu Geng /* trap error record accesses */ 54558daf69SDongjiu Geng vcpu->arch.hcr_el2 |= HCR_TERR; 55558daf69SDongjiu Geng } 565c401308SChristoffer Dall 575c401308SChristoffer Dall if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) { 58e48d53a9SMarc Zyngier vcpu->arch.hcr_el2 |= HCR_FWB; 595c401308SChristoffer Dall } else { 605c401308SChristoffer Dall /* 615c401308SChristoffer Dall * For non-FWB CPUs, we trap VM ops (HCR_EL2.TVM) until M+C 625c401308SChristoffer Dall * get set in SCTLR_EL1 such that we can detect when the guest 635c401308SChristoffer Dall * MMU gets turned on and do the necessary cache maintenance 645c401308SChristoffer Dall * then. 655c401308SChristoffer Dall */ 665c401308SChristoffer Dall vcpu->arch.hcr_el2 |= HCR_TVM; 675c401308SChristoffer Dall } 68558daf69SDongjiu Geng 69801f6772SMarc Zyngier if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) 70801f6772SMarc Zyngier vcpu->arch.hcr_el2 &= ~HCR_RW; 71005781beSDave Martin 72005781beSDave Martin /* 73005781beSDave Martin * TID3: trap feature register accesses that we virtualise. 74005781beSDave Martin * For now this is conditional, since no AArch32 feature regs 75005781beSDave Martin * are currently virtualised. 76005781beSDave Martin */ 77e72341c5SChristoffer Dall if (!vcpu_el1_is_32bit(vcpu)) 78005781beSDave Martin vcpu->arch.hcr_el2 |= HCR_TID3; 79f7f2b15cSArd Biesheuvel 80793acf87SArd Biesheuvel if (cpus_have_const_cap(ARM64_MISMATCHED_CACHE_TYPE) || 81793acf87SArd Biesheuvel vcpu_el1_is_32bit(vcpu)) 82f7f2b15cSArd Biesheuvel vcpu->arch.hcr_el2 |= HCR_TID2; 83b856a591SChristoffer Dall } 84b856a591SChristoffer Dall 853df59d8dSChristoffer Dall static inline unsigned long *vcpu_hcr(struct kvm_vcpu *vcpu) 863c1e7165SMarc Zyngier { 873df59d8dSChristoffer Dall return (unsigned long *)&vcpu->arch.hcr_el2; 883c1e7165SMarc Zyngier } 893c1e7165SMarc Zyngier 90de737089SMarc Zyngier static inline void vcpu_clear_wfe_traps(struct kvm_vcpu *vcpu) 91de737089SMarc Zyngier { 92de737089SMarc Zyngier vcpu->arch.hcr_el2 &= ~HCR_TWE; 93de737089SMarc Zyngier } 94de737089SMarc Zyngier 95de737089SMarc Zyngier static inline void vcpu_set_wfe_traps(struct kvm_vcpu *vcpu) 96de737089SMarc Zyngier { 97de737089SMarc Zyngier vcpu->arch.hcr_el2 |= HCR_TWE; 98de737089SMarc Zyngier } 99de737089SMarc Zyngier 100384b40caSMark Rutland static inline void vcpu_ptrauth_enable(struct kvm_vcpu *vcpu) 101384b40caSMark Rutland { 102384b40caSMark Rutland vcpu->arch.hcr_el2 |= (HCR_API | HCR_APK); 103384b40caSMark Rutland } 104384b40caSMark Rutland 105384b40caSMark Rutland static inline void vcpu_ptrauth_disable(struct kvm_vcpu *vcpu) 106384b40caSMark Rutland { 107384b40caSMark Rutland vcpu->arch.hcr_el2 &= ~(HCR_API | HCR_APK); 108384b40caSMark Rutland } 109384b40caSMark Rutland 110384b40caSMark Rutland static inline void vcpu_ptrauth_setup_lazy(struct kvm_vcpu *vcpu) 111384b40caSMark Rutland { 112384b40caSMark Rutland if (vcpu_has_ptrauth(vcpu)) 113384b40caSMark Rutland vcpu_ptrauth_disable(vcpu); 114384b40caSMark Rutland } 115384b40caSMark Rutland 116b7b27facSDongjiu Geng static inline unsigned long vcpu_get_vsesr(struct kvm_vcpu *vcpu) 117b7b27facSDongjiu Geng { 118b7b27facSDongjiu Geng return vcpu->arch.vsesr_el2; 119b7b27facSDongjiu Geng } 120b7b27facSDongjiu Geng 1214715c14bSJames Morse static inline void vcpu_set_vsesr(struct kvm_vcpu *vcpu, u64 vsesr) 1224715c14bSJames Morse { 1234715c14bSJames Morse vcpu->arch.vsesr_el2 = vsesr; 1244715c14bSJames Morse } 1254715c14bSJames Morse 12683a49794SMarc Zyngier static inline unsigned long *vcpu_pc(const struct kvm_vcpu *vcpu) 12783a49794SMarc Zyngier { 12883a49794SMarc Zyngier return (unsigned long *)&vcpu_gp_regs(vcpu)->regs.pc; 12983a49794SMarc Zyngier } 13083a49794SMarc Zyngier 1316d4bd909SChristoffer Dall static inline unsigned long *__vcpu_elr_el1(const struct kvm_vcpu *vcpu) 13283a49794SMarc Zyngier { 13383a49794SMarc Zyngier return (unsigned long *)&vcpu_gp_regs(vcpu)->elr_el1; 13483a49794SMarc Zyngier } 13583a49794SMarc Zyngier 1366d4bd909SChristoffer Dall static inline unsigned long vcpu_read_elr_el1(const struct kvm_vcpu *vcpu) 1376d4bd909SChristoffer Dall { 1386d4bd909SChristoffer Dall if (vcpu->arch.sysregs_loaded_on_cpu) 139fdec2a9eSDave Martin return read_sysreg_el1(SYS_ELR); 1406d4bd909SChristoffer Dall else 1416d4bd909SChristoffer Dall return *__vcpu_elr_el1(vcpu); 1426d4bd909SChristoffer Dall } 1436d4bd909SChristoffer Dall 1446d4bd909SChristoffer Dall static inline void vcpu_write_elr_el1(const struct kvm_vcpu *vcpu, unsigned long v) 1456d4bd909SChristoffer Dall { 1466d4bd909SChristoffer Dall if (vcpu->arch.sysregs_loaded_on_cpu) 147fdec2a9eSDave Martin write_sysreg_el1(v, SYS_ELR); 1486d4bd909SChristoffer Dall else 1496d4bd909SChristoffer Dall *__vcpu_elr_el1(vcpu) = v; 1506d4bd909SChristoffer Dall } 1516d4bd909SChristoffer Dall 15283a49794SMarc Zyngier static inline unsigned long *vcpu_cpsr(const struct kvm_vcpu *vcpu) 15383a49794SMarc Zyngier { 15483a49794SMarc Zyngier return (unsigned long *)&vcpu_gp_regs(vcpu)->regs.pstate; 15583a49794SMarc Zyngier } 15683a49794SMarc Zyngier 15783a49794SMarc Zyngier static inline bool vcpu_mode_is_32bit(const struct kvm_vcpu *vcpu) 15883a49794SMarc Zyngier { 159b547631fSMarc Zyngier return !!(*vcpu_cpsr(vcpu) & PSR_MODE32_BIT); 16083a49794SMarc Zyngier } 16183a49794SMarc Zyngier 16283a49794SMarc Zyngier static inline bool kvm_condition_valid(const struct kvm_vcpu *vcpu) 16383a49794SMarc Zyngier { 16427b190bdSMarc Zyngier if (vcpu_mode_is_32bit(vcpu)) 16527b190bdSMarc Zyngier return kvm_condition_valid32(vcpu); 16627b190bdSMarc Zyngier 16727b190bdSMarc Zyngier return true; 16883a49794SMarc Zyngier } 16983a49794SMarc Zyngier 17083a49794SMarc Zyngier static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu) 17183a49794SMarc Zyngier { 172256c0960SMark Rutland *vcpu_cpsr(vcpu) |= PSR_AA32_T_BIT; 17383a49794SMarc Zyngier } 17483a49794SMarc Zyngier 175c0f09634SMarc Zyngier /* 176f6be563aSPavel Fedin * vcpu_get_reg and vcpu_set_reg should always be passed a register number 177f6be563aSPavel Fedin * coming from a read of ESR_EL2. Otherwise, it may give the wrong result on 178f6be563aSPavel Fedin * AArch32 with banked registers. 179c0f09634SMarc Zyngier */ 180bc45a516SPavel Fedin static inline unsigned long vcpu_get_reg(const struct kvm_vcpu *vcpu, 181bc45a516SPavel Fedin u8 reg_num) 182bc45a516SPavel Fedin { 183bc45a516SPavel Fedin return (reg_num == 31) ? 0 : vcpu_gp_regs(vcpu)->regs.regs[reg_num]; 184bc45a516SPavel Fedin } 185bc45a516SPavel Fedin 186bc45a516SPavel Fedin static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num, 187bc45a516SPavel Fedin unsigned long val) 188bc45a516SPavel Fedin { 189bc45a516SPavel Fedin if (reg_num != 31) 190bc45a516SPavel Fedin vcpu_gp_regs(vcpu)->regs.regs[reg_num] = val; 191bc45a516SPavel Fedin } 192bc45a516SPavel Fedin 19300536ec4SChristoffer Dall static inline unsigned long vcpu_read_spsr(const struct kvm_vcpu *vcpu) 19483a49794SMarc Zyngier { 195a8928195SChristoffer Dall if (vcpu_mode_is_32bit(vcpu)) 196a8928195SChristoffer Dall return vcpu_read_spsr32(vcpu); 19700536ec4SChristoffer Dall 19800536ec4SChristoffer Dall if (vcpu->arch.sysregs_loaded_on_cpu) 199fdec2a9eSDave Martin return read_sysreg_el1(SYS_SPSR); 20000536ec4SChristoffer Dall else 201a8928195SChristoffer Dall return vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1]; 20200536ec4SChristoffer Dall } 20300536ec4SChristoffer Dall 204a8928195SChristoffer Dall static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v) 20500536ec4SChristoffer Dall { 20600536ec4SChristoffer Dall if (vcpu_mode_is_32bit(vcpu)) { 207a8928195SChristoffer Dall vcpu_write_spsr32(vcpu, v); 20800536ec4SChristoffer Dall return; 20900536ec4SChristoffer Dall } 21000536ec4SChristoffer Dall 21100536ec4SChristoffer Dall if (vcpu->arch.sysregs_loaded_on_cpu) 212fdec2a9eSDave Martin write_sysreg_el1(v, SYS_SPSR); 21300536ec4SChristoffer Dall else 214a8928195SChristoffer Dall vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1] = v; 21583a49794SMarc Zyngier } 21683a49794SMarc Zyngier 21783a49794SMarc Zyngier static inline bool vcpu_mode_priv(const struct kvm_vcpu *vcpu) 21883a49794SMarc Zyngier { 2199586a2eaSShannon Zhao u32 mode; 22083a49794SMarc Zyngier 2219586a2eaSShannon Zhao if (vcpu_mode_is_32bit(vcpu)) { 222256c0960SMark Rutland mode = *vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK; 223256c0960SMark Rutland return mode > PSR_AA32_MODE_USR; 2249586a2eaSShannon Zhao } 2259586a2eaSShannon Zhao 2269586a2eaSShannon Zhao mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK; 227b547631fSMarc Zyngier 22883a49794SMarc Zyngier return mode != PSR_MODE_EL0t; 22983a49794SMarc Zyngier } 23083a49794SMarc Zyngier 23183a49794SMarc Zyngier static inline u32 kvm_vcpu_get_hsr(const struct kvm_vcpu *vcpu) 23283a49794SMarc Zyngier { 23383a49794SMarc Zyngier return vcpu->arch.fault.esr_el2; 23483a49794SMarc Zyngier } 23583a49794SMarc Zyngier 2363e51d435SMarc Zyngier static inline int kvm_vcpu_get_condition(const struct kvm_vcpu *vcpu) 2373e51d435SMarc Zyngier { 2383e51d435SMarc Zyngier u32 esr = kvm_vcpu_get_hsr(vcpu); 2393e51d435SMarc Zyngier 2403e51d435SMarc Zyngier if (esr & ESR_ELx_CV) 2413e51d435SMarc Zyngier return (esr & ESR_ELx_COND_MASK) >> ESR_ELx_COND_SHIFT; 2423e51d435SMarc Zyngier 2433e51d435SMarc Zyngier return -1; 2443e51d435SMarc Zyngier } 2453e51d435SMarc Zyngier 24683a49794SMarc Zyngier static inline unsigned long kvm_vcpu_get_hfar(const struct kvm_vcpu *vcpu) 24783a49794SMarc Zyngier { 24883a49794SMarc Zyngier return vcpu->arch.fault.far_el2; 24983a49794SMarc Zyngier } 25083a49794SMarc Zyngier 25183a49794SMarc Zyngier static inline phys_addr_t kvm_vcpu_get_fault_ipa(const struct kvm_vcpu *vcpu) 25283a49794SMarc Zyngier { 25383a49794SMarc Zyngier return ((phys_addr_t)vcpu->arch.fault.hpfar_el2 & HPFAR_MASK) << 8; 25483a49794SMarc Zyngier } 25583a49794SMarc Zyngier 2560067df41SJames Morse static inline u64 kvm_vcpu_get_disr(const struct kvm_vcpu *vcpu) 2570067df41SJames Morse { 2580067df41SJames Morse return vcpu->arch.fault.disr_el1; 2590067df41SJames Morse } 2600067df41SJames Morse 2610d97f884SWei Huang static inline u32 kvm_vcpu_hvc_get_imm(const struct kvm_vcpu *vcpu) 2620d97f884SWei Huang { 2631c6007d5SPaolo Bonzini return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_xVC_IMM_MASK; 2640d97f884SWei Huang } 2650d97f884SWei Huang 26683a49794SMarc Zyngier static inline bool kvm_vcpu_dabt_isvalid(const struct kvm_vcpu *vcpu) 26783a49794SMarc Zyngier { 268c6d01a94SMark Rutland return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_ISV); 26983a49794SMarc Zyngier } 27083a49794SMarc Zyngier 27183a49794SMarc Zyngier static inline bool kvm_vcpu_dabt_issext(const struct kvm_vcpu *vcpu) 27283a49794SMarc Zyngier { 273c6d01a94SMark Rutland return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SSE); 27483a49794SMarc Zyngier } 27583a49794SMarc Zyngier 27683a49794SMarc Zyngier static inline int kvm_vcpu_dabt_get_rd(const struct kvm_vcpu *vcpu) 27783a49794SMarc Zyngier { 278c6d01a94SMark Rutland return (kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT; 27983a49794SMarc Zyngier } 28083a49794SMarc Zyngier 28183a49794SMarc Zyngier static inline bool kvm_vcpu_dabt_iss1tw(const struct kvm_vcpu *vcpu) 28283a49794SMarc Zyngier { 283c6d01a94SMark Rutland return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_S1PTW); 28483a49794SMarc Zyngier } 28583a49794SMarc Zyngier 28660e21a0eSWill Deacon static inline bool kvm_vcpu_dabt_iswrite(const struct kvm_vcpu *vcpu) 28760e21a0eSWill Deacon { 28860e21a0eSWill Deacon return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_WNR) || 28960e21a0eSWill Deacon kvm_vcpu_dabt_iss1tw(vcpu); /* AF/DBM update */ 29060e21a0eSWill Deacon } 29160e21a0eSWill Deacon 29257c841f1SMarc Zyngier static inline bool kvm_vcpu_dabt_is_cm(const struct kvm_vcpu *vcpu) 29357c841f1SMarc Zyngier { 29457c841f1SMarc Zyngier return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_CM); 29557c841f1SMarc Zyngier } 29657c841f1SMarc Zyngier 29783a49794SMarc Zyngier static inline int kvm_vcpu_dabt_get_as(const struct kvm_vcpu *vcpu) 29883a49794SMarc Zyngier { 299c6d01a94SMark Rutland return 1 << ((kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT); 30083a49794SMarc Zyngier } 30183a49794SMarc Zyngier 30283a49794SMarc Zyngier /* This one is not specific to Data Abort */ 30383a49794SMarc Zyngier static inline bool kvm_vcpu_trap_il_is32bit(const struct kvm_vcpu *vcpu) 30483a49794SMarc Zyngier { 305c6d01a94SMark Rutland return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_IL); 30683a49794SMarc Zyngier } 30783a49794SMarc Zyngier 30883a49794SMarc Zyngier static inline u8 kvm_vcpu_trap_get_class(const struct kvm_vcpu *vcpu) 30983a49794SMarc Zyngier { 310561454e2SMark Rutland return ESR_ELx_EC(kvm_vcpu_get_hsr(vcpu)); 31183a49794SMarc Zyngier } 31283a49794SMarc Zyngier 31383a49794SMarc Zyngier static inline bool kvm_vcpu_trap_is_iabt(const struct kvm_vcpu *vcpu) 31483a49794SMarc Zyngier { 315c6d01a94SMark Rutland return kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_IABT_LOW; 31683a49794SMarc Zyngier } 31783a49794SMarc Zyngier 31883a49794SMarc Zyngier static inline u8 kvm_vcpu_trap_get_fault(const struct kvm_vcpu *vcpu) 31983a49794SMarc Zyngier { 320c6d01a94SMark Rutland return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_FSC; 3210496daa5SChristoffer Dall } 3220496daa5SChristoffer Dall 3230496daa5SChristoffer Dall static inline u8 kvm_vcpu_trap_get_fault_type(const struct kvm_vcpu *vcpu) 3240496daa5SChristoffer Dall { 325c6d01a94SMark Rutland return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_FSC_TYPE; 32683a49794SMarc Zyngier } 32783a49794SMarc Zyngier 328bb428921SJames Morse static inline bool kvm_vcpu_dabt_isextabt(const struct kvm_vcpu *vcpu) 329bb428921SJames Morse { 330a2b83133SDongjiu Geng switch (kvm_vcpu_trap_get_fault(vcpu)) { 331bb428921SJames Morse case FSC_SEA: 332bb428921SJames Morse case FSC_SEA_TTW0: 333bb428921SJames Morse case FSC_SEA_TTW1: 334bb428921SJames Morse case FSC_SEA_TTW2: 335bb428921SJames Morse case FSC_SEA_TTW3: 336bb428921SJames Morse case FSC_SECC: 337bb428921SJames Morse case FSC_SECC_TTW0: 338bb428921SJames Morse case FSC_SECC_TTW1: 339bb428921SJames Morse case FSC_SECC_TTW2: 340bb428921SJames Morse case FSC_SECC_TTW3: 341bb428921SJames Morse return true; 342bb428921SJames Morse default: 343bb428921SJames Morse return false; 344bb428921SJames Morse } 345bb428921SJames Morse } 346bb428921SJames Morse 347c667186fSMarc Zyngier static inline int kvm_vcpu_sys_get_rt(struct kvm_vcpu *vcpu) 348c667186fSMarc Zyngier { 349c667186fSMarc Zyngier u32 esr = kvm_vcpu_get_hsr(vcpu); 3501c839141SAnshuman Khandual return ESR_ELx_SYS64_ISS_RT(esr); 351c667186fSMarc Zyngier } 352c667186fSMarc Zyngier 35364cf98faSChristoffer Dall static inline bool kvm_is_write_fault(struct kvm_vcpu *vcpu) 35464cf98faSChristoffer Dall { 35564cf98faSChristoffer Dall if (kvm_vcpu_trap_is_iabt(vcpu)) 35664cf98faSChristoffer Dall return false; 35764cf98faSChristoffer Dall 35864cf98faSChristoffer Dall return kvm_vcpu_dabt_iswrite(vcpu); 35964cf98faSChristoffer Dall } 36064cf98faSChristoffer Dall 3614429fc64SAndre Przywara static inline unsigned long kvm_vcpu_get_mpidr_aff(struct kvm_vcpu *vcpu) 36279c64880SMarc Zyngier { 3638d404c4cSChristoffer Dall return vcpu_read_sys_reg(vcpu, MPIDR_EL1) & MPIDR_HWID_BITMASK; 36479c64880SMarc Zyngier } 36579c64880SMarc Zyngier 36699adb567SAndre Przywara static inline bool kvm_arm_get_vcpu_workaround_2_flag(struct kvm_vcpu *vcpu) 36799adb567SAndre Przywara { 36899adb567SAndre Przywara return vcpu->arch.workaround_flags & VCPU_WORKAROUND_2_FLAG; 36999adb567SAndre Przywara } 37099adb567SAndre Przywara 37199adb567SAndre Przywara static inline void kvm_arm_set_vcpu_workaround_2_flag(struct kvm_vcpu *vcpu, 37299adb567SAndre Przywara bool flag) 37399adb567SAndre Przywara { 37499adb567SAndre Przywara if (flag) 37599adb567SAndre Przywara vcpu->arch.workaround_flags |= VCPU_WORKAROUND_2_FLAG; 37699adb567SAndre Przywara else 37799adb567SAndre Przywara vcpu->arch.workaround_flags &= ~VCPU_WORKAROUND_2_FLAG; 37899adb567SAndre Przywara } 37999adb567SAndre Przywara 380ce94fe93SMarc Zyngier static inline void kvm_vcpu_set_be(struct kvm_vcpu *vcpu) 381ce94fe93SMarc Zyngier { 3828d404c4cSChristoffer Dall if (vcpu_mode_is_32bit(vcpu)) { 383256c0960SMark Rutland *vcpu_cpsr(vcpu) |= PSR_AA32_E_BIT; 3848d404c4cSChristoffer Dall } else { 3858d404c4cSChristoffer Dall u64 sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1); 3868d404c4cSChristoffer Dall sctlr |= (1 << 25); 3871975fa56SJames Morse vcpu_write_sys_reg(vcpu, sctlr, SCTLR_EL1); 3888d404c4cSChristoffer Dall } 389ce94fe93SMarc Zyngier } 390ce94fe93SMarc Zyngier 3916d89d2d9SMarc Zyngier static inline bool kvm_vcpu_is_be(struct kvm_vcpu *vcpu) 3926d89d2d9SMarc Zyngier { 3936d89d2d9SMarc Zyngier if (vcpu_mode_is_32bit(vcpu)) 394256c0960SMark Rutland return !!(*vcpu_cpsr(vcpu) & PSR_AA32_E_BIT); 3956d89d2d9SMarc Zyngier 3968d404c4cSChristoffer Dall return !!(vcpu_read_sys_reg(vcpu, SCTLR_EL1) & (1 << 25)); 3976d89d2d9SMarc Zyngier } 3986d89d2d9SMarc Zyngier 3996d89d2d9SMarc Zyngier static inline unsigned long vcpu_data_guest_to_host(struct kvm_vcpu *vcpu, 4006d89d2d9SMarc Zyngier unsigned long data, 4016d89d2d9SMarc Zyngier unsigned int len) 4026d89d2d9SMarc Zyngier { 4036d89d2d9SMarc Zyngier if (kvm_vcpu_is_be(vcpu)) { 4046d89d2d9SMarc Zyngier switch (len) { 4056d89d2d9SMarc Zyngier case 1: 4066d89d2d9SMarc Zyngier return data & 0xff; 4076d89d2d9SMarc Zyngier case 2: 4086d89d2d9SMarc Zyngier return be16_to_cpu(data & 0xffff); 4096d89d2d9SMarc Zyngier case 4: 4106d89d2d9SMarc Zyngier return be32_to_cpu(data & 0xffffffff); 4116d89d2d9SMarc Zyngier default: 4126d89d2d9SMarc Zyngier return be64_to_cpu(data); 4136d89d2d9SMarc Zyngier } 414b3007086SVictor Kamensky } else { 415b3007086SVictor Kamensky switch (len) { 416b3007086SVictor Kamensky case 1: 417b3007086SVictor Kamensky return data & 0xff; 418b3007086SVictor Kamensky case 2: 419b3007086SVictor Kamensky return le16_to_cpu(data & 0xffff); 420b3007086SVictor Kamensky case 4: 421b3007086SVictor Kamensky return le32_to_cpu(data & 0xffffffff); 422b3007086SVictor Kamensky default: 423b3007086SVictor Kamensky return le64_to_cpu(data); 424b3007086SVictor Kamensky } 4256d89d2d9SMarc Zyngier } 4266d89d2d9SMarc Zyngier 4276d89d2d9SMarc Zyngier return data; /* Leave LE untouched */ 4286d89d2d9SMarc Zyngier } 4296d89d2d9SMarc Zyngier 4306d89d2d9SMarc Zyngier static inline unsigned long vcpu_data_host_to_guest(struct kvm_vcpu *vcpu, 4316d89d2d9SMarc Zyngier unsigned long data, 4326d89d2d9SMarc Zyngier unsigned int len) 4336d89d2d9SMarc Zyngier { 4346d89d2d9SMarc Zyngier if (kvm_vcpu_is_be(vcpu)) { 4356d89d2d9SMarc Zyngier switch (len) { 4366d89d2d9SMarc Zyngier case 1: 4376d89d2d9SMarc Zyngier return data & 0xff; 4386d89d2d9SMarc Zyngier case 2: 4396d89d2d9SMarc Zyngier return cpu_to_be16(data & 0xffff); 4406d89d2d9SMarc Zyngier case 4: 4416d89d2d9SMarc Zyngier return cpu_to_be32(data & 0xffffffff); 4426d89d2d9SMarc Zyngier default: 4436d89d2d9SMarc Zyngier return cpu_to_be64(data); 4446d89d2d9SMarc Zyngier } 445b3007086SVictor Kamensky } else { 446b3007086SVictor Kamensky switch (len) { 447b3007086SVictor Kamensky case 1: 448b3007086SVictor Kamensky return data & 0xff; 449b3007086SVictor Kamensky case 2: 450b3007086SVictor Kamensky return cpu_to_le16(data & 0xffff); 451b3007086SVictor Kamensky case 4: 452b3007086SVictor Kamensky return cpu_to_le32(data & 0xffffffff); 453b3007086SVictor Kamensky default: 454b3007086SVictor Kamensky return cpu_to_le64(data); 455b3007086SVictor Kamensky } 4566d89d2d9SMarc Zyngier } 4576d89d2d9SMarc Zyngier 4586d89d2d9SMarc Zyngier return data; /* Leave LE untouched */ 4596d89d2d9SMarc Zyngier } 4606d89d2d9SMarc Zyngier 461bd7d95caSMark Rutland static inline void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr) 462bd7d95caSMark Rutland { 463bd7d95caSMark Rutland if (vcpu_mode_is_32bit(vcpu)) 464bd7d95caSMark Rutland kvm_skip_instr32(vcpu, is_wide_instr); 465bd7d95caSMark Rutland else 466bd7d95caSMark Rutland *vcpu_pc(vcpu) += 4; 467bd7d95caSMark Rutland 468bd7d95caSMark Rutland /* advance the singlestep state machine */ 469bd7d95caSMark Rutland *vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS; 470bd7d95caSMark Rutland } 471bd7d95caSMark Rutland 472bd7d95caSMark Rutland /* 473bd7d95caSMark Rutland * Skip an instruction which has been emulated at hyp while most guest sysregs 474bd7d95caSMark Rutland * are live. 475bd7d95caSMark Rutland */ 476bd7d95caSMark Rutland static inline void __hyp_text __kvm_skip_instr(struct kvm_vcpu *vcpu) 477bd7d95caSMark Rutland { 478fdec2a9eSDave Martin *vcpu_pc(vcpu) = read_sysreg_el2(SYS_ELR); 479fdec2a9eSDave Martin vcpu->arch.ctxt.gp_regs.regs.pstate = read_sysreg_el2(SYS_SPSR); 480bd7d95caSMark Rutland 481bd7d95caSMark Rutland kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); 482bd7d95caSMark Rutland 483fdec2a9eSDave Martin write_sysreg_el2(vcpu->arch.ctxt.gp_regs.regs.pstate, SYS_SPSR); 484fdec2a9eSDave Martin write_sysreg_el2(*vcpu_pc(vcpu), SYS_ELR); 485bd7d95caSMark Rutland } 486bd7d95caSMark Rutland 48783a49794SMarc Zyngier #endif /* __ARM64_KVM_EMULATE_H__ */ 488