1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 283a49794SMarc Zyngier /* 383a49794SMarc Zyngier * Copyright (C) 2012,2013 - ARM Ltd 483a49794SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 583a49794SMarc Zyngier * 683a49794SMarc Zyngier * Derived from arch/arm/include/kvm_emulate.h 783a49794SMarc Zyngier * Copyright (C) 2012 - Virtual Open Systems and Columbia University 883a49794SMarc Zyngier * Author: Christoffer Dall <c.dall@virtualopensystems.com> 983a49794SMarc Zyngier */ 1083a49794SMarc Zyngier 1183a49794SMarc Zyngier #ifndef __ARM64_KVM_EMULATE_H__ 1283a49794SMarc Zyngier #define __ARM64_KVM_EMULATE_H__ 1383a49794SMarc Zyngier 1483a49794SMarc Zyngier #include <linux/kvm_host.h> 15c6d01a94SMark Rutland 16bd7d95caSMark Rutland #include <asm/debug-monitors.h> 17c6d01a94SMark Rutland #include <asm/esr.h> 1883a49794SMarc Zyngier #include <asm/kvm_arm.h> 1900536ec4SChristoffer Dall #include <asm/kvm_hyp.h> 2083a49794SMarc Zyngier #include <asm/ptrace.h> 214429fc64SAndre Przywara #include <asm/cputype.h> 2268908bf7SMarc Zyngier #include <asm/virt.h> 2383a49794SMarc Zyngier 24bb666c47SMarc Zyngier #define CURRENT_EL_SP_EL0_VECTOR 0x0 25bb666c47SMarc Zyngier #define CURRENT_EL_SP_ELx_VECTOR 0x200 26bb666c47SMarc Zyngier #define LOWER_EL_AArch64_VECTOR 0x400 27bb666c47SMarc Zyngier #define LOWER_EL_AArch32_VECTOR 0x600 28bb666c47SMarc Zyngier 29bb666c47SMarc Zyngier enum exception_type { 30bb666c47SMarc Zyngier except_type_sync = 0, 31bb666c47SMarc Zyngier except_type_irq = 0x80, 32bb666c47SMarc Zyngier except_type_fiq = 0x100, 33bb666c47SMarc Zyngier except_type_serror = 0x180, 34bb666c47SMarc Zyngier }; 35b547631fSMarc Zyngier 3627b190bdSMarc Zyngier bool kvm_condition_valid32(const struct kvm_vcpu *vcpu); 376ddbc281SMarc Zyngier void kvm_skip_instr32(struct kvm_vcpu *vcpu); 3827b190bdSMarc Zyngier 3983a49794SMarc Zyngier void kvm_inject_undefined(struct kvm_vcpu *vcpu); 4010cf3390SMarc Zyngier void kvm_inject_vabt(struct kvm_vcpu *vcpu); 4183a49794SMarc Zyngier void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr); 4283a49794SMarc Zyngier void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr); 4383a49794SMarc Zyngier 446109c5a6SSean Christopherson void kvm_vcpu_wfi(struct kvm_vcpu *vcpu); 456109c5a6SSean Christopherson 4626bf74bdSReiji Watanabe #if defined(__KVM_VHE_HYPERVISOR__) || defined(__KVM_NVHE_HYPERVISOR__) 475c37f1aeSJames Morse static __always_inline bool vcpu_el1_is_32bit(struct kvm_vcpu *vcpu) 48e72341c5SChristoffer Dall { 49e72341c5SChristoffer Dall return !(vcpu->arch.hcr_el2 & HCR_RW); 50e72341c5SChristoffer Dall } 5126bf74bdSReiji Watanabe #else 5226bf74bdSReiji Watanabe static __always_inline bool vcpu_el1_is_32bit(struct kvm_vcpu *vcpu) 5326bf74bdSReiji Watanabe { 5426bf74bdSReiji Watanabe struct kvm *kvm = vcpu->kvm; 5526bf74bdSReiji Watanabe 5626bf74bdSReiji Watanabe WARN_ON_ONCE(!test_bit(KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED, 5726bf74bdSReiji Watanabe &kvm->arch.flags)); 5826bf74bdSReiji Watanabe 5926bf74bdSReiji Watanabe return test_bit(KVM_ARCH_FLAG_EL1_32BIT, &kvm->arch.flags); 6026bf74bdSReiji Watanabe } 6126bf74bdSReiji Watanabe #endif 62e72341c5SChristoffer Dall 63b856a591SChristoffer Dall static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu) 64b856a591SChristoffer Dall { 65b856a591SChristoffer Dall vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS; 6668908bf7SMarc Zyngier if (is_kernel_in_hyp_mode()) 6768908bf7SMarc Zyngier vcpu->arch.hcr_el2 |= HCR_E2H; 68558daf69SDongjiu Geng if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN)) { 69558daf69SDongjiu Geng /* route synchronous external abort exceptions to EL2 */ 70558daf69SDongjiu Geng vcpu->arch.hcr_el2 |= HCR_TEA; 71558daf69SDongjiu Geng /* trap error record accesses */ 72558daf69SDongjiu Geng vcpu->arch.hcr_el2 |= HCR_TERR; 73558daf69SDongjiu Geng } 745c401308SChristoffer Dall 755c401308SChristoffer Dall if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) { 76e48d53a9SMarc Zyngier vcpu->arch.hcr_el2 |= HCR_FWB; 775c401308SChristoffer Dall } else { 785c401308SChristoffer Dall /* 795c401308SChristoffer Dall * For non-FWB CPUs, we trap VM ops (HCR_EL2.TVM) until M+C 805c401308SChristoffer Dall * get set in SCTLR_EL1 such that we can detect when the guest 815c401308SChristoffer Dall * MMU gets turned on and do the necessary cache maintenance 825c401308SChristoffer Dall * then. 835c401308SChristoffer Dall */ 845c401308SChristoffer Dall vcpu->arch.hcr_el2 |= HCR_TVM; 855c401308SChristoffer Dall } 86558daf69SDongjiu Geng 8726bf74bdSReiji Watanabe if (vcpu_el1_is_32bit(vcpu)) 88801f6772SMarc Zyngier vcpu->arch.hcr_el2 &= ~HCR_RW; 8926bf74bdSReiji Watanabe else 90005781beSDave Martin /* 91005781beSDave Martin * TID3: trap feature register accesses that we virtualise. 92005781beSDave Martin * For now this is conditional, since no AArch32 feature regs 93005781beSDave Martin * are currently virtualised. 94005781beSDave Martin */ 95005781beSDave Martin vcpu->arch.hcr_el2 |= HCR_TID3; 96f7f2b15cSArd Biesheuvel 97793acf87SArd Biesheuvel if (cpus_have_const_cap(ARM64_MISMATCHED_CACHE_TYPE) || 98793acf87SArd Biesheuvel vcpu_el1_is_32bit(vcpu)) 99f7f2b15cSArd Biesheuvel vcpu->arch.hcr_el2 |= HCR_TID2; 100ea7fc1bbSSteven Price 101ea7fc1bbSSteven Price if (kvm_has_mte(vcpu->kvm)) 102ea7fc1bbSSteven Price vcpu->arch.hcr_el2 |= HCR_ATA; 103b856a591SChristoffer Dall } 104b856a591SChristoffer Dall 1053df59d8dSChristoffer Dall static inline unsigned long *vcpu_hcr(struct kvm_vcpu *vcpu) 1063c1e7165SMarc Zyngier { 1073df59d8dSChristoffer Dall return (unsigned long *)&vcpu->arch.hcr_el2; 1083c1e7165SMarc Zyngier } 1093c1e7165SMarc Zyngier 110ef2e78ddSMarc Zyngier static inline void vcpu_clear_wfx_traps(struct kvm_vcpu *vcpu) 111de737089SMarc Zyngier { 112de737089SMarc Zyngier vcpu->arch.hcr_el2 &= ~HCR_TWE; 1137bdabad1SMarc Zyngier if (atomic_read(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vlpi_count) || 1147bdabad1SMarc Zyngier vcpu->kvm->arch.vgic.nassgireq) 115ef2e78ddSMarc Zyngier vcpu->arch.hcr_el2 &= ~HCR_TWI; 116ef2e78ddSMarc Zyngier else 117ef2e78ddSMarc Zyngier vcpu->arch.hcr_el2 |= HCR_TWI; 118de737089SMarc Zyngier } 119de737089SMarc Zyngier 120ef2e78ddSMarc Zyngier static inline void vcpu_set_wfx_traps(struct kvm_vcpu *vcpu) 121de737089SMarc Zyngier { 122de737089SMarc Zyngier vcpu->arch.hcr_el2 |= HCR_TWE; 123ef2e78ddSMarc Zyngier vcpu->arch.hcr_el2 |= HCR_TWI; 124de737089SMarc Zyngier } 125de737089SMarc Zyngier 126384b40caSMark Rutland static inline void vcpu_ptrauth_enable(struct kvm_vcpu *vcpu) 127384b40caSMark Rutland { 128384b40caSMark Rutland vcpu->arch.hcr_el2 |= (HCR_API | HCR_APK); 129384b40caSMark Rutland } 130384b40caSMark Rutland 131384b40caSMark Rutland static inline void vcpu_ptrauth_disable(struct kvm_vcpu *vcpu) 132384b40caSMark Rutland { 133384b40caSMark Rutland vcpu->arch.hcr_el2 &= ~(HCR_API | HCR_APK); 134384b40caSMark Rutland } 135384b40caSMark Rutland 136b7b27facSDongjiu Geng static inline unsigned long vcpu_get_vsesr(struct kvm_vcpu *vcpu) 137b7b27facSDongjiu Geng { 138b7b27facSDongjiu Geng return vcpu->arch.vsesr_el2; 139b7b27facSDongjiu Geng } 140b7b27facSDongjiu Geng 1414715c14bSJames Morse static inline void vcpu_set_vsesr(struct kvm_vcpu *vcpu, u64 vsesr) 1424715c14bSJames Morse { 1434715c14bSJames Morse vcpu->arch.vsesr_el2 = vsesr; 1444715c14bSJames Morse } 1454715c14bSJames Morse 1465c37f1aeSJames Morse static __always_inline unsigned long *vcpu_pc(const struct kvm_vcpu *vcpu) 14783a49794SMarc Zyngier { 148e47c2055SMarc Zyngier return (unsigned long *)&vcpu_gp_regs(vcpu)->pc; 14983a49794SMarc Zyngier } 15083a49794SMarc Zyngier 1515c37f1aeSJames Morse static __always_inline unsigned long *vcpu_cpsr(const struct kvm_vcpu *vcpu) 15283a49794SMarc Zyngier { 153e47c2055SMarc Zyngier return (unsigned long *)&vcpu_gp_regs(vcpu)->pstate; 15483a49794SMarc Zyngier } 15583a49794SMarc Zyngier 1565c37f1aeSJames Morse static __always_inline bool vcpu_mode_is_32bit(const struct kvm_vcpu *vcpu) 15783a49794SMarc Zyngier { 158b547631fSMarc Zyngier return !!(*vcpu_cpsr(vcpu) & PSR_MODE32_BIT); 15983a49794SMarc Zyngier } 16083a49794SMarc Zyngier 1615c37f1aeSJames Morse static __always_inline bool kvm_condition_valid(const struct kvm_vcpu *vcpu) 16283a49794SMarc Zyngier { 16327b190bdSMarc Zyngier if (vcpu_mode_is_32bit(vcpu)) 16427b190bdSMarc Zyngier return kvm_condition_valid32(vcpu); 16527b190bdSMarc Zyngier 16627b190bdSMarc Zyngier return true; 16783a49794SMarc Zyngier } 16883a49794SMarc Zyngier 16983a49794SMarc Zyngier static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu) 17083a49794SMarc Zyngier { 171256c0960SMark Rutland *vcpu_cpsr(vcpu) |= PSR_AA32_T_BIT; 17283a49794SMarc Zyngier } 17383a49794SMarc Zyngier 174c0f09634SMarc Zyngier /* 175f6be563aSPavel Fedin * vcpu_get_reg and vcpu_set_reg should always be passed a register number 176f6be563aSPavel Fedin * coming from a read of ESR_EL2. Otherwise, it may give the wrong result on 177f6be563aSPavel Fedin * AArch32 with banked registers. 178c0f09634SMarc Zyngier */ 1795c37f1aeSJames Morse static __always_inline unsigned long vcpu_get_reg(const struct kvm_vcpu *vcpu, 180bc45a516SPavel Fedin u8 reg_num) 181bc45a516SPavel Fedin { 182e47c2055SMarc Zyngier return (reg_num == 31) ? 0 : vcpu_gp_regs(vcpu)->regs[reg_num]; 183bc45a516SPavel Fedin } 184bc45a516SPavel Fedin 1855c37f1aeSJames Morse static __always_inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num, 186bc45a516SPavel Fedin unsigned long val) 187bc45a516SPavel Fedin { 188bc45a516SPavel Fedin if (reg_num != 31) 189e47c2055SMarc Zyngier vcpu_gp_regs(vcpu)->regs[reg_num] = val; 190bc45a516SPavel Fedin } 191bc45a516SPavel Fedin 1921cfbb484SMark Rutland /* 1931cfbb484SMark Rutland * The layout of SPSR for an AArch32 state is different when observed from an 1941cfbb484SMark Rutland * AArch64 SPSR_ELx or an AArch32 SPSR_*. This function generates the AArch32 1951cfbb484SMark Rutland * view given an AArch64 view. 1961cfbb484SMark Rutland * 1971cfbb484SMark Rutland * In ARM DDI 0487E.a see: 1981cfbb484SMark Rutland * 1991cfbb484SMark Rutland * - The AArch64 view (SPSR_EL2) in section C5.2.18, page C5-426 2001cfbb484SMark Rutland * - The AArch32 view (SPSR_abt) in section G8.2.126, page G8-6256 2011cfbb484SMark Rutland * - The AArch32 view (SPSR_und) in section G8.2.132, page G8-6280 2021cfbb484SMark Rutland * 2031cfbb484SMark Rutland * Which show the following differences: 2041cfbb484SMark Rutland * 2051cfbb484SMark Rutland * | Bit | AA64 | AA32 | Notes | 2061cfbb484SMark Rutland * +-----+------+------+-----------------------------| 2071cfbb484SMark Rutland * | 24 | DIT | J | J is RES0 in ARMv8 | 2081cfbb484SMark Rutland * | 21 | SS | DIT | SS doesn't exist in AArch32 | 2091cfbb484SMark Rutland * 2101cfbb484SMark Rutland * ... and all other bits are (currently) common. 2111cfbb484SMark Rutland */ 2121cfbb484SMark Rutland static inline unsigned long host_spsr_to_spsr32(unsigned long spsr) 2131cfbb484SMark Rutland { 2141cfbb484SMark Rutland const unsigned long overlap = BIT(24) | BIT(21); 2151cfbb484SMark Rutland unsigned long dit = !!(spsr & PSR_AA32_DIT_BIT); 2161cfbb484SMark Rutland 2171cfbb484SMark Rutland spsr &= ~overlap; 2181cfbb484SMark Rutland 2191cfbb484SMark Rutland spsr |= dit << 21; 2201cfbb484SMark Rutland 2211cfbb484SMark Rutland return spsr; 2221cfbb484SMark Rutland } 2231cfbb484SMark Rutland 22483a49794SMarc Zyngier static inline bool vcpu_mode_priv(const struct kvm_vcpu *vcpu) 22583a49794SMarc Zyngier { 2269586a2eaSShannon Zhao u32 mode; 22783a49794SMarc Zyngier 2289586a2eaSShannon Zhao if (vcpu_mode_is_32bit(vcpu)) { 229256c0960SMark Rutland mode = *vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK; 230256c0960SMark Rutland return mode > PSR_AA32_MODE_USR; 2319586a2eaSShannon Zhao } 2329586a2eaSShannon Zhao 2339586a2eaSShannon Zhao mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK; 234b547631fSMarc Zyngier 23583a49794SMarc Zyngier return mode != PSR_MODE_EL0t; 23683a49794SMarc Zyngier } 23783a49794SMarc Zyngier 238*0b12620fSAlexandru Elisei static __always_inline u64 kvm_vcpu_get_esr(const struct kvm_vcpu *vcpu) 23983a49794SMarc Zyngier { 24083a49794SMarc Zyngier return vcpu->arch.fault.esr_el2; 24183a49794SMarc Zyngier } 24283a49794SMarc Zyngier 2435c37f1aeSJames Morse static __always_inline int kvm_vcpu_get_condition(const struct kvm_vcpu *vcpu) 2443e51d435SMarc Zyngier { 245*0b12620fSAlexandru Elisei u64 esr = kvm_vcpu_get_esr(vcpu); 2463e51d435SMarc Zyngier 2473e51d435SMarc Zyngier if (esr & ESR_ELx_CV) 2483e51d435SMarc Zyngier return (esr & ESR_ELx_COND_MASK) >> ESR_ELx_COND_SHIFT; 2493e51d435SMarc Zyngier 2503e51d435SMarc Zyngier return -1; 2513e51d435SMarc Zyngier } 2523e51d435SMarc Zyngier 2535c37f1aeSJames Morse static __always_inline unsigned long kvm_vcpu_get_hfar(const struct kvm_vcpu *vcpu) 25483a49794SMarc Zyngier { 25583a49794SMarc Zyngier return vcpu->arch.fault.far_el2; 25683a49794SMarc Zyngier } 25783a49794SMarc Zyngier 2585c37f1aeSJames Morse static __always_inline phys_addr_t kvm_vcpu_get_fault_ipa(const struct kvm_vcpu *vcpu) 25983a49794SMarc Zyngier { 26083a49794SMarc Zyngier return ((phys_addr_t)vcpu->arch.fault.hpfar_el2 & HPFAR_MASK) << 8; 26183a49794SMarc Zyngier } 26283a49794SMarc Zyngier 2630067df41SJames Morse static inline u64 kvm_vcpu_get_disr(const struct kvm_vcpu *vcpu) 2640067df41SJames Morse { 2650067df41SJames Morse return vcpu->arch.fault.disr_el1; 2660067df41SJames Morse } 2670067df41SJames Morse 2680d97f884SWei Huang static inline u32 kvm_vcpu_hvc_get_imm(const struct kvm_vcpu *vcpu) 2690d97f884SWei Huang { 2703a949f4cSGavin Shan return kvm_vcpu_get_esr(vcpu) & ESR_ELx_xVC_IMM_MASK; 2710d97f884SWei Huang } 2720d97f884SWei Huang 2735c37f1aeSJames Morse static __always_inline bool kvm_vcpu_dabt_isvalid(const struct kvm_vcpu *vcpu) 27483a49794SMarc Zyngier { 2753a949f4cSGavin Shan return !!(kvm_vcpu_get_esr(vcpu) & ESR_ELx_ISV); 27683a49794SMarc Zyngier } 27783a49794SMarc Zyngier 278c726200dSChristoffer Dall static inline unsigned long kvm_vcpu_dabt_iss_nisv_sanitized(const struct kvm_vcpu *vcpu) 279c726200dSChristoffer Dall { 2803a949f4cSGavin Shan return kvm_vcpu_get_esr(vcpu) & (ESR_ELx_CM | ESR_ELx_WNR | ESR_ELx_FSC); 281c726200dSChristoffer Dall } 282c726200dSChristoffer Dall 28383a49794SMarc Zyngier static inline bool kvm_vcpu_dabt_issext(const struct kvm_vcpu *vcpu) 28483a49794SMarc Zyngier { 2853a949f4cSGavin Shan return !!(kvm_vcpu_get_esr(vcpu) & ESR_ELx_SSE); 28683a49794SMarc Zyngier } 28783a49794SMarc Zyngier 288b6ae256aSChristoffer Dall static inline bool kvm_vcpu_dabt_issf(const struct kvm_vcpu *vcpu) 289b6ae256aSChristoffer Dall { 2903a949f4cSGavin Shan return !!(kvm_vcpu_get_esr(vcpu) & ESR_ELx_SF); 291b6ae256aSChristoffer Dall } 292b6ae256aSChristoffer Dall 2935c37f1aeSJames Morse static __always_inline int kvm_vcpu_dabt_get_rd(const struct kvm_vcpu *vcpu) 29483a49794SMarc Zyngier { 2953a949f4cSGavin Shan return (kvm_vcpu_get_esr(vcpu) & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT; 29683a49794SMarc Zyngier } 29783a49794SMarc Zyngier 298c4ad98e4SMarc Zyngier static __always_inline bool kvm_vcpu_abt_iss1tw(const struct kvm_vcpu *vcpu) 29983a49794SMarc Zyngier { 3003a949f4cSGavin Shan return !!(kvm_vcpu_get_esr(vcpu) & ESR_ELx_S1PTW); 30183a49794SMarc Zyngier } 30283a49794SMarc Zyngier 303620cf45fSMarc Zyngier /* Always check for S1PTW *before* using this. */ 3045c37f1aeSJames Morse static __always_inline bool kvm_vcpu_dabt_iswrite(const struct kvm_vcpu *vcpu) 30560e21a0eSWill Deacon { 306620cf45fSMarc Zyngier return kvm_vcpu_get_esr(vcpu) & ESR_ELx_WNR; 30760e21a0eSWill Deacon } 30860e21a0eSWill Deacon 30957c841f1SMarc Zyngier static inline bool kvm_vcpu_dabt_is_cm(const struct kvm_vcpu *vcpu) 31057c841f1SMarc Zyngier { 3113a949f4cSGavin Shan return !!(kvm_vcpu_get_esr(vcpu) & ESR_ELx_CM); 31257c841f1SMarc Zyngier } 31357c841f1SMarc Zyngier 3145c37f1aeSJames Morse static __always_inline unsigned int kvm_vcpu_dabt_get_as(const struct kvm_vcpu *vcpu) 31583a49794SMarc Zyngier { 3163a949f4cSGavin Shan return 1 << ((kvm_vcpu_get_esr(vcpu) & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT); 31783a49794SMarc Zyngier } 31883a49794SMarc Zyngier 31983a49794SMarc Zyngier /* This one is not specific to Data Abort */ 3205c37f1aeSJames Morse static __always_inline bool kvm_vcpu_trap_il_is32bit(const struct kvm_vcpu *vcpu) 32183a49794SMarc Zyngier { 3223a949f4cSGavin Shan return !!(kvm_vcpu_get_esr(vcpu) & ESR_ELx_IL); 32383a49794SMarc Zyngier } 32483a49794SMarc Zyngier 3255c37f1aeSJames Morse static __always_inline u8 kvm_vcpu_trap_get_class(const struct kvm_vcpu *vcpu) 32683a49794SMarc Zyngier { 3273a949f4cSGavin Shan return ESR_ELx_EC(kvm_vcpu_get_esr(vcpu)); 32883a49794SMarc Zyngier } 32983a49794SMarc Zyngier 33083a49794SMarc Zyngier static inline bool kvm_vcpu_trap_is_iabt(const struct kvm_vcpu *vcpu) 33183a49794SMarc Zyngier { 332c6d01a94SMark Rutland return kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_IABT_LOW; 33383a49794SMarc Zyngier } 33483a49794SMarc Zyngier 335c4ad98e4SMarc Zyngier static inline bool kvm_vcpu_trap_is_exec_fault(const struct kvm_vcpu *vcpu) 336c4ad98e4SMarc Zyngier { 337c4ad98e4SMarc Zyngier return kvm_vcpu_trap_is_iabt(vcpu) && !kvm_vcpu_abt_iss1tw(vcpu); 338c4ad98e4SMarc Zyngier } 339c4ad98e4SMarc Zyngier 3405c37f1aeSJames Morse static __always_inline u8 kvm_vcpu_trap_get_fault(const struct kvm_vcpu *vcpu) 34183a49794SMarc Zyngier { 3423a949f4cSGavin Shan return kvm_vcpu_get_esr(vcpu) & ESR_ELx_FSC; 3430496daa5SChristoffer Dall } 3440496daa5SChristoffer Dall 3455c37f1aeSJames Morse static __always_inline u8 kvm_vcpu_trap_get_fault_type(const struct kvm_vcpu *vcpu) 3460496daa5SChristoffer Dall { 3473a949f4cSGavin Shan return kvm_vcpu_get_esr(vcpu) & ESR_ELx_FSC_TYPE; 34883a49794SMarc Zyngier } 34983a49794SMarc Zyngier 3507d894834SYanan Wang static __always_inline u8 kvm_vcpu_trap_get_fault_level(const struct kvm_vcpu *vcpu) 3517d894834SYanan Wang { 3527d894834SYanan Wang return kvm_vcpu_get_esr(vcpu) & ESR_ELx_FSC_LEVEL; 3537d894834SYanan Wang } 3547d894834SYanan Wang 355c9a636f2SWill Deacon static __always_inline bool kvm_vcpu_abt_issea(const struct kvm_vcpu *vcpu) 356bb428921SJames Morse { 357a2b83133SDongjiu Geng switch (kvm_vcpu_trap_get_fault(vcpu)) { 358bb428921SJames Morse case FSC_SEA: 359bb428921SJames Morse case FSC_SEA_TTW0: 360bb428921SJames Morse case FSC_SEA_TTW1: 361bb428921SJames Morse case FSC_SEA_TTW2: 362bb428921SJames Morse case FSC_SEA_TTW3: 363bb428921SJames Morse case FSC_SECC: 364bb428921SJames Morse case FSC_SECC_TTW0: 365bb428921SJames Morse case FSC_SECC_TTW1: 366bb428921SJames Morse case FSC_SECC_TTW2: 367bb428921SJames Morse case FSC_SECC_TTW3: 368bb428921SJames Morse return true; 369bb428921SJames Morse default: 370bb428921SJames Morse return false; 371bb428921SJames Morse } 372bb428921SJames Morse } 373bb428921SJames Morse 3745c37f1aeSJames Morse static __always_inline int kvm_vcpu_sys_get_rt(struct kvm_vcpu *vcpu) 375c667186fSMarc Zyngier { 376*0b12620fSAlexandru Elisei u64 esr = kvm_vcpu_get_esr(vcpu); 3771c839141SAnshuman Khandual return ESR_ELx_SYS64_ISS_RT(esr); 378c667186fSMarc Zyngier } 379c667186fSMarc Zyngier 38064cf98faSChristoffer Dall static inline bool kvm_is_write_fault(struct kvm_vcpu *vcpu) 38164cf98faSChristoffer Dall { 382c4ad98e4SMarc Zyngier if (kvm_vcpu_abt_iss1tw(vcpu)) 383c4ad98e4SMarc Zyngier return true; 384c4ad98e4SMarc Zyngier 38564cf98faSChristoffer Dall if (kvm_vcpu_trap_is_iabt(vcpu)) 38664cf98faSChristoffer Dall return false; 38764cf98faSChristoffer Dall 38864cf98faSChristoffer Dall return kvm_vcpu_dabt_iswrite(vcpu); 38964cf98faSChristoffer Dall } 39064cf98faSChristoffer Dall 3914429fc64SAndre Przywara static inline unsigned long kvm_vcpu_get_mpidr_aff(struct kvm_vcpu *vcpu) 39279c64880SMarc Zyngier { 3938d404c4cSChristoffer Dall return vcpu_read_sys_reg(vcpu, MPIDR_EL1) & MPIDR_HWID_BITMASK; 39479c64880SMarc Zyngier } 39579c64880SMarc Zyngier 396ce94fe93SMarc Zyngier static inline void kvm_vcpu_set_be(struct kvm_vcpu *vcpu) 397ce94fe93SMarc Zyngier { 3988d404c4cSChristoffer Dall if (vcpu_mode_is_32bit(vcpu)) { 399256c0960SMark Rutland *vcpu_cpsr(vcpu) |= PSR_AA32_E_BIT; 4008d404c4cSChristoffer Dall } else { 4018d404c4cSChristoffer Dall u64 sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1); 402500ca524SFuad Tabba sctlr |= SCTLR_ELx_EE; 4031975fa56SJames Morse vcpu_write_sys_reg(vcpu, sctlr, SCTLR_EL1); 4048d404c4cSChristoffer Dall } 405ce94fe93SMarc Zyngier } 406ce94fe93SMarc Zyngier 4076d89d2d9SMarc Zyngier static inline bool kvm_vcpu_is_be(struct kvm_vcpu *vcpu) 4086d89d2d9SMarc Zyngier { 4096d89d2d9SMarc Zyngier if (vcpu_mode_is_32bit(vcpu)) 410256c0960SMark Rutland return !!(*vcpu_cpsr(vcpu) & PSR_AA32_E_BIT); 4116d89d2d9SMarc Zyngier 41269adec18SMarc Zyngier if (vcpu_mode_priv(vcpu)) 41369adec18SMarc Zyngier return !!(vcpu_read_sys_reg(vcpu, SCTLR_EL1) & SCTLR_ELx_EE); 41469adec18SMarc Zyngier else 41569adec18SMarc Zyngier return !!(vcpu_read_sys_reg(vcpu, SCTLR_EL1) & SCTLR_EL1_E0E); 4166d89d2d9SMarc Zyngier } 4176d89d2d9SMarc Zyngier 4186d89d2d9SMarc Zyngier static inline unsigned long vcpu_data_guest_to_host(struct kvm_vcpu *vcpu, 4196d89d2d9SMarc Zyngier unsigned long data, 4206d89d2d9SMarc Zyngier unsigned int len) 4216d89d2d9SMarc Zyngier { 4226d89d2d9SMarc Zyngier if (kvm_vcpu_is_be(vcpu)) { 4236d89d2d9SMarc Zyngier switch (len) { 4246d89d2d9SMarc Zyngier case 1: 4256d89d2d9SMarc Zyngier return data & 0xff; 4266d89d2d9SMarc Zyngier case 2: 4276d89d2d9SMarc Zyngier return be16_to_cpu(data & 0xffff); 4286d89d2d9SMarc Zyngier case 4: 4296d89d2d9SMarc Zyngier return be32_to_cpu(data & 0xffffffff); 4306d89d2d9SMarc Zyngier default: 4316d89d2d9SMarc Zyngier return be64_to_cpu(data); 4326d89d2d9SMarc Zyngier } 433b3007086SVictor Kamensky } else { 434b3007086SVictor Kamensky switch (len) { 435b3007086SVictor Kamensky case 1: 436b3007086SVictor Kamensky return data & 0xff; 437b3007086SVictor Kamensky case 2: 438b3007086SVictor Kamensky return le16_to_cpu(data & 0xffff); 439b3007086SVictor Kamensky case 4: 440b3007086SVictor Kamensky return le32_to_cpu(data & 0xffffffff); 441b3007086SVictor Kamensky default: 442b3007086SVictor Kamensky return le64_to_cpu(data); 443b3007086SVictor Kamensky } 4446d89d2d9SMarc Zyngier } 4456d89d2d9SMarc Zyngier 4466d89d2d9SMarc Zyngier return data; /* Leave LE untouched */ 4476d89d2d9SMarc Zyngier } 4486d89d2d9SMarc Zyngier 4496d89d2d9SMarc Zyngier static inline unsigned long vcpu_data_host_to_guest(struct kvm_vcpu *vcpu, 4506d89d2d9SMarc Zyngier unsigned long data, 4516d89d2d9SMarc Zyngier unsigned int len) 4526d89d2d9SMarc Zyngier { 4536d89d2d9SMarc Zyngier if (kvm_vcpu_is_be(vcpu)) { 4546d89d2d9SMarc Zyngier switch (len) { 4556d89d2d9SMarc Zyngier case 1: 4566d89d2d9SMarc Zyngier return data & 0xff; 4576d89d2d9SMarc Zyngier case 2: 4586d89d2d9SMarc Zyngier return cpu_to_be16(data & 0xffff); 4596d89d2d9SMarc Zyngier case 4: 4606d89d2d9SMarc Zyngier return cpu_to_be32(data & 0xffffffff); 4616d89d2d9SMarc Zyngier default: 4626d89d2d9SMarc Zyngier return cpu_to_be64(data); 4636d89d2d9SMarc Zyngier } 464b3007086SVictor Kamensky } else { 465b3007086SVictor Kamensky switch (len) { 466b3007086SVictor Kamensky case 1: 467b3007086SVictor Kamensky return data & 0xff; 468b3007086SVictor Kamensky case 2: 469b3007086SVictor Kamensky return cpu_to_le16(data & 0xffff); 470b3007086SVictor Kamensky case 4: 471b3007086SVictor Kamensky return cpu_to_le32(data & 0xffffffff); 472b3007086SVictor Kamensky default: 473b3007086SVictor Kamensky return cpu_to_le64(data); 474b3007086SVictor Kamensky } 4756d89d2d9SMarc Zyngier } 4766d89d2d9SMarc Zyngier 4776d89d2d9SMarc Zyngier return data; /* Leave LE untouched */ 4786d89d2d9SMarc Zyngier } 4796d89d2d9SMarc Zyngier 480cdb5e02eSMarc Zyngier static __always_inline void kvm_incr_pc(struct kvm_vcpu *vcpu) 481bd7d95caSMark Rutland { 482cdb5e02eSMarc Zyngier vcpu->arch.flags |= KVM_ARM64_INCREMENT_PC; 483bd7d95caSMark Rutland } 484bd7d95caSMark Rutland 48566e94d5cSMarc Zyngier static inline bool vcpu_has_feature(struct kvm_vcpu *vcpu, int feature) 48666e94d5cSMarc Zyngier { 48766e94d5cSMarc Zyngier return test_bit(feature, vcpu->arch.features); 48866e94d5cSMarc Zyngier } 48966e94d5cSMarc Zyngier 49083a49794SMarc Zyngier #endif /* __ARM64_KVM_EMULATE_H__ */ 491