1 /* 2 * Kernel page table mapping 3 * 4 * Copyright (C) 2015 ARM Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program. If not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 #ifndef __ASM_KERNEL_PGTABLE_H 20 #define __ASM_KERNEL_PGTABLE_H 21 22 #include <asm/pgtable.h> 23 #include <asm/sparsemem.h> 24 25 /* 26 * The linear mapping and the start of memory are both 2M aligned (per 27 * the arm64 booting.txt requirements). Hence we can use section mapping 28 * with 4K (section size = 2M) but not with 16K (section size = 32M) or 29 * 64K (section size = 512M). 30 */ 31 #ifdef CONFIG_ARM64_4K_PAGES 32 #define ARM64_SWAPPER_USES_SECTION_MAPS 1 33 #else 34 #define ARM64_SWAPPER_USES_SECTION_MAPS 0 35 #endif 36 37 /* 38 * The idmap and swapper page tables need some space reserved in the kernel 39 * image. Both require pgd, pud (4 levels only) and pmd tables to (section) 40 * map the kernel. With the 64K page configuration, swapper and idmap need to 41 * map to pte level. The swapper also maps the FDT (see __create_page_tables 42 * for more information). Note that the number of ID map translation levels 43 * could be increased on the fly if system RAM is out of reach for the default 44 * VA range, so pages required to map highest possible PA are reserved in all 45 * cases. 46 */ 47 #if ARM64_SWAPPER_USES_SECTION_MAPS 48 #define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS - 1) 49 #define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT) - 1) 50 #else 51 #define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS) 52 #define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT)) 53 #endif 54 55 56 /* 57 * If KASLR is enabled, then an offset K is added to the kernel address 58 * space. The bottom 21 bits of this offset are zero to guarantee 2MB 59 * alignment for PA and VA. 60 * 61 * For each pagetable level of the swapper, we know that the shift will 62 * be larger than 21 (for the 4KB granule case we use section maps thus 63 * the smallest shift is actually 30) thus there is the possibility that 64 * KASLR can increase the number of pagetable entries by 1, so we make 65 * room for this extra entry. 66 * 67 * Note KASLR cannot increase the number of required entries for a level 68 * by more than one because it increments both the virtual start and end 69 * addresses equally (the extra entry comes from the case where the end 70 * address is just pushed over a boundary and the start address isn't). 71 */ 72 73 #ifdef CONFIG_RANDOMIZE_BASE 74 #define EARLY_KASLR (1) 75 #else 76 #define EARLY_KASLR (0) 77 #endif 78 79 #define EARLY_ENTRIES(vstart, vend, shift) (((vend) >> (shift)) \ 80 - ((vstart) >> (shift)) + 1 + EARLY_KASLR) 81 82 #define EARLY_PGDS(vstart, vend) (EARLY_ENTRIES(vstart, vend, PGDIR_SHIFT)) 83 84 #if SWAPPER_PGTABLE_LEVELS > 3 85 #define EARLY_PUDS(vstart, vend) (EARLY_ENTRIES(vstart, vend, PUD_SHIFT)) 86 #else 87 #define EARLY_PUDS(vstart, vend) (0) 88 #endif 89 90 #if SWAPPER_PGTABLE_LEVELS > 2 91 #define EARLY_PMDS(vstart, vend) (EARLY_ENTRIES(vstart, vend, SWAPPER_TABLE_SHIFT)) 92 #else 93 #define EARLY_PMDS(vstart, vend) (0) 94 #endif 95 96 #define EARLY_PAGES(vstart, vend) ( 1 /* PGDIR page */ \ 97 + EARLY_PGDS((vstart), (vend)) /* each PGDIR needs a next level page table */ \ 98 + EARLY_PUDS((vstart), (vend)) /* each PUD needs a next level page table */ \ 99 + EARLY_PMDS((vstart), (vend))) /* each PMD needs a next level page table */ 100 #define INIT_DIR_SIZE (PAGE_SIZE * EARLY_PAGES(KIMAGE_VADDR + TEXT_OFFSET, _end)) 101 #define IDMAP_DIR_SIZE (IDMAP_PGTABLE_LEVELS * PAGE_SIZE) 102 103 #ifdef CONFIG_ARM64_SW_TTBR0_PAN 104 #define RESERVED_TTBR0_SIZE (PAGE_SIZE) 105 #else 106 #define RESERVED_TTBR0_SIZE (0) 107 #endif 108 109 /* Initial memory map size */ 110 #if ARM64_SWAPPER_USES_SECTION_MAPS 111 #define SWAPPER_BLOCK_SHIFT SECTION_SHIFT 112 #define SWAPPER_BLOCK_SIZE SECTION_SIZE 113 #define SWAPPER_TABLE_SHIFT PUD_SHIFT 114 #else 115 #define SWAPPER_BLOCK_SHIFT PAGE_SHIFT 116 #define SWAPPER_BLOCK_SIZE PAGE_SIZE 117 #define SWAPPER_TABLE_SHIFT PMD_SHIFT 118 #endif 119 120 /* The size of the initial kernel direct mapping */ 121 #define SWAPPER_INIT_MAP_SIZE (_AC(1, UL) << SWAPPER_TABLE_SHIFT) 122 123 /* 124 * Initial memory map attributes. 125 */ 126 #define SWAPPER_PTE_FLAGS (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED) 127 #define SWAPPER_PMD_FLAGS (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S) 128 129 #if ARM64_SWAPPER_USES_SECTION_MAPS 130 #define SWAPPER_MM_MMUFLAGS (PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS) 131 #else 132 #define SWAPPER_MM_MMUFLAGS (PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS) 133 #endif 134 135 /* 136 * To make optimal use of block mappings when laying out the linear 137 * mapping, round down the base of physical memory to a size that can 138 * be mapped efficiently, i.e., either PUD_SIZE (4k granule) or PMD_SIZE 139 * (64k granule), or a multiple that can be mapped using contiguous bits 140 * in the page tables: 32 * PMD_SIZE (16k granule) 141 */ 142 #if defined(CONFIG_ARM64_4K_PAGES) 143 #define ARM64_MEMSTART_SHIFT PUD_SHIFT 144 #elif defined(CONFIG_ARM64_16K_PAGES) 145 #define ARM64_MEMSTART_SHIFT (PMD_SHIFT + 5) 146 #else 147 #define ARM64_MEMSTART_SHIFT PMD_SHIFT 148 #endif 149 150 /* 151 * sparsemem vmemmap imposes an additional requirement on the alignment of 152 * memstart_addr, due to the fact that the base of the vmemmap region 153 * has a direct correspondence, and needs to appear sufficiently aligned 154 * in the virtual address space. 155 */ 156 #if defined(CONFIG_SPARSEMEM_VMEMMAP) && ARM64_MEMSTART_SHIFT < SECTION_SIZE_BITS 157 #define ARM64_MEMSTART_ALIGN (1UL << SECTION_SIZE_BITS) 158 #else 159 #define ARM64_MEMSTART_ALIGN (1UL << ARM64_MEMSTART_SHIFT) 160 #endif 161 162 #endif /* __ASM_KERNEL_PGTABLE_H */ 163