1 /* 2 * Copyright (C) 2012 ARM Ltd. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 #ifndef __ASM_IRQFLAGS_H 17 #define __ASM_IRQFLAGS_H 18 19 #ifdef __KERNEL__ 20 21 #include <asm/ptrace.h> 22 23 /* 24 * CPU interrupt mask handling. 25 */ 26 static inline unsigned long arch_local_irq_save(void) 27 { 28 unsigned long flags; 29 asm volatile( 30 "mrs %0, daif // arch_local_irq_save\n" 31 "msr daifset, #2" 32 : "=r" (flags) 33 : 34 : "memory"); 35 return flags; 36 } 37 38 static inline void arch_local_irq_enable(void) 39 { 40 asm volatile( 41 "msr daifclr, #2 // arch_local_irq_enable" 42 : 43 : 44 : "memory"); 45 } 46 47 static inline void arch_local_irq_disable(void) 48 { 49 asm volatile( 50 "msr daifset, #2 // arch_local_irq_disable" 51 : 52 : 53 : "memory"); 54 } 55 56 #define local_fiq_enable() asm("msr daifclr, #1" : : : "memory") 57 #define local_fiq_disable() asm("msr daifset, #1" : : : "memory") 58 59 /* 60 * Save the current interrupt enable state. 61 */ 62 static inline unsigned long arch_local_save_flags(void) 63 { 64 unsigned long flags; 65 asm volatile( 66 "mrs %0, daif // arch_local_save_flags" 67 : "=r" (flags) 68 : 69 : "memory"); 70 return flags; 71 } 72 73 /* 74 * restore saved IRQ state 75 */ 76 static inline void arch_local_irq_restore(unsigned long flags) 77 { 78 asm volatile( 79 "msr daif, %0 // arch_local_irq_restore" 80 : 81 : "r" (flags) 82 : "memory"); 83 } 84 85 static inline int arch_irqs_disabled_flags(unsigned long flags) 86 { 87 return flags & PSR_I_BIT; 88 } 89 90 #endif 91 #endif 92