1 /* 2 * Copyright (C) 2012 ARM Ltd. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 #ifndef __ASM_FUTEX_H 17 #define __ASM_FUTEX_H 18 19 #ifdef __KERNEL__ 20 21 #include <linux/futex.h> 22 #include <linux/uaccess.h> 23 24 #include <asm/alternative.h> 25 #include <asm/cpufeature.h> 26 #include <asm/errno.h> 27 #include <asm/sysreg.h> 28 29 #define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \ 30 asm volatile( \ 31 ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN, \ 32 CONFIG_ARM64_PAN) \ 33 " prfm pstl1strm, %2\n" \ 34 "1: ldxr %w1, %2\n" \ 35 insn "\n" \ 36 "2: stlxr %w3, %w0, %2\n" \ 37 " cbnz %w3, 1b\n" \ 38 " dmb ish\n" \ 39 "3:\n" \ 40 " .pushsection .fixup,\"ax\"\n" \ 41 " .align 2\n" \ 42 "4: mov %w0, %w5\n" \ 43 " b 3b\n" \ 44 " .popsection\n" \ 45 " .pushsection __ex_table,\"a\"\n" \ 46 " .align 3\n" \ 47 " .quad 1b, 4b, 2b, 4b\n" \ 48 " .popsection\n" \ 49 ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, \ 50 CONFIG_ARM64_PAN) \ 51 : "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \ 52 : "r" (oparg), "Ir" (-EFAULT) \ 53 : "memory") 54 55 static inline int 56 futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr) 57 { 58 int op = (encoded_op >> 28) & 7; 59 int cmp = (encoded_op >> 24) & 15; 60 int oparg = (encoded_op << 8) >> 20; 61 int cmparg = (encoded_op << 20) >> 20; 62 int oldval = 0, ret, tmp; 63 64 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) 65 oparg = 1 << oparg; 66 67 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) 68 return -EFAULT; 69 70 pagefault_disable(); 71 72 switch (op) { 73 case FUTEX_OP_SET: 74 __futex_atomic_op("mov %w0, %w4", 75 ret, oldval, uaddr, tmp, oparg); 76 break; 77 case FUTEX_OP_ADD: 78 __futex_atomic_op("add %w0, %w1, %w4", 79 ret, oldval, uaddr, tmp, oparg); 80 break; 81 case FUTEX_OP_OR: 82 __futex_atomic_op("orr %w0, %w1, %w4", 83 ret, oldval, uaddr, tmp, oparg); 84 break; 85 case FUTEX_OP_ANDN: 86 __futex_atomic_op("and %w0, %w1, %w4", 87 ret, oldval, uaddr, tmp, ~oparg); 88 break; 89 case FUTEX_OP_XOR: 90 __futex_atomic_op("eor %w0, %w1, %w4", 91 ret, oldval, uaddr, tmp, oparg); 92 break; 93 default: 94 ret = -ENOSYS; 95 } 96 97 pagefault_enable(); 98 99 if (!ret) { 100 switch (cmp) { 101 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; 102 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; 103 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; 104 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; 105 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; 106 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; 107 default: ret = -ENOSYS; 108 } 109 } 110 return ret; 111 } 112 113 static inline int 114 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, 115 u32 oldval, u32 newval) 116 { 117 int ret = 0; 118 u32 val, tmp; 119 120 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) 121 return -EFAULT; 122 123 asm volatile("// futex_atomic_cmpxchg_inatomic\n" 124 " prfm pstl1strm, %2\n" 125 "1: ldxr %w1, %2\n" 126 " sub %w3, %w1, %w4\n" 127 " cbnz %w3, 3f\n" 128 "2: stlxr %w3, %w5, %2\n" 129 " cbnz %w3, 1b\n" 130 " dmb ish\n" 131 "3:\n" 132 " .pushsection .fixup,\"ax\"\n" 133 "4: mov %w0, %w6\n" 134 " b 3b\n" 135 " .popsection\n" 136 " .pushsection __ex_table,\"a\"\n" 137 " .align 3\n" 138 " .quad 1b, 4b, 2b, 4b\n" 139 " .popsection\n" 140 : "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp) 141 : "r" (oldval), "r" (newval), "Ir" (-EFAULT) 142 : "memory"); 143 144 *uval = val; 145 return ret; 146 } 147 148 #endif /* __KERNEL__ */ 149 #endif /* __ASM_FUTEX_H */ 150